CRITICAL SIGNALS

AND
SYSTEM CLOCKS

Submitted by
Anagha babukumar
Roll : no : 2
S3 M-Tech (VES)

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 TABLE OF CONTENTS

1. INTRODUCTION ............................................................................................................ 2
1.1 PCB LAYOUT AND STACKUP .......................................................................... 2
1.2 WHAT IS STACK-UP? ............................................................................................. 3
1.3 GENERAL PCB LAYOUT CONSIDERATIONS ................................................... 3
2. CRITICAL SIGNALS ...................................................................................................... 4
3. SYSTEM CLOCKS .......................................................................................................... 6
4. CONCLUSION ................................................................................................................. 8

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TABLE OF FIGURES

Fig : 2.1 A PCB with a defined keep out zone for critical signals. .......................................... 5
Fig : 3.1 connection of ground pain through vias ..................................................................... 6
Fig :3.2 ferrite beads ................................................................................................................ 7
Fig :3.3 ringing and reflections ............................................................................................... 7

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1. INTRODUCTION

1.1 PCB LAYOUT AND STACKUP

In most products, the electronics are located on a printed circuit board (PCB), the design
and layout of which is crucial to the functionality and electromagnetic compatibility (EMC)
performance of the product. The PCB represents the physical implementation of the
schematic. The proper design and layout of a printed circuit board can mean the difference
between the product passing or failing EMC requirements. Such things as component
placement, keep out zones, trace routing, number of layers, layer stackup (order of layers and
layer spacing), and return path discontinuities all are critical to the EMC performance of the
board.
The irreversible development of modern electronics has been increasingly pushing PCBs
towards such demands as miniaturization, light weight, high speed, better functionality and
reliability, and longer lifetime, which results in the popularity of Multilayer PCBs. Combined
by a type of semi-solid adhesive which is called "prepreg", two or more single and/or double-
sided PCBs are stacked together to generate multilayer PCBs through reliable predefined
mutual connection between them. There are three or more conductive layers in one multilayer
PCB with two layers outside and one layer synthesized in the insulation board. With the
increase of PCB complexities and densities, it's possible for some issues to take place such as
noise, stray capacitance and cross talk when layer arrangement gets inefficient design.

Planning optimal multilayer stack-up is one of the most important elements in determining
the Electromagnetic Compatibility (EMC) performance of a product. A well-designed layer
stack-up can both minimize the radiation and can stop circuit from being interfered by
external noise sources. Well-stacked PCB substrates can also reduce signal cross talk and
impedance mismatch issues. However, an inferior stack-up may get EMI (Electromagnetic
Interference) radiation rising, because reflections and ringing in the system as a result of

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impedance mismatch can dramatically lower products' performance and reliability. This
article then focuses on layer stack up definition, its designing rules and essential
considerations.

1.2 WHAT IS STACK-UP?

Stack-up refers to the arrangement of copper layers and insulating layers that make up a
PCB prior to board layout design. While a layer stack-up allows you to get more circuitry on a
single board through the various PCB board layers, the structure of PCB stack-up design
confers many other advantages:
• A PCB layer stack can help you minimize your circuit's vulnerability to external noise as
well as minimize radiation and reduce impedance and crosstalk concerns on high-speed PCB
layouts.
• A good layer PCB stack-up can also help you balance your need for low-cost, efficient
manufacturing methods with concerns about signal integrity issues
• The right PCB layer stack can enhance the Electromagnetic Compatibility of your design as
well.

1.3 GENERAL PCB LAYOUT CONSIDERATIONS

• Partitioning
• Keep Out Zones
• Critical Signals
• System clocks

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2. CRITICAL SIGNALS

The High spectral content, repetitive waveshape circuits are called critical signals. These
include:
• Clocks
• Buses
• Repetitive control signals
The signal speed (spectral content) of a signal is proportional to
• The fundamental frequency
• The reciprocal of the rise/fall time
• The magnitude of the current
The most critical signals are those:
• That have the highest frequency
• That are periodic
Experience has shown that 90% of PCB problems are caused by 10% of the circuitry.
This 10% of the circuitry should, therefore, be given the most consideration in the layout of
the board. For emissions, the greatest problems are high-frequency (fast rise time) digital
circuits with repetitive wave shapes, such as clocks, buses, and some control signals. These
signals contain a multiplicity of large-amplitude, high-frequency harmonics. Clocks are
usually the worst offenders, followed in order by buses and then repetitive control signals. A
metric that is useful in categorizing critical signals is the concept of ‘‘Signal Speed’’ .
Radiation of a signal is directly related to the high-frequency spectral content of its current.
The high-frequency spectral content or signal speed is proportional to:
• The fundamental frequency F0 of the signal
• The reciprocal of the rise/fall time tr
• The magnitude of the transient drive current I0 when the gate switches
Therefore, an effective metric for categorizing signal speed (in A/s2) is

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Signal Speed =F0I0/tr:

Repetitive, high-frequency signals with large currents and fast rise/fall times will have large
spectra content. Hence, signal speed should be considered for all critical signals.

Fig 2.1 . A PCB with a defined keep out zone for critical signals.

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3. SYSTEM CLOCKS

Get paranoid about system clocks! Keep the clock traces as short as possible and provide
for optimum placement by routing them first. Locate crystals, oscillators, or resonators as
close to the circuits that use them as possible. Add a ground plane on the component side of
the board under the crystal, oscillator, and/or clock driver. Connect this plane to the main
ground plane with multiple vias.

Fig : 3.1 connection of ground pain through vias

This provides a termination for any stray capacitance (electric fields) from the crystal
or oscillator, and it prevents the routing of other signals, on the top layer under the crystal. If
the crystal or oscillator has a metal case, ground it to this component-side ground plane, and
provide a provision for a board level shield over this area in case it should be needed. Small
series damping resistors (or ferrite beads) should be added to all clock output traces with a
frequency of 20 MHz or more.

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Fig 3.2. ferrite beads

Ferrite beads neither enhance nor degrade the performance of a clock generator; they merely
provide noise isolation (power supply decoupling). This will help reduce ringing and control
reflections.

Fig 3.3. ringing and reflections

This is recommended even on short clock traces, unless adding the resistor would
increase the length of an already very short trace. A typical value resistor would be 33 Ω.
Clock oscillators and drivers should also have ferrite beads in series with the Vcc line to
isolate the circuit from the main power distribution system.

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4. CONCLUSION

The proper design and layout of a printed circuit board can mean the difference between
the product passing or failing EMC requirements. General PCB layout considerations such as
critical signals and system clocks have been considered for a well designed PCB.

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REFERENCES

[1] Electromagnetic Compatibility Engineering , Henry W. Ott

[2] Guofeng Li and Ninghui Wang, Hong Zhao “Research and Application of
Electromagnetic Compatibility Technology,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol.
54, journal of computers, vol. 7, no. 9, september 2012