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6, JUNE 2009
at zero. Since the total ampere turns of Lr1 and Lr2 should stay At t4 , Vcr reaches Vo ; thus, the duration of this mode and the
constant maximum voltage stress of the switch are
Vo n Vo
Iin + N1 = ILr1 N1 + ILr2 N2 . (7) Δt4 = t4 − t3 = sin−1
Zr ωr Vo + (n + 1)Zr Iin
(16)
Furthermore, the Lr1 current is equal to the sum of the input 1
current and the Lr2 current; thus, the following relations are Vsw,max = Vsw (t4 ) = 1 + Vo . (17)
n
derived:
where ILr1 and ILr2 are the values of the coupled inductor Mode 6 [t5 −t6 ]: In this mode, Iin freewheels through the
currents in the previous mode and I1 is the Lr2 current at t3 . diode Do , and the current through the resonant inductors re-
Thus, by substituting (8) and (9) in (11), the following is mains zero and the voltage across the resonant capacitor stays
obtained: at Vo . The duration of this mode is
1 Vo
I1 = ILr2 (t3 ) = Iin + . (12) Δt6 = (1 − D)Ts − (Δt4 + Δt5 ). (21)
n Zr
The resonant capacitor charges by Iin plus the Lr2 current The converter operations in continuous conduction mode
until its voltage reaches Vo . The switch voltage, Cr voltage, (CCM) and discontinuous conduction mode (DCM) are similar.
and Lr2 current during this mode are However, CCM is preferred since the energy stored in the
leakage inductance of the coupled inductors in this condition
is less than that in DCM.
1
Vsw (t) = (n + 1)Zr (Iin + I1 ) sin ωr (t − t3 ) (13)
n
1 III. D ESIGN C ONSIDERATIONS
Vcr (t) = nZr (Iin + I1 ) sin ωr (t − t3 ) (14)
n The design of the proposed circuit involves the selection of
Cr , Lr1 , and n. Cr provides the ZVS condition for the switch
1
ILr2 (t) = (Iin + I1 ) cos ωr (t − t3 ) − Iin . (15) turnoff instant. Therefore, its value can be selected similar to
n
any snubber capacitor as follows [17]:
It can be observed from (13) that the switch is turned off under
ZVS condition at the beginning of this mode. However, in Isw tf
Cr > Cr,min = (22)
practice, due to the small leakage inductance of the coupled 2Vsw
inductors, a small voltage spike appears across the switch, and
then, the switch voltage rises slowly to its final value. Thus, where tf is the switch current fall time, Isw is the switch current
actually, the switch is turned off under almost ZVS condition before turnoff, and Vsw is the switch voltage after turnoff. In
even though the spike peak is usually much smaller than the practice, Cr is considered much larger than Cr,min to guarantee
switch maximum voltage. soft switching.
AMINI AND FARZANEHFARD: NOVEL FAMILY OF PWM SSS DC–DC CONVERTERS WITH COUPLED INDUCTORS 2111
TABLE I
COMPARISON OF SSS CONVERTERS
Fig. 5. Measured (top) voltage and (bottom) current of (a) the switch at one switching cycle (voltage: 50 V/div; current: 2 A/div; time scale: 1 µs/div),
(b) the switch turnon instant (voltage: 50 V/div; current: 2 A/div; time scale: 250 ns/div), and (c) the switch turnoff instant (voltage: 50 V/div; current: 2 A/div;
time scale: 250 ns/div).
Fig. 6. Measured (top) voltage and (bottom) current of (a) the main diode Do at one switching cycle (voltage: 50 V/div; current: 2 A/div; time scale: 1 µs/div),
(b) the main diode Do turnon instant (voltage: 50 V/div; current: 2 A/div; time scale: 250ns/div), and (c) the main diode Do turnoff instant (voltage: 50 V/div;
current: 2 A/div; time scale: 250 ns/div).
Fig. 7. Measured (top) voltage and (bottom) current of (a) the diode D1 at one switching cycle (voltage: 200 V/div; current: 1 A/div; time scale: 1 µs/div),
(b) the diode D1 turnon instant (voltage: 200 V/div; current: 1 A/div; time scale: 500 ns/div), and (c) the diode D1 turnoff instant (voltage: 200 V/div;
current: 1 A/div; time scale: 500 ns/div).
VI. C ONCLUSION
In this paper, a new PWM SSS boost converter without
Fig. 8. Efficiency of the proposed boost converter in comparison with con- high voltage and current stresses has been described. This
ventional hard-switching boost converter. converter does not require any extra switch to achieve soft
switching, which considerably simplifies the control circuit.
V. T OPOLOGY V ARIATIONS OF THE
The experimental results of a 120-W 100-kHz prototype circuit
P ROPOSED C ONVERTER
confirm the theoretical analysis of the proposed converter. The
The proposed topology can be extended to other nonisolated proposed topology is extended to other nonisolated and isolated
single-switch dc–dc converters such as buck, buck–boost, Cuk, single-switch dc–dc converters.
AMINI AND FARZANEHFARD: NOVEL FAMILY OF PWM SSS DC–DC CONVERTERS WITH COUPLED INDUCTORS 2113
Fig. 9. Topology variations of the proposed converter: (a) buck, (b) buck–boost, (c) Cuk, (d) SEPIC, and (e) Zeta converters.
Fig. 10. Isolated topology variations of the proposed converter: (a) forward, (b) flyback, (c) isolated Cuk, (d) isolated SEPIC, and (e) isolated Zeta converter.
2114 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 6, JUNE 2009