Lab Manual –Digital System Design Course S. Y. B. Tech.

EXPERIMENT NO: 01

TITLE OF EXPERIMENT : Study of Full adder and Full Subtractor

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 Lab Manual –Digital System Design Course S. Y. B. Tech.

EXPERIMENT NO. 1

1.1 Aim: A. Design and Implement full adder function using IC-74LS138.
B. Design and Implement full subtractor function using IC-74LS138.

1.2 Apparatus: Digital Trainer kit, patch cords, IC74LS138, IC74LS20.

1.3 Procedure:

A. Prepare the truth table for full adder.

B. Implement it using IC74LS138 and verify its truth table.
C. Repeat step no. A for full subtractor.

1.4 Design and Implementation

Pin diagram of IC74LS138:

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A. Binary Full Adder using IC74LS138.

i) Truth Table:

A B Cin Sum Carry

Equation:

Sum =

Carry =

ii) Logic Diagram

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B. Binary Full Subtractor using IC74LS138.

i) Truth Table:

A B Cin Difference Borrow

Equation:

Difference =

Borrow =

ii) Logic Diagram

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1.5 Conclusion:

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EXPERIMENT NO: 02

TITLE OF EXPERIMENT : Study of IC 74LS83 as a BCD adder

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EXPERIMENT NO. 2

2.1 Aim: A. To design and implement l digit BCD Adder using IC74LS83

2.2 Apparatus: Digital Trainer kit, patch cords, IC74LS83, IC74LS08, IC74LS04,
IC74LS86, IC74LS32

2.3 Procedure:

i) Design the logic to detect the correction factor and the logic to add it
(convert binary sum to BCD sum)
ii) Give any two BCD numbers as inputs and verify the result.

2.4 Design and Implementation

Pin diagram of IC74LS83:

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A. IC74LS83 as a BCD Adder

i)

Decimal Binary Sum BCD Sum

K Z8 Z4 Z2 Z1 C S8 S4 S2 S1

ii) K Map

C=

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iii) Logic Diagram

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iv) Observations

2.5 Conclusion:

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EXPERIMENT NO: 03

TITLE OF EXPERIMENT : Study of IC74LS85 as a magnitude

comparator

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EXPERIMENT NO.3

3.1 Aim: A. To design and implement 4-bit comparator

B. To design and implement 8-bit comparator

3.2 Apparatus: Digital Trainer kit, patch cords, IC74LS85

3.3 Procedure:

A. Verify the function table for 4-bit comparator.

B. Connect the circuit as shown in diagram for 8 bit comparator and verify
its functionality for A>B,A<B and A=B

3.4 Design and Implementation

A. Pin diagram and Function Table of IC74LS85

i) Pin Diagram

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ii) Function table

Comparing inputs Cascading inputs Outputs

A3,B3 A2,B2 A1,B1 A0,B0 A>B A<B A=B A>B A<B A=B

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B. Implementation of 8 bit comparator

ii) Logic Diagram

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ii) Observation

Comparing inputs Cascading Inputs Outputs

3.5 Conclusion:
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EXPERIMENT NO: 04

TITLE OF EXPERIMENT : Study of IC 74LS153 as a Multiplexer

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 Lab Manual –Digital System Design Course S. Y. B. Tech.

EXPERIMENT NO.4

4.1 Aim: Study of IC 74LS153 as a multiplexer.

i) To design and implement 8:1 MUX using 74LS153 and verify its truth table

4.2 Apparatus: Digital trainer kit, IC 74LS153, IS 74LS04, IC74LS32

4.3 Procedure:
A) Verify the function table for 74LS153 as given below.

B) Prepare the truth table for the given three variable function.
Implement it using IC74LS153 and verify its truth table.
C) Prepare the truth table for the given four variable function and reduce it by
LSB method. Implement it using IC 74LS153 and verify its truth table.

4.4 Design and Implementation

A) Pin Diagram and Function Table of IC74LS153

i) Pin Diagram

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ii) Function Table

Select Inputs Data Inputs Strobe Output

B A C0 C1 C2 C3 G Y

B) Implementation of F(C,B,A ) =∑m (1,2,4,6)

i) Truth table

C B A Output

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ii) Logic Diagram

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4.5 Conclusion:
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EXPERIMENT NO: 05

TITLE OF EXPERIMENT : Study of Counter ICs :74LS90

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 Lab Manual –Digital System Design Course S. Y. B. Tech.

EXPERIMENT NO.5

5.1 Aim: Design and implement MOD N and MOD-NN counter using IC 74LS90
and draw timing diagram.

5.2 Apparatus: Digital Trainer kit, patch cords, IC74LS90, IC74LS08

5.3 Procedure:

A. Verify the function table of IC74LS90 as given below.

B. Implementation of MOD N & MOD-NN using IC 74LS90
i) Connect the circuit as shown in logic diagram for Mod N Counter and
observe the count value on application of clock pulse. Also draw the
timing waveforms.
ii) Connect the circuit as shown in logic diagram for Mod- NN Counter
and observe the count value an application of clock pulse. Also draw the
timing waveforms.

5.4 Design and Implementation

A. Pin diagram and Function Table of IC74LS90

i) Pin Diagram

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ii) Function table of IC 74LS90

Reset inputs Outputs

Ro(1) Ro(2) R9(1) R9(2) QD QC QB QA

C. Implementation of Mod N and Mod-NN counter using IC 74LS90

Mod N:-

i) Truth table

No of clk Outputs
pulses

QD QC QB QA

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ii) Logic Diagram

Mod NN:

i) Logic Diagram

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5.5 Conclusion:
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EXPERIMENT NO: 06

TITLE OF EXPERIMENT : Study of Counter ICs 74LS93

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 Lab Manual –Digital System Design Course S. Y. B. Tech.

EXPERIMENT NO. 6

6.1 Aim: Design and implement MOD N and MOD-NN counter using IC74LS93 and
draw timing diagram.

6.2 Apparatus: Digital Trainer kit, patch cords, IC74LS93, IC74LS08

6.3 Procedure:

A. Verify the function table of IC74LS93 as given below.

B. Implementation of MOD N & MOD-NN using IC 74LS93
i) Connect the circuit as shown in logic diagram for Mod N Counter and
observe the count value on application of clock pulse. Also draw the
timing waveforms.
ii) Connect the circuit as shown in logic diagram for Mod- NN Counter
and observe the count value an application of clock pulse. Also draw the
timing waveforms.

6.4 Design and Implementation

A. Pin diagram and Function Table of IC74LS93

i) Pin Diagram

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ii) Function table of IC 74LS93

Reset inputs Outputs

Ro(1) Ro(2) QD QC QB QA

D. Implementation of Mod N and Mod-NN counter using IC 74LS90

Mod N:

i) Truth table

No.of clk Outputs

pulses

QD QC QB QA

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ii) Logic Diagram

Mod NN:
i) Logic Diagram

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6.5 Conclusion:
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EXPERIMENT NO: 07

TITLE OF EXPERIMENT : Study of Shift Register (74HC194) as

Pulse train generator

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 Lab Manual –Digital System Design Course S. Y. B. Tech.

EXPERIMENT NO.8

7.1 Aim: Design and implement pulse train generator using IC74HC194/
IC74LS95 (Use right shift/ left shift)

7.2 Apparatus: Digital Trainer kit, patch cords, IC74HC194, IC4069, IC4075

7.3 Procedure:

A. Verify the function table for IC74HC194 as given below.

B. Prepare the state table and logic diagram to generate given sequence.
Connect the circuit as shown in the logic diagram for pulse train
generator.

7.4 Design and Implementation

A. Pin diagram and function table of IC74HC194

i) Pin Diagram

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i) Function table of IC74HC194

Operating Inputs Outputs

mode MR S1 So DSR DSL Dn Q0 Q1 Q2 Q3

B. Implementation of pulse train generator

i) State table

No. of clk Q0 Q1 Q2 Q3 DSR

pulses

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ii) Design

iii) Logic diagram

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7.5 Conclusion:
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EXPERIMENT NO: 08

TITLE OF EXPERIMENT : Design and Simulate Combinational

Circuit using EDA tool

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 Lab Manual –Digital System Design Course S. Y. B. Tech.

8.1 Aim: Design and simulate Combinational Circuit using EDA tool

8.2 Apparatus: Computer, EDA tool

8.3 Procedure:

A. Design the circuit in EDA tool.

B. Simulate and verify its output.

8.4 Circuit Diagram

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8.5 Conclusion:

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EXPERIMENT NO: 9

TITLE OF EXPERIMENT : Design and Simulate Sequential Circuit

using EDA tool

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9.1 Aim: Design and simulate Sequential Circuit using EDA tool

9.2 Apparatus: Computer, EDA tool

9.3 Procedure:

A. Design the circuit in EDA tool.

B. Simulate and verify its output.

9.4 Circuit Diagram

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9.5 Conclusion:

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