Mapping Siemens

Mapping

Contents
1 Mapping of a 140 Mbit/s Signal into the STM-1 3
1.1 "Mapping" of a 140 Mbit/s Signal to the Container C-4 4
1.2 Interleaving of the C-4 into the STM-1 10
2 Mapping of a 34 Mbit/s Signal to the Container C-3 17
2.1 3 x 34 Mbit/s -> STM-1 18
2.2 Interleaving of Three C-3 into the VC-4 25
2.3 Creation of the Tributary Unit 3 (TU3) 26
2.4 Creation of the Tributary Unit Group 3 (TUG-3) 27
2.5 Interleaving of TUG-3 into VC-4 28
2.6 Interleaving of the VC-4 into the STM-1 29
3 Mapping of a 2 Mbit/s Signal to STM-1 31
3.1 "Mapping" of a 2 Mbit/s Signal to the Container C-12 32
3.2 Creating a VC-12 Frame 34
3.3 Creating the Tributary Unit TU-12 35
3.4 Creation of the Tributary Unit Group TUG-2 36
3.5 Creation of a Tributary Unit Group TUG-3 37
3.6 Interleaving of TUG-3 into a Virtual Container VC-4 38
3.7 Interleaving of the VC-4 into the STM-1 39
3.8 Creation of a VC-12 Multiframe 41
3.9 Numbering of TU-12s in a VC 4 44
3.10 Creating Tributary Units 46
4 Mapping of ATM Cells into the STM-1 47
4.1 ATM Characteristics 50

TT2500EU04TT_0002
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 Siemens Mapping

4.2 Transmission of ATM Cells in SDH 55

4.3 "Mapping" of ATM Cells to the Container C-4 56
4.4 Interleaving the C-4 into the STM-1 58
5 Concatenation of Payloads 63
5.1 Introduction 64
5.2 Contiguous Concatenation of Payloads 65
5.3 Virtual Concatenation of Payloads 66
6 Summary 71
7 Exercise 79
8 Solution 83

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Mapping Siemens

1 Mapping of a 140 Mbit/s Signal into

the STM-1

9 bytes 261 bytes

SOH

PTR
C4

SOH

260 bytes
POH

Fig. 1

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 Siemens Mapping

1.1 "Mapping" of a 140 Mbit/s Signal to the

Container C-4
Prior to its transmission in the STM-1 frame, the 140 Mbit/s PDH signal is interleaved
into a container C-4. The position of the signal bits in the container is exactly defined.
The term "mapping" describes this fixed bit arrangement.
The size of the container C-4 amounts to 2340 byte. For a better understanding, a
two-dimensional representation of the container is shown below (9 x 260):
A C-4 is provided as network-synchronous transmission capacity every 125 µs.
A comparison of the number of possible, usable bits per container C-4
® 260 byte x 9 = 2340 byte x 8 = 18720 bit

4 TT2500EU04TT_0002
Mapping Siemens

260 bytes

9 bytes C4

Fig. 2

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TT2500EU04TT_0002
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 Siemens Mapping

and the number of bits (nominal bit rate: 139,264 Mbit) actually to be transmitted per
container
® 139,264 Mbit/s : 8000 Hz = 17408 bit ,
reveals an over-capacity of the C-4.

6 TT2500EU04TT_0002
Mapping Siemens

over-
capacity

140
Mbit/s

Real relation of usable bits

and over capacity

Fig. 3

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TT2500EU04TT_0002
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 Siemens Mapping

Beside the pure tributary information bits (140 Mbit/s) the following bits are
transmitted in the container C-4:
l fixed justification bits and bytes (approximate clock alignment
l justification opportunity bits (positive justification for precise clock alignment)
l justification control bits (justification information bits)
l overhead bits (no function specified)

140 Mbit/s in C-4

The 140-Mbit/s plesiochronous signal is aligned to the C-4 container bit rate through
bit-by-bit positive justification. 1 justification opportunity bit and 5 justification control
bits are provided per container row. The exact mapping of these bits in the container
is shown in fig. 5.

8 TT2500EU04TT_0002
Mapping Siemens

270 bytes
9 261 bytes

AU-4 STM-1
3 SOH 1 byte 13 bytes

J1 C 4 VC-4
1 AU-4 PTR
B3
C2
G1
5 SOH F2
H4
F3
K3
N1

VC-4 POH
20 blocks of 13 bytes

Fig. 4 Plesiochronous 139,264-kbit/s signal in VC-4 VC-4 block structure

1 12 bytes

POH W 96 I X 96 I Y 96 I Y 96 I Y 96 I

X 96 I Y 96 I Y 96 I Y 96 I X 96 I

Y 96 I Y 96 I Y 96 I X 96 I Y 96 I

Y 96 I Y 96 I X 96 I Y 96 I Z 96 I

I information bit
W =IIIIIIII Y = RRRRRRRR R fixed stuff
O Overhead bit (without function)
S justification opportunity bit
= CRRRRROO = I I I I I I SR (positive justification)
X z
C justification control bits

Fig. 5 Plesiochronous 139,264 k-bit/s signal in VC-4 1 VC-4 row

TT2500EU04TT_0002
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 Siemens Mapping

The C-4 container has a total transmission capacity of 260 x 9 x 8 bits/125 s. A

capacity of 2080 bits is available per container row.
The 140-Mbit/s signal has a nominal bit rate of 139.264 Mbit/s, corresponding to
17408 bit/125 µs. This, results in 1934.222 bits per signal container row. The C-4
container provides 1934 I-bits and 1 stuffable bit per row for transmission of this
useful information. Each row further contains 5 stuff check bits as well as overhead
and fixed stuff bits and bytes respectively.

1.2 Interleaving of the C-4 into the STM-1

In order to transmit the container C-4 in the STM-1, container-specific supplementing
must be effected:
1. Addition of the Path OverHead (POH)
The VC-4 includes a "Path OverHead" (POH) with a size of 9 byte.

10 TT2500EU04TT_0002
Mapping Siemens

1 byte
260 bytes

P
9
O C4
H

Fig. 6

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TT2500EU04TT_0002
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 Siemens Mapping

Additional Information about Path:

The route which a container and its overhead take through the SDH network is also
called "path".
The path is defined by the operator. At the beginning of the path, every container is
assigned a trace, which can be checked at the end of the path.
The block resulting from the container C-4 and the POH is called
Virtual Container 4 = VC-4.

12 TT2500EU04TT_0002
Mapping Siemens

PDH2

Path #2
Container
PDH1 PDH2

Path #1
SDH

PDH1

Fig. 7

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TT2500EU04TT_0002
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 Siemens Mapping

2. Addition of the Pointer (PTR)

There is a floating embedding of the Virtual Container VC-4 into the STM-1 frame of
the payload. Part of the Virtual Container VC-4 is transmitted in one STM-1 frame,
and another part in the next frame.

14 TT2500EU04TT_0002
Mapping Siemens

9 bytes 261 bytes

SOH
Payload
PTR
P
SOH O
H
VC 4
SOH

PTR

SOH
Payload

Fig. 8

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TT2500EU04TT_0002
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 Siemens Mapping

The Pointer (PTR) indicates the start of the Virtual Container (VC-4) in the payload.
That component of the STM-1, inside which the VC-4 is able to "float" and which is
made up of PTR and payload , is designated
Administrated Unit 4 = AU-4

9 261
The AU-4 Pointer is abbreviated AU-4 PTR.

AU-4 PTR Payload 9

3. Addition of the Section OverHead (SOH) 270

3 SOH
In order to complete the STM-1 frame, the
Section OverHead (SOH) is added to the AU-4. AU-4
5 SOH

16 TT2500EU04TT_0002
Mapping Siemens

2 Mapping of a 34 Mbit/s Signal to the

Container C-3

TT2500EU04TT_0002
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 Siemens Mapping

2.1 3 x 34 Mbit/s -> STM-1

SOH

PTR 34 Mbit/s 34 Mbit/s 34 Mbit/s

#1 #2 #3

SOH

Fig. 9

Prior to its transmission in the STM-1 frame, the 34 Mbit/s PDH signal is interleaved
into a container C-3 (=Mapping).
The size of the container C-3 amounts to 756 byte. For a better understanding, a two-
dimensional representation of the container is shown below (9 x 84):
A C-3 is provided as network-synchronous transmission capacity every 125 µs.

A comparison of the number of possible, usable bits per container C-3

® 9 byte x 84 =756 byte x 8 = 6048 bit

84

9 C-3

and the number of bits (nominal bit rate: 34,368 Mbit/s) actually to be transmitted per
container
® 34,368 Mbit/s: 8000 Hz = 4296 bit
reveals an over-capacity of the container C-3!

18 TT2500EU04TT_0002
Mapping Siemens

6048 bit
(C-3)

over-capacity
4296 bit
C-3 (34 Mbit/s signal)
9

84

Fig. 10

The reason for the over-capacity is a recommendation by ITU-T specifying that the
transmission of a 44, 736 Mbit/s signal (ANSI) must also be carried out in the
container C-3.
= 44, 736 Mbit/s: 8000 Hz = 5593 bit .

TT2500EU04TT_0002
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 Siemens Mapping

6048 bit
overall capacity
of the C-3

over-capacity 5593 bit

of the 44 Mbit/s
signal (ANSI)

Fig. 11

When considering the number of payload bits per STM-1 frame

® 9 byte x 261 x 8 = 18720 bit,
it emerges that only three C-3 (3 x 6048 bit) at maximum can be transmitted per
STM-1 frame => this means only 3 x 34 Mbit/s instead of the 4 x 34 Mbit/s which can
be transmitted in a 140 Mbit/s PDH signal.

20 TT2500EU04TT_0002
Mapping Siemens

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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

TT2500EU04TT_0002
21
 Siemens Mapping

Beside the pure tributary information bits (34 Mbit/s)! the following bits are
transmitted in the container C-3:
l fixed justification bits and bytes (approximate clock alignment)
l justification opportunity bits (positive/negative justification for precise clock
alignment)
l justification control bits (indicate whether there is a positive, negative, or no
justification)
l overhead bits (no function specified)

34 Mbit/s in C-3
The positive/zero/negative justification method is used for transmission of the 34
Mbit/s plesiochronous signal in the C-3 container. For this purpose 2 justification
opportunity bits within 3 container rows are provided (fig. 13).

22 TT2500EU04TT_0002
Mapping Siemens

J1

B3 T1 3 rows

C2

G1 VC-3
F2 T2 3 rows

H4

F3

K3 T3 3 rows

N1
1 125 ms
84 bytes

VC-3 POH

Fig. 12 Plesiochronous 34,368 kbit/s signal in VC-3 Block structure

1 3 1 3

3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I

3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I

3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I 3x8 I AB 8I

= RRRRRRRS1 S2I I I I I I I
= RRRRRRRR
A B

= RRRRRRC1 C2

Fig. 13 Plesiochronous 34,368-kbit/s signal in VC-3 3 rows of the VC-3

TT2500EU04TT_0002
23
 Siemens Mapping

Three C-3 container rows at a time provide 2016 bits for transmission. These bits
comprise 1431 I-bits, 2 justification opportunity bits, 2 x 5 justification control bits as
well as overhead and fixed stuff bits. The 34 Mbit/s signal has a nominal bit rate of
34,368 Mbit/s. 1432 bits must thus be transmitted per 3 C-3 container rows. The
1431 I-bits in the container are used up by the incoming signal at the nominal bit rate.
One justification opportunity bit must permanently be used as an I-bit. One
justification opportunity bit is transmitted as a justification bit (without information).
However, if the bit rate of the incoming signal is below the nominal value, the second
s-bit (an I-bit in the nominal case) must also be stuffed if necessary (positive
justification).
If the bit rate of the incoming signal exceeds the nominal value, the first S-bit (a
justification bit in the nominal case) is used as an I-bit if required (negative
justification).

24 TT2500EU04TT_0002
Mapping Siemens

2.2 Interleaving of Three C-3 into the VC-4

The transmission of three C-3 in the STM-1 requires some container-specific
supplementing to be effected for every C-3.

85

9 C-3 VC-3

VC-3 POH

Fig. 14

TT2500EU04TT_0002
25
 Siemens Mapping

2.3 Creation of the Tributary Unit 3 (TU3)

Every C-3 receives a "Path OverHead" (POH) with a size of 9 byte. The block
resulting from the C-3 and POH is termed Virtual Container-3 = VC-3.
Every Virtual Container VC-3 (=LOWER ORDER VC) is assigned a 3-byte Pointer
PTR, which allows the VC-3 to float. The area in which the VC-3 can float with the aid
of the Pointer PTR is called Tributary Unit 3 = TU-3. The 3-byte pointer in the TU-3
is called TU-3 Pointer. The PTR contains an address which indicates the start of the
VC-3 in the TU-3.

86

TU-3 PTR

TU-3

VC3

Fig. 15

26 TT2500EU04TT_0002
Mapping Siemens

2.4 Creation of the Tributary Unit Group 3 (TUG-3)

A Tributary Unit TU-3 is always supplemented with six fixed justification bytes
which do not contain any information. The block resulting from the TU-3 and the
fixed justification bytes is called Tributary Unit Group 3 = TUG-3.

86

TU-3 PTR

TUG-3

VC-3

justification bytes

Fig. 16

TT2500EU04TT_0002
27
 Siemens Mapping

2.5 Interleaving of TUG-3 into VC-4

The three resulting TUG-3 (#1, #2 and #3) are byte-interleaved into a Virtual
Container VC-4 (=HIGHER ORDER VC ).
To adjust the three byte-interleaved TUG-3 to the VC-4 it is necessary to add two
columns of fixed justification bytes.

86

9 #1 #2 #3 TUG-3

1 2

P
9 O VC-4
H

261

fixed justification bytes

Fig. 17

28 TT2500EU04TT_0002
Mapping Siemens

2.6 Interleaving of the VC-4 into the STM-1

The Virtual Container VC-4 is transmitted directly in the STM-1 frame (Payload).
In this case, the pointer (PTR) embedded in the STM-1 frame contains an address
indicating the beginning of the VC-4 in the payload.
That component of the STM-1, inside which the VC-4 can "float" and which
comprises the two blocks PTR and Payload is designated
Administrative Unit 4 = AU-4.
In the AU-4, the pointer is abbreviated AU-4 PTR.

9 bytes 261 bytes

SOH
Payload
PTR

P
SOH O
H
VC 4
SOH

PTR

SOH
Payload

Fig. 18

TT2500EU04TT_0002
29
 Siemens Mapping

To supplement the STM-1 frame, the Section OverHead (SOH) is added to the
AU-4.

270

3 SOH

AU-4
5 SOH

Fig. 19

30 TT2500EU04TT_0002
Mapping Siemens

3 Mapping of a 2 Mbit/s Signal to STM-1

63 x 2 Mbit/s -> STM-1

STM-1

#1 #2 #62 #63
SOH

PTR

SOH 2 Mbit/s 2 Mbit/s 2 Mbit/s 2 Mbit/s

Fig. 20

TT2500EU04TT_0002
31
 Siemens Mapping

3.1 "Mapping" of a 2 Mbit/s Signal to the

Container C-12
Prior to its transmission in the STM-1 frame, the 2 Mbit/s PDH signal is interleaved
into a container C-12 (=Mapping).
The size of the container C-12 amounts to 34 byte. For a better understanding, you
can find a two-dimensional representation of the container below:

C-12

Fig. 21

32 TT2500EU04TT_0002
Mapping Siemens

A comparison of the number of possible, usable bits per container C-12

® = 34 byte x 8 = 272 bit
and the number of bits (nominal bit rate: 2,048 Mbit/s) actually to be transported per
container
® 2,048 Mbit/s: 8000 Hz = 256 bit,
reveals an over-capacity of the container C-12.
Beside the pure tributary information bits (2 Mbit/s),
the following bits are transmitted in the container C-12:
l fixed justification bits and bytes (approximate clock alignment)
l justification opportunity bits (positive/negative justification for precise clock
alignment)
l justification control bits (indicates whether there is a positive, negative or no
justification)
l overhead bits (no function specified)

4 272 bit
(C-12)
over-capacity

C-12 256 bit

(2 Mbit/s
9 signal)

Fig. 22

TT2500EU04TT_0002
33
 Siemens Mapping

3.2 Creating a VC-12 Frame

In order to transmit 63 containers C-12 (with an own 2 Mbit/s signal in each case) in
the STM-1 frame, container-specific supplementing is necessary for every C-12.
A "Path OverHead" (POH) with the size of 1 byte is added to every C-12. The
function of these bytes will be explained in chapter 6.
A VC-12 is provided as network-synchronous transmission capacity every 125 µs.

VC-12

POH (V5, J2, N2, K4)

9

Fig. 23

34 TT2500EU04TT_0002
Mapping Siemens

3.3 Creating the Tributary Unit TU-12

Pointer

(V1,V2,V3,V4)

TU-12

Fig. 24

TT2500EU04TT_0002
35
 Siemens Mapping

3.4 Creation of the Tributary Unit Group TUG-2

Three TU-12 (= 3 x 2 Mbit/s signals) from different multiframe TU-12 are multiplexed
byte-by-byte to form a "Tributary Unit Group-2" (TUG-2).
For a better understanding, again a two-dimensional representation of a TU-12 partial
fame will be shown.

TU-12
4

9 TUG-2

12

Pointer
Fig. 25

36 TT2500EU04TT_0002
Mapping Siemens

3.5 Creation of a Tributary Unit Group TUG-3

In a next step, seven TUG-2 (=21 x 2 Mbit/s signals) are combined to form a TUG-3,
i.e. byte-interleaved.

#1 #2 #3

9 TU-12

#1 #2 #7 TUG-2

12

NPI

21 9 TUG-3

86

fixed justification bytes

Pointer

Fig. 26

TT2500EU04TT_0002
37
 Siemens Mapping

3.6 Interleaving of TUG-3 into a Virtual

Container VC-4
The three resulting TUG-3 (#1 #2 and #3) are byte-interleaved into a
Virtual Container VC-4 (=HIGHER ORDER VC).

86

9 #1 #2 #3 TUG-3

1 2

P
9 O VC-4
H

261

fixed justification bytes

Fig. 27

38 TT2500EU04TT_0002
Mapping Siemens

3.7 Interleaving of the VC-4 into the STM-1

The Virtual Container VC-4 is transmitted directly in the STM-1 frame (Payload).
In this case, the pointer (PTR) embedded in the STM-1 frame contains an address
indicating the beginning of the VC-4 in the payload.

270

9 261

SOH
AU-4
AU-4 PTR
9
J1
SOH B3
C2
G1 125 ms
F2
SOH H4
VC-4
F3
AU-4 PTR K3
9 N1
SOH J1
B3

Fig. 28

TT2500EU04TT_0002
39
 Siemens Mapping

That component of the STM-1, inside which the VC-4 can "float" and which
comprises the two blocks PTR and Payload is designated
Administrative Unit 4 = AU-4.
In the AU-4, the pointer is abbreviated AU-4 PTR.
To supplement the STM-1 frame, the Section OverHead (SOH) is added to
the AU-4 .

270

3 SOH

AU-4
5 SOH

Fig. 29

40 TT2500EU04TT_0002
Mapping Siemens

3.8 Creation of a VC-12 Multiframe

In order to transmit 63 containers C-12 (with an own 2 Mbit/s signal in each case) in
the STM-1 frame, container-specific supplementing is necessary for every C-12.
A "Path OverHead" (POH) with the size of 1 byte is added to every C-12.
The function of these bytes will be explained in chapter 6
There can be f o u r different POH bytes for one C-12:

Caution: A multiframe VC-12 is transmitted via f o u r or f i v e STM-1 frames!

V5 J2 N2 K4
#1 #2 #3 #4

Every C-12 contains one of these POH bytes in each V5

35
C-12 125µs
case, which are assigned alternately, i.e. each of byte
these POH bytes is repeated every 500 µs (= 4 x
J2
125µs). 35
C-12 125µs
The combination of a container C-12 and a byte
POH byte, is called: 500µs
N2
Virtual Container VC - 12. 35 C-12 125µs
byte
The block resulting form 4 x C-12 and the POH (V5,
J2, N2, K4) is called: K4
35
Multiframe VC-12. C-12 125µs
byte

Fig. 30

TT2500EU04TT_0002
41
 Siemens Mapping

TU-12 frame
VC-12 frame
V1
V5
RRRRRRRR
35 32 bytes 35

RRRRRRRR
J2 V2
C1, C2, O O O O R R
35 32 bytes V5
35
RRRRRRRR
140 N2
bytes C1, C2, O O O O R R V3 144
35 32 bytes
RRRRRRRR J2
K4 35
C1, C2, R R R R R S1
S2 I I I I I I I
35 V4
31 bytes
RRRRRRRR N2 35
500 µs

500 µs

I= Information bit
R= Fixed stuff
S= Justification opportunity bit
C= Justification control bits
Fig. 31 Plesiochronous 2Mbit/s mapping

When a byte-synchronous 2Mbit/s signal is transmitted, the individual 64-kbit/s

channels occupy exactly one byte for each channel in the STM 1 frame. Hence after
the interpretation of the individual pointer levels, it is possible to access a 64-kbit/s
directly, irrespective of the transmission mode. However, two pointers must be
evaluated the AU and the TU pointers.

42 TT2500EU04TT_0002
Mapping Siemens

Floating Mode
V5
P1 P0 R R R R R R
R*
Channels 1 - 15
Channels 31/TS16
Channels 16 - 30
R
J2
P1 P0 R R R R R R
R*
Channels 1 - 15
Byte Synchronous Mapping
Channels 31/TS16 of a 2Mbit/s
Channels 16 - 30
140 R
bytes Z6
P1 P0 R R R R R R
R*
Channels 1 - 15
Channels 31/TS16
Channels 16 - 30
R
Z7
P1 P0 R R R R R R
R*
Channels 1 - 15 R* May be used for time slot 0 if required
Channels 31/TS16
P1 P0 = 11 at the end of the signaling frame
Channels 16 - 30
on the 1st byte of the signaling frame
R
500 ms

Fig. 32

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

TT2500EU04TT_0002
43
 Siemens Mapping

3.9 Numbering of TU-12s in a VC 4

Each TUG-2 can comprise three TU-12s which shall be numbered #1 to #3 (#K)
Thus any TU-12 can be allocated a two-figure address in the form #L, #M, where L
designates the TUG-2 number (1 to 7) and M designates the TU-12 number (1 to 3).
Thus TU-12 #1 (1, 1) resides in columns 10, 73, 136 and 199 of the VC-4, and TU-12
#2(7, 3) resides in columns 71, 134, 197 and 260 of the VC-4. A full listing of the
location of the TU-12 columns with the VC-4 frame follows
NOTE – The Time Slot number contained in the diagrams below should not be
interpreted as the tributary port number, as the time slots and port numbers
are independent from each other. It is only during configuration of the
equipment that port are assigned an time slot.
An external tributary signal may be assigned to a particular payload capacity using a
connection function.
For example at the VC-12 level,
– Tributary #1 – TU-12 (1, 1, 1)
– Tributary #2 – TU-12 (1, 1, 2)
– Tributary #3 – TU-12 (1, 1, 3)
– Tributary #4 – TU-12 (1, 2, 1)
l
l
l
– Tributary #63 – TU-12 (3, 7, 3)

44 TT2500EU04TT_0002
Mapping Siemens

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 256 258 260 VC-4

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 257 259 261 Column
number
V 1 2 3 4 5 6 7 8 9 101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263 1 585960616263
C Time Slot
4 Number

P
O 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 1 1 2 3 1 2 3 K
H 1 1 1 2 2 2 3 3 3 4 4 4 5 5 5 6 6 6 7 7 7 1 1 1 2 2 2 3 3 3 4 4 4 5 5 5 6 6 6 7 7 7 1 1 1 2 2 2 3 3 3 4 4 4 5 5 5 6 6 6 7 7 7 0 6 6 6 7 7 7 L Address
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 0 3 3 3 3 3 3 M
T1518140-95

TU-12 numbering scheme

Note an err or in the original Standards

The KLM value should be... Can you guess?
_ _ _

Fig. 33

TU-12 address TU-12 column number TU-12 address TU-12 column number TU-12 address TU-12 column number

K L M 1 2 3 4 2 1 1 11 74 137 200 3 5 3 66 129 192 255

1 1 10 73 136 199 2 1 2 32 95 158 221 3 6 1 27 90 153 216
1 2 31 94 157 220 2 1 3 53 116 179 242 3 6 2 48 111 174 237
1 3 52 115 178 241 2 2 1 14 77 140 203 3 6 3 69 132 195 258
2 1 13 76 139 202 2 2 2 35 98 161 224 3 7 1 30 93 156 219
2 2 34 97 160 223 2 2 3 56 119 182 245 3 7 2 51 114 177 240
2 3 55 118 181 244 2 3 1 17 80 143 206 3 7 3 72 135 198 261
3 1 16 79 142 205 2 3 2 38 101 164 227
3 2 37 100 163 226
2 3 3 59 122 185 248
3 3 58 121 184 247
2 4 1 20 83 146 209
4 1 19 82 145 208
2 4 2 41 104 167 230
4 2 40 103 166 229
2 4 3 62 125 188 251
4 3 61 124 187 250
2 5 1 23 86 149 212
5 1 22 85 148 211
2 5 2 44 107 170 233
5 2 43 106 169 232
2 5 3 65 128 191 254
5 3 64 127 190 253
2 6 1 26 89 152 215
6 1 25 88 151 214
2 6 2 47 110 173 236
6 2 46 109 172 135
2 6 3 68 131 194 257
6 3 67 130 193 256
2 7 1 29 92 155 218
7 1 28 91 154 217
2 7 2 50 113 176 239 Relationship between TU 12 addresses and the
7 2 49 112 175 238
7 3 70 133 196 259
2 7 3 71 134 197 260 location of columms in a VC 4 container
3 1 1 12 75 138 201
3 1 2 33 96 159 222
3 1 3 54 117 180 243
3 2 1 15 78 141 204
3 2 2 36 99 162 225
3 2 3 57 120 183 246
3 3 1 18 81 144 207
3 3 2 39 102 165 228
3 3 3 60 123 186 249
3 4 1 21 84 147 210
3 4 2 42 105 168 231
3 4 3 63 126 189 252
3 5 1 24 87 150 213

Fig. 34

TT2500EU04TT_0002
45
 Siemens Mapping

3.10 Creating Tributary Units

That component, inside which the multiframe VC-12 can "float" with the aid of a
pointer, is termed multiframe TU-12. The four pointer bytes also count as part of the
multiframe TU-12. Every 125 µs one pointer byte is transmitted, i.e. the transmission
of the complete pointer takes 500 µs.
Three TU-12 (= 3 x 2 Mbit/s signals) from different multiframe TU-12 are multiplexed
byte-by-byte to form a "Tributary Unit Group-2" (TUG-2) .
In a next step, seven TUG-2 (=21 x 2 Mbit/s signals) are combined to form a TUG-3,
i.e. byte-interleaved.
The three resulting TUG-3 (#1 #2 and #3) are byte-interleaved into a
Virtual Container VC-4 (=HIGHER ORDER VC ) and so on (see 3.6).

The first two pointer bytes contain an address

pointing to the start of the multiframe VC-12 .

Fig. 35

46 TT2500EU04TT_0002
Mapping Siemens

4 Mapping of ATM Cells into the STM-1

ATM Cells -> STM-1

STM-1

SOH

The Path of ATM Cells to the STM-1 PTR

ATM Cells

SOH

Fig. 36

TT2500EU04TT_0002
47
 Siemens Mapping

Basic Structure and Contents of an ATM Cell

To account for the rapidly increasing need for broadband services and applications
(e.g. video conferences, multimedia etc.), the pieces of information are no longer
transported and switched through via channels with a defined structure, but in the
form of short packets with a constant length (= Asynchronous Transfer Mode - cells).

48 5

An ATM cell consists of HEADER (length: 5 bytes)

and PAYLOAD (length: 48 bytes).

payload header

Fig. 37

48 TT2500EU04TT_0002
Mapping Siemens

The tributary information, which normally comes in continuously:

l constant bit rates 64 kbit/s
2 Mbit/s
34 Mbit/s
l data packets
l variable bit rates

is written into the PAYLOAD bit by bit and supplemented by the HEADER.

Fig. 38

TT2500EU04TT_0002
49
 Siemens Mapping

4.1 ATM Characteristics

Until now „synchronous time-division multiplex methods“ (cf. narrowband ISDN) or
packet-oriented multiplex methods (e.g. in conformity with X.25) were used to assign
band width to the connections within the framework of the existing transmission
capacity.

Although the time-division multiplex method, also known as „asynchronous transfer

mode“ (ATM), used in modern telephone networks is ideally suited for signals with
constant bit rates (e.g. PCM-coded speech), but not suited at all if a variable band
width is required.
On the other hand, the conventional handshaking packet-oriented methods (X.25)
are flexible in terms of the throughput per connection, but are unsuitable for the
communication of constant bit-rate signals because of the propagation times (e.g.
speech or video signals); furthermore, the conventional protocols are designed only
for bit rates up to approx. 2 Mbit/s.
Therefore, a new approach was made with B-ISDN known as the „asynchronous
transfer mode (ATM)“. This mode is a packet-oriented, non-handshaking multiplex
mode. The ATM principle is bit-rate-independent and may basically be employed for
any digital transmission path which is sufficiently free of errors.
The ATM method is so simple that the user packets can be conveyed purely by
hardware (table-controlled) after a software-controlled call setup and not by slow
software as in current packet networks. This makes ATM as efficient as the STM
method and far superior to conventional packet-oriented methods (e.g. X.25).
Current international standards envisage the transport bit rates 155 and 622 Mbit/s
for ATM. Due to these high rates and the hardware-controlled switching, the delay
times (otherwise typical for packet methods) are significantly reduced. Thus ATM
seems suitable for all information types: both for fixed and variable bit rate signals
and for packet-oriented signals.
However the flexibility of ATM is balanced by increased complexity. Thanks to
advances in modern microtechnology, however, system costs do not increase in line
with module complexity (gateway total). Otherwise, ATM would stand no chance
when competing with the more inflexible and hence less complex STM.

50 TT2500EU04TT_0002
Mapping Siemens

ATM Cell Transmission direction

48 5

payload
48 octets

Cell head
(5 octets)
8 1 3 16 8 4

HEC VCI VPI GFC

CLP PLT

CLP cell loss priority (1 bit) PLT payload type (3 bit)

GFC generic flow control (4 bit) VCI virtual channel identifier (16 bit)
HEC header error control 8 bit VPI virtual path identifier (8 bit)
Fig. 39

TT2500EU04TT_0002
51
 Siemens Mapping

With ATM, fixed-length packets known as „cells“ are continuously transmitted in

every transmission section (fig. 1).
These cells consist of 48 octets for payload and a 5-octet cell head. If no payload is
to be transmitted, specially labeled blank cells are sent.
ATM allows connections with any net bit rate. The latter is very low if almost no
information cells are being sent, but approaches the transport bit rate (approx. 130
Mbit/s for 155-Mbit/s transport bit rate) if information cells are being sent almost
exclusively. By a label in the cell head each cell is assigned to a specific virtual
transmission path (short form: path) and to a (virtual) channel routed in this path. This
principle allows the capacity of the transmission sections in the entire ATM network to
be flexibly allocated to narrowband and broadband connections in any desired
combination.
The ATM network functions trunk-oriented, i.e. it retains the cell sequence for every
connection. When the connection is set up the network user notifies the network of
the desired bit rate via a (virtual) signaling channel; the network subsequently
reserves the appropriate band width on all transmission paths. Should a user exceed
the agreed bit rate on a connection, the network detects this at the network input and
takes precautions against possible overload, e.g. by ignoring excess cells.
With ATM, a very simple protocol is used. The protocol works without
acknowledgements, flow control or error correction. This results in a rapid, service-
independent basis switching service. Further performance features can be added, if
necessary, in more advanced protocol levels. Section-by-section error correction can
be omitted due to the high quality of the digital and optical transmission techniques
employed in the network.
Correspondingly, the structure of the cell head is simple fig. 1 shows the cell structure
defined by CCITT for the user-network interface. The essential elements in the cell
head are the "virtual path identifier" (VPI; 8 bits) and the "virtual channel identifier"
(VCI; 16 bits). Together VIP and VCI provide for the unambiguous assignment of a
cell to a virtual connection on a section-by-section basis.

52 TT2500EU04TT_0002
Mapping Siemens

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TT2500EU04TT_0002
53
 Siemens Mapping

The field "payload type" (PLT: 3 bits) is used to differentiate useful cells and blank
cells. The field "cell loss priority" (CLP: 1 bit) is used to differentiate the cells the loss
of which is more or less acceptable. The field "header error control" (HEC: 8 bits) is
used to protect the cell head against transmission errors. Finally, the field "generic
flow control" (GFC: 4 bits) is only relevant in the subscriber area and is discussed for
flow control in the case of multiple access of terminal equipment in the subscriber
area. This field is not significant network-internally; its place in the cell head is
therefore used network-internally to extend the virtual path identifier (to 12 bits).
Like all packet-oriented methods ATM has several peculiarities when compared to
STM. Apart from the conventional bit errors in the information, entire cells can be lost
in ATM. However, the probability that this actually happens is low (e.g. 10-8).
Possible causes are, for example, incorrigible errors in the cell head or overflow of
network-internal queues which have to be established at every multiplex point in the
network due to the statistical multiplex principle.
Further peculiarities relate to the runtime. The procedure used means that in an ATM
network the end-to-end runtime for cells will be lower than in a narrowband ISDN. A
considerable "packeting time" may arise for filling the ATM cells, however, particularly
with lower bit rates. This packeting time arises whenever the information appears at
the source as continuous signal (as is the case with most computer applications)
rather than in packet form. The packeting time for PCM-coded speech (64 kbit/s) is
as much as 6 ms. Thanks to the low runtime in the ATM network, this delay hardly
disturbs speech quality as long as no additional packeting procedures arise through
transitions to STM networks. Special measures such as the use of echo suppressor
equipment, guarantee the standard high speech quality in such cases.
Finally, unlike in STM, statistical runtime fluctuations (delay jitter) arise in ATM due to
the intra-network queues. In the case of continuous signals (e.g. speech) the receiver
must balance fluctuations through an anticipated delay.

54 TT2500EU04TT_0002
Mapping Siemens

4.2 Transmission of ATM Cells in SDH

9 261

3 SOH
STM-1
1 AU-4 PTR

5 SOH
VC-4

3 SOH

1 AU-4 PTR

5 SOH

VC-4 POH

ATM Cell

53 octets

Fig. 40

TT2500EU04TT_0002
55
 Siemens Mapping

4.3 "Mapping" of ATM Cells to the Container C-4

Prior to their transmission in the STM-1 frame, the ATM cells are interleaved into the
container C-4 (= Mapping).

The size of the container C-4 amounts to 2340 byte and is

shown in a two-dimensional representation (9 x 260):

Fig. 41

56 TT2500EU04TT_0002
Mapping Siemens

C-4 C-4 C-4

ATM 125 µs 125 µs 125 µs
cells

9
ATM
cells

260

Fig. 42

A C- 4 is provided every 125 µs as network-synchronous transmission capacity.

A comparison between the number of possible, usable bits per container C-4
® 260 byte x 9 = 2340 byte
and the number of ATM cells to be transmitted per C-4
® 2340 byte: 53 byte = 44,15
reveals that an ATM cell can also be transmitted via two C-4.

TT2500EU04TT_0002
57
 Siemens Mapping

4.4 Interleaving the C-4 into the STM-1

In order to transmit the container C-4 in the STM-1, container-specific supplementing
is necessary:
1) The C-4 receives a "Path OverHead" (POH) with a size of 9 byte.
The block resulting from the C-4 and POH is called Virtual Container-4 = VC-4.

1 260

9
POH C-4

Fig. 43

58 TT2500EU04TT_0002
Mapping Siemens

2) There is a "floating" embedding of the Virtual Container VC-4 to the STM-1frame

of the payload. Part of the VC-4 is transmitted in one STM-1 frame, and another
part in the next frame.
The pointer indicates the start of the Virtual Containers (VC-4) in the payload.
NOTE Where there is a need to carry an ATM signal greater than 140Mbit/s
such as a 600Mbit/s, then it is carried in an STM 4 frame as shown below.
This signal has its 1st VC 4 with a normal AU4 pointer, and the other 3
AU4's have concatenated pointers.

4 x9 4x261

SOH
Payload
PTR

SOH Frame 1

SOH VC-4 1 norm al VC-4 2 ,3,4,conca tena ted

PTR Frame 2

SOH

Fig. 44

TT2500EU04TT_0002
59
 Siemens Mapping

That component of the STM-1, inside which a VC-4 is able to "float" and which
consists of the blocks PTR and payload, is termed Administrative Unit 4 = AU-4.
In the AU-4 there is an AU-4 Pointer abbreviated by AU-4 PTR.

9 261

AU-4 PTR Payload 9

Fig. 45

60 TT2500EU04TT_0002
Mapping Siemens

3) To complete the STM-1 or STM 4 frame, the Section OverHead (SOH) is added
to the AU-4.

270

3
SOH

AU-4
5 SOH

Fig. 46

TT2500EU04TT_0002
61
 Siemens Mapping

62 TT2500EU04TT_0002
Mapping Siemens

5 Concatenation of Payloads

TT2500EU04TT_0002
63
 Siemens Mapping

5.1 Introduction
There is an increasing need to have ultra high capacity interfaces which require
several 155Mbit/s channels in today's Data applications.
Therefore if we can transmit data in one channel rather than several individual
channels, then we would have better utilization of the available channel bandwidth.
This would also prove to be a much less expensive solution for our customers.

These large channels are called "Clear Channels". Concatenation is the merger of
multiple channels (say 155Mbit/s) into one large Clear Channel.
There are TWO distinct methods of CONCATENATION
1.CONTIGUOUS CONCATENATION
2.VIRTUAL CONCATENATION

An example of where this feature is used is when there is a requirement to carry IP

packets over the SDH network.
This is a detailed subject which is not covered in this course.
For further reading, an introduction, in the form of a tutorial, can be found in the
Appendix of this training manual. Please take some time later to read this as it gives
good background information on this topic.

64 TT2500EU04TT_0002
Mapping Siemens

5.2 Contiguous Concatenation of Payloads

To illustrate the form of concatenation we will use the concatenation of VC4's initially,
then describe the TU 2's
AU4's can be concatenated to form and AU4 Xc which can transport payloads
requiring greater than one Container 4 capacity.
The concatenation indication is used so that the multi container VC4 Xc payload
should be kept together, and is part of the VC 4 pointer. The X indicates the number
of VC 4 concatenated, e.g. VC 4 4c means 4 VC 4 concatenated i.e. capacity of
599.040 Mbit/s.
The first AU 4 of an AU4 Xc has the normal range of pointer values. All subsequent
AU 4 within the AU4 Xc will have their pointer set to Concatenation Indication (CI)
"1001" in bits 1 to 4, with bits 5 & 6 unspecified, and the 10 bit decimal pointer values
will have all 1's.
The CI indicates that the pointer processors will perform the same operations as
performed on the first AU4 of the AU4 Xc.
Recommendation G707 also describes the contiguous concatenation of TU 2 in VC3.
The term VC 2mc is used where "m" indicates the number of concatenated Tu 2's
carried.
The first TU 2 of an TU 2mc has the normal range of pointer values. All subsequent
Tu 2's within the TU 2 mc will have their pointer set to Concatenation Indication (CI)
"1001" in bits 1 to 4, with bits 5 & 6 unspecified, and the 10 bit decimal pointer values
will have all 1's.
The CI indicates that the pointer processors will perform the same operations as
performed on the first TU2 of the TU 2mc.

TT2500EU04TT_0002
65
 Siemens Mapping

5.3 Virtual Concatenation of Payloads

The standard G707 describes the use of Virtual Concatenation of TU 2 payloads
only. The Virtual Concatenation of VC 4 payloads is understudy, however, it is
expected that the process will remain the same.

This method of concatenation has been initially developed for the transport of a
single VC 2 mc, m times TU 2 without the use of CI of the pointer bytes. This method
only requires the path termination equipment to provide concatenation functions.
Virtual Concatenation requires that all TU signals to be concatenated at the origin of
the path are to have the same pointer value. These TU's are then carried in one VC4.
When the VC4 is then terminated, all the concatenated TU's must be passed
unaltered from one interface to another and remain within the VC4 with their time
sequence unchanged.
With Virtual Concatenation the available capacity is lower than that for a Contiguous
Concatenation, therefore, care should be taken to base the required capacity of VC
2mc's to the lower value to allowed the interconnections of both types of
concatenation. The reasons for this is because Virtual concatenations need a
separate POH for every VC 2 whereas contiguous concatenation only requires a
POH for the first VC signal. Byte stuffing techniques are used to fill up the spare
capacity in the Contiguously concatenated TU 2mc.

66 TT2500EU04TT_0002
Mapping Siemens

RSOH RSOH
1 x VC-4-4c 4 x VC-4
MSOH MSOH

Fig. 47 Two methods of concatenation

TT2500EU04TT_0002
67
 Siemens Mapping

Four VC-4 Payloads are Contiguously Concatenated

to a Single VC-4-4c Payload

RSOH RSOH
4 x VC-4 1 x VC-4-4c
MSOH MSOH

POH #1 POH #1

POH #2 XXXX

X X X

4 x AU-4 POH #3 1 x AU-4-4c XXXX

Pointers Pointer

XXXX
POH #4

Fig. 48

68 TT2500EU04TT_0002
Mapping Siemens

x1 x1
STM-256 AUG-256 AU-4-256c VC-4-256c C-4-256c

x4

x1 x1
STM-64 AUG-64 AU-4-64c VC-4-64c C-4-64c

x4

x1 x1
AU-4-16c VC-4-16c C-4-16c
STM-16 AUG-16

x4

x1 x1
AU-4-4c VC-4-4c C-4-4c
STM-4 AUG-4

x4

x1 x1 C-4
STM-1 AUG-1 AU-4 VC-4
x3
x1
TU-3 VC-3
x3 TUG-3

x1 AU-3 VC-3 C-3

STM-0
x7
x7
x1
TU-2 VC-2 C-2
TUG-2
Pointer processing x3
VC-12 C-12
Multiplexing TU-12
x4
Aligning

Mapping TU-11 VC-11 C-11

Fig. 49

The diagram above shows the following:

1. The normal multiplex structure that has been already introduced.
2. The STM 0 multiplex structure are used Radio Relay products, such as:
l SRT1S
l SRA1S.
3. The concatenated multiplex structure, also it can be seen that an STM
4/16/64/256 can carry both concatenated and non-concatenated signals.

TT2500EU04TT_0002
69
 Siemens Mapping

70 TT2500EU04TT_0002
Mapping Siemens

6 Summary

TT2500EU04TT_0002
71
 Siemens Mapping

In the SDH, containers with a fixed transmission capacity are provided every 125 µs.

Container PDH Signal (CEPT)

C-4 140 Mbit/s

C-3 34 Mbit/s

C-12 2 Mbit/s

Fig. 50

72 TT2500EU04TT_0002
Mapping Siemens

Container-Terminology (140 Mbit/s/ATM Cells)

The incorporation of the 140 Mbits/s signals/ATM cells into the STM-1 is performed
as follows:

+POH +AU-4 PTR +SOH

140 Mbit/s
C-4 VC-4 AU-4 STM-1
ATM cells

C-4 Container Multiplex Hierarchy level 4

POH Path OverHead of VC-4
VC-4 Virtual Container Multiplex Hierarchy level 4
AU-4 PTR Administrative Unit-4 Pointer
AU-4 Administrative Unit-4
SOH Section OverHead
STM-1 Synchronous Transport Module -1
Fig. 51

TT2500EU04TT_0002
73
 Siemens Mapping

Container-Terminology (34 Mbit/s)

The interleaving of the three 34 Mbits/s signals into the STM-1 looks like this :

+POH +TU-3 PTR +6 fixed

justific. bytes
34 Mbit/s
C-3 VC-3 TU-3 TUG-3 +AU-4 PTR +SOH
34 Mbit/s
C-3 VC-3 TU-3 TUG-3 VC-4 AU-4 STM-1
34 Mbit/s
C-3 VC-3 TU-3 TUG-3

C-3 Container of level 3

POH Path OverHead of theVC-3
VC-3 Virtual Container of multiplex level 3
TU-3 PTR Tributary Unit-3 Pointer
TU-3 Tributary Unit-3
TUG-3 Tributary Unit Group-3
VC-4 Virtual Container of level 4 (Higher Order VC)
AU-4 PTR Administrative Unit-4 Pointer
AU-4 Administrative Unit-4
SOH Section OverHead
STM-1 Synchronous Transport Module -1
Fig. 52

74 TT2500EU04TT_0002
Mapping Siemens

Container-Terminology (2 Mbit/s)
The interleaving of the 63 x 2 Mbit/s signals to the STM-1 looks like this:

+POH +TU-12 PTR

2 Mbit/s
C-12 VC-12 TU-12 x7 x3 +AU-4 PTR +SOH
2 Mbit/s
C-12 VC-12 TU-12 TUG-2 TUG-3 VC-4 AU-4 STM-1
2 Mbit/s
C-12 VC-12 TU-12

C-12 Container level 1 (2 Mbit/s)

POH Path OverHead of VC-12
VC-12 Virtual Container level 1 (Lower Order VC)
TU-12 PTR Tributary Unit-12 Pointer
TU-12 Tributary Unit-12
TUG-2 Tributary Unit Group-2
TUG-3 Tributary Unit Group-3
VC-4 Virtual Container level 4 (Higher Order VC)
AU-4 PTR Administrative Unit-4 Pointer
AU-4 Administrative Unit-4
SOH Section OverHead
STM-1 Synchronous Transport Module -1
Fig. 53

TT2500EU04TT_0002
75
 Siemens Mapping

The following PDH signals can be transmitted in a VC-4.

140 Mbit/s 34 Mbit/s 2 Mbit/s

1* -- --
-- 3* --
-- 2 21
-- 1 42
-- -- 63 *

*) in the tutorial you will learn only about the options marked with an asterisk

Fig. 54

76 TT2500EU04TT_0002
Mapping Siemens

Synchronous Digital Hierarchy accord. to ETSI

PDH
SDH 139.264 Mbit/s
C-4
STM-1 AU-4 VC-4

155.52 Mbit/s
34.368 Mbit/s
TUG-3 TU-3 VC-3 C-3

2.048 Mbit/s
TUG-2 TU-12 VC-12 C-12

Multiplexing (byte-by-byte)
Mapping
Aligning with pointer processing

Fig. 55

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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

TT2500EU04TT_0002
77
 Siemens Mapping

78 TT2500EU04TT_0002
Mapping Siemens

7 Exercise

TT2500EU04TT_0002
79
 Siemens Mapping

80 TT2500EU04TT_0002
Mapping Siemens

Exercise

Fill in the missing components of the STM-1 signal in order to complete the mapping
function.

140 Mbit/s
C-4 VC-4 AU-4 STM-1
ATM cells

34 Mbit/s
C-3 VC-3 TU-3 TUG-3
34 Mbit/s
C-3 VC-3 TU-3 TUG-3 VC-4 AU-4 STM-1
34 Mbit/s
C-3 VC-3 TU-3 TUG-3

2 Mbit/s
C-12 VC-12 TU-12 7x 3x
2 Mbit/s
C-12 VC-12 TU-12 TUG-2 TUG-3 VC-4 AU-4 STM-1
2 Mbit/s
C-12 VC-12 TU-12

TT2500EU04TT_0002
81
 Siemens Mapping

82 TT2500EU04TT_0002
Mapping Siemens

8 Solution

TT2500EU04TT_0002
83
 Siemens Mapping

84 TT2500EU04TT_0002
Mapping Siemens

Solution

+POH +AU-4 PTR +SOH

140 Mbit/s
C-4 VC-4 AU-4 STM-1
ATM cells

+6 fixed
+POH +TU-3 PTR justific. bytes
34 Mbit/s
+AU-4 PTR +SOH
C-3 VC-3 TU-3 TUG-3
34 Mbit/s
C-3 VC-3 TU-3 TUG-3 VC-4 AU-4 STM-1
34 Mbit/s
C-3 VC-3 TU-3 TUG-3

+POH +TU-12 PTR

2 Mbit/s
+AU-4 PTR + SOH
C-12 VC-12 TU-12 7x 3x
2 Mbit/s
C-12 VC-12 TU-12 TUG-2 TUG-3 VC-4 AU-4 STM-1
2 Mbit/s
C-12 VC-12 TU-12

TT2500EU04TT_0002
85
 Siemens Mapping

86 TT2500EU04TT_0002