Microwave Device Term

Project

Flip Chip Technology

2005/6/16
Kim Dong Hwan
School of Electrical Engineering and
Computer Science
Seoul National University, Korea
Flip Chip Technology MDCL EE SNU
 Contents
• Introduction

• Wire Bonding vs. Flip Chip

interconnect

• Flip Chip Process (SSB & MSB)

• Conclusion

Flip Chip Technology MDCL EE SNU

 Introduction
• Advancements in the packaging of semiconductor devices
 traditionally use wire bonds to provide the interconnect from
device to substrate or to other devices
• Along with the rapid advances in microwave and millimeter
wave subsystem development
 a growing interest concerning chip interconnection
techniques has developed.
• The importance of quality of these interconnects
 a large impact on the performance of the entire subsystem,
especially at high frequencies.
• Flip chip offers advantages over traditional interconnect
schemes.
 A smaller overall footprints, better thermal heat transfer
Flip Chip Technology MDCL EE SNU
 • Introduction

• Wire Bonding vs. Flip Chip

interconnect

• Flip Chip Process (SSB & MSB)

• Conclusion

Flip Chip Technology MDCL EE SNU

 Wire Bonding

Bond ribbon

[Coplanar Waveguide Model]

Wire
length
loss

Flip Chip Technology MDCL EE SNU

 Flip Chip Interconnection
Compared to the Bond Wire

MMIC(2mm 50Ω CPW line) Small

Big
CPW

Bump
Motherboar
d on 20Ω -
cm Si wafer
[Flip Chip Interconnection
[EM-Simulation Structure for RF test] of Coplanar MMIC]
Measured
0 Simulated
0
Transmission Loss [dB]

-10
Return Loss [dB]

-5

-20

-10
-30

-40
0 20 40 60 80 100
-15 [Gold(Stud) Bumps attached]
Flip Chip Technology
Freq [GHz] MDCL EE SNU
Ref. Songsub Song
 Flip Chip Interconnection

Bump Height ≥ Spacing

☞ The influence of substrate surface -> negligible

{Bump height ≥ Ground to ground spacing of the transmission lines}

Flip Chip Technology MDCL EE SNU

 Flip Chip Interconnection
Flip Chip Interconnection Versus Wire Bonding

Insertion loss
Return loss

Beyond 100GHz → Below

0.5dB

Flip Chip Technology MDCL EE SNU

 Proximity Effect in Flip-Chip
Structure

 50 Ω CPW (D= 80µ m)

MMIC or

Change in Z0 ( % )
 Alumina substrate
Device

Height of flip-chip
bump (air-gap) ~ 3 % change at
20 µ m
D

Motherboard

Air gap (µ m)

[ E-field distribution for a flip-chip [ Change rate of characteristic impedance as a function

mounted CPW MMIC ] of air-gap for a flip-chip mounted CPW MMIC ]

Ref. Sangsub Song, “The Flip-Chip Mounted MMIC Technology using the
Modified MCM-D Substrate for Compact and Low-Cost W-band Transceivers”
Flip Chip Technology MDCL EE SNU
 Why Flip Chip
Technology?
µ - CPW
strip MMIC ~ 650
Wire MMIC µ m
-Bonding
Ground

Via Flip-Chip
Bump
50 ~ 100
µ m
[ Wire-Bonding Technology ] [ Flip-Chip Bonding Technology ]

 Advantages of Flip Chip Bonging

Technology.
 Short Interconnection Length  Better Electrical Performances
 High reproducibility  High Yield & Less Tuning
 Compact size  High Packaging density
 Passive components are made in dielectric substrate such as alumina
Ceramics, SiO2 and BCB  Low Cost
Flip Chip Technology MDCL EE SNU
 Comparison
Flip Chip Wire
Technology Bonding
Technology
• High density • Mature Technology
Advantages • High performance • Infrastructure exists
• Noise control • Flexible for new devices
• Thin profile • Flexible for new bonding
• Area array technology patterns
• Small device foot prints
• Self alignment

• Additional Equipment • Additional Equipment

Disadvantag • Additional processes • Additional processes
es • Rework after encapsulation is • Rework is difficult
difficult • I/O limitation
• Die shrink

Flip Chip Technology MDCL EE SNU

 • Introduction

• Wire Bonding vs. Flip Chip

interconnect

• Flip Chip Process (SSB & MSB)

• Conclusion

Flip Chip Technology MDCL EE SNU

 Stud Bump Bonding
Technology

[Cross-sectional SEM photograph

of the bonding portion by SBB]
[Process flow of the SBB]
Flip Chip Technology MDCL EE SNU
 Micro Bump Bonding
Technology

-To cure the resin

[Cross-sectional SEM photograph

of the bonding portion by MBB]
[Process flow of the MBB]
☞ Further requirements for miniaturization
and higher frequency operation
Flip Chip Technology MDCL EE SNU
 Conclusion
• The need for smaller packaging

[Wire connection] [Flip Chip Bump Connection]

– Flip chip interconnect process → more compact fashion

• Improved electrical performance

– Reduced interconnect length → lower inductance and reduced signal loss
→ lower power requirements

• The demands of high frequency applications

– Limitation of the wire interconnect → flip-chip bump connection

Flip Chip Technology MDCL EE SNU

 References
[1] Mark S. Hauhe, “Flip Chip Technology Vendor Overview,”
[2] R. Sturdivant, “Reducing the effects of the mounting substrate on the
performance of GaAs MMIC flip chips,” in Proc. 1995 Int. Microwave Theory
Tech. Symp. Dig., Orlando, FL, May 1995, pp. 1591-1594.
[3] Hideki Kusamitsu, et al., “The Flip-Chip Bump Interconnection for Millimeter
Wave GaAs MMIC,” IEEE Transactions on Electronics Packaging Manufact-
uring, VOL. 22, NO .1, January 1999.
[4] T. Krems, et al., “Millimeter-Wave Performance of Chip Interconnections Using
Wire Bonding and Flip Chip,” IEEE MTT-S Digest. pp. 247-250.
[5] Hiroyuki Sakai., “High Frequency Flip-Chip Bonding Technologies and Their
Application to Microwave/Millimeter-wave ICs,” IEICE TRANS. Electron., VOL.
E81-C, NO. 6 June 1998.
[6] Kiyomitsu Onodera, et al., “Novel Flip-Chip Bonding Technology for W-Band
Interconnections Using Alternate Lead-Free Solder Bumps,” IEEE Microwave
and Wireless Components Letters, VOL.12, NO. 10, October 2002.
[7] Sangsub Song, “The Flip-Chip Mounted MMIC Technology using the Modified
MCM-D Substrate for Compact and Low-Cost W-band Transceivers” IEEE IMS
2005. Microwave Application Seminars.

Flip Chip Technology MDCL EE SNU

 Thank you !

Flip Chip Technology MDCL EE SNU