P2003BDG Niko-Sem: N-Channel Logic Level Enhancement Mode Field Effect Transistor

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N-Channel Logic Level Enhancement P2003BDG

NIKO-SEM TO-252 (DPAK)


Mode Field Effect Transistor
Lead-Free

D
PRODUCT SUMMARY
V(BR)DSS RDS(ON) ID 1. GATE
2. DRAIN
25 20mΩ 35A G
3. SOURCE

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)


PARAMETERS/TEST CONDITIONS SYMBOL LIMITS UNITS
Gate-Source Voltage VGS ±20 V
TC = 25 °C 35
Continuous Drain Current ID
TC = 100 °C 25
1
A
Pulsed Drain Current IDM 120
Avalanche Current IAR 15
Avalanche Energy L = 0.133mH EAS 15
2
mJ
Repetitive Avalanche Energy L = 0.05mH EAR 5.6
TC = 25 °C 50
Power Dissipation PD W
TC = 100 °C 35
Operating Junction & Storage Temperature Range Tj, Tstg -55 to 150
1
°C
Lead Temperature ( /16” from case for 10 sec.) TL 275

THERMAL RESISTANCE RATINGS


THERMAL RESISTANCE SYMBOL TYPICAL MAXIMUM UNITS
Junction-to-Case RθJC 2.5
Junction-to-Ambient RθJA 75 °C / W
Case-to-Heatsink RθCS 0.7
1
Pulse width limited by maximum junction temperature.
Duty cycle ≤ 1%
2

ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted)


LIMITS
PARAMETER SYMBOL TEST CONDITIONS UNIT
MIN TYP MAX
STATIC
Drain-Source Breakdown Voltage V(BR)DSS VGS = 0V, ID = 250µA 25
V
Gate Threshold Voltage VGS(th) VDS = VGS, ID = 250µA 1.0 1.5 3.0
Gate-Body Leakage IGSS VDS = 0V, VGS = ±20V ±250 nA
VDS = 20V, VGS = 0V 25
Zero Gate Voltage Drain Current IDSS µA
VDS = 20V, VGS = 0V, TJ = 125 °C 250

1 DEC-23-2004
N-Channel Logic Level Enhancement P2003BDG
NIKO-SEM TO-252 (DPAK)
Mode Field Effect Transistor
Lead-Free

On-State Drain Current1 ID(ON) VDS = 10V, VGS = 10V 35 A

Drain-Source On-State VGS = 4.5V, ID = 15A 23 31


RDS(ON) mΩ
Resistance1 VGS = 10V, ID = 15A 15.5 20
Forward Transconductance1 gfs VDS = 15V, ID = 30A 14 28 S
DYNAMIC
Input Capacitance Ciss 530 700
Output Capacitance Coss VGS = 0V, VDS = 25V, f = 1MHz 200 275 pF
Reverse Transfer Capacitance Crss 60 90
2
Total Gate Charge Qg 8.4 11
2 VDS = 0.5V(BR)DSS, VGS = 10V,
Gate-Source Charge Qgs 2.5 3.1 nC
Gate-Drain Charge2 Qgd ID = 15A 6.4 9.6
2
Turn-On Delay Time td(on) 6.2 9.3
Rise Time2 tr VDD = 15V 11 17
2
nS
Turn-Off Delay Time td(off) ID ≅ 15A, VGS = 10V, RGS = 12.7Ω 23 34

Fall Time2 tf 18 27
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C)
Continuous Current IS 35
A
Pulsed Current3 ISM 120
Forward Voltage1 VSD IF = IS, VGS = 0V 1.1 1.4 V
Reverse Recovery Time trr 15 18 nS
Reverse Recovery Charge Qrr 2 3 nC
1
Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2%.
2
Independent of operating temperature.
3
Pulse width limited by maximum junction temperature.

REMARK: THE PRODUCT MARKED WITH “P2003BDG”, DATE CODE or LOT #


Orders for parts with Lead-Free plating can be placed using the PXXXXXXG parts name.

2 DEC-23-2004
N-Channel Logic Level Enhancement P2003BDG
NIKO-SEM TO-252 (DPAK)
Mode Field Effect Transistor
Lead-Free

TYPICAL CHARACTERISTICS
ON-REGION CHARACTERISTIC ON- RESISTANCE VARIATION WITH DRAIN CURRENT AND GATE VOLTAGE
60 3.0
55 10.0V 5.0V
VGS = 4.0V

DRAIN - SOURCE ON - RESISTANCE


7.0V 6.0V
50 2.5
ID ,DRAIN - SOURCE CURRENT( A )

45

R DS(ON) ,NORMALIZED
4.5V
40 2.0
35 4.5V
30 5.0V
1.5
6.0V
25 7.0V
4.0V
20 1.0 10V
15
3.5V
10 0.5
5 VGS =3.0V

0 0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 10 20 30 40 50 60
VDS,DRAIN- SOURCE VOLTAGE ( V ) I D ,DRAIN CURRENT( A )

ON- RESISTANCE VARIATION WITH TEMPERATURE ON-RESISTANCE VARIATION WITH GATE-TO-SOURCE VOLTAGE
1.8 0.06
I D = 15A
ID = 15A
DRAIN - SOURCE ON - RESISTANCE

VGS= 10V
R DS(ON) ,ON-RESISTANCE(OHM)

1.6
0.05
,NORMALIZED

1.4
0.04
1.2

0.03
DS(ON)

1.0
R

TA = 125°C

0.8 0.02
TA = 25°C

0.6 0.01
-50 -25 0 25 50 75 100 125 150 175 2 6 8 10
4
Tj ,JUNCTION TEMPERATURE( °C )
VGS,GATE TO SOURCE VOLTAGE
BODY DIODE FORWARD VOLTAGE VARIATION WITH
TRANSFER CHARACTERISTICS SOURCE CURRENT AND TEMPERATURE
60 60
TA = -55°C 25°C VGS= 0V
VDS =10V
I S,REVERSE DRAIN CURRENT( A )

50 125°C 10
I D,DRAIN CURRENT( A )

TA = 125°C
40 1

25°C -55°C
30 0.1

20 0.01

10 0.001

0 0.0001
1 2 3 4 5 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4
VGS,GATE TO SOURCE VOLTAGE VSD ,BODY DIODE FORWARD VOLTAGE( V )

3 DEC-23-2004
N-Channel Logic Level Enhancement P2003BDG
NIKO-SEM TO-252 (DPAK)
Mode Field Effect Transistor
Lead-Free

GATE CHARGE CHARACTERISTICS CAPACITANCE CHARACTERISTICS


10 10000
V GS ,GATE - SOURCE VOLTAGE ( V )

I D = 15A 15V

CAPACITANCE( pF )
VDS = 5V 1000
10V Ciss
6
Coss

4
100
Crss

f = 1MHZ
VGS= 0V
0 10
0 4 8 12 16 1 5 10 15 20 25 30
Qg ,GATE CHARGE ( nC ) VDS ,DRAIN TO SOURCE VOLTAGE ( V )
SINGLEPULSE MAXIMUMPOWERDISSIPATION MAXIMUM SAFE OPERATING AREA
3
2400 SINGLE PULSE 10
Rθ = 2 .5°C/W
JC

TC = 25°C
2000
I D,DRAIN CURRENT( A )

2 35.0µS
POWER( W )

1600 10
it
n)
Lim 10

R ds(o S

1200 1m
s
10m
s
DC
1
800 10

400 VGS= 10V


SINGLE PULSE
RθJC= 2.5 °C/W
0 Tc = 25 °C
0 10 -1 0 1 2
0.01 0.1 1 10 100 1000 10 10 10 10
SINGLE PULSE TIME( SEC) VDS,DRAIN - SOURCE VOLTAGE
1
TRANSIENT THERMAL RESPONSE CURVE
10
TRANSIENT THERMAL RESISTANCE
r ( t ) ,NORMALIZED EFFECTIVE

0
D=0.5
10
0.20
0.10
-1
10
0.05
0.02
10
-2 0.01
P(pk)

t1
-3 t2
10 1.RθJC (t)=r(t)*R
2.R θJC = 2.5° C/W
Single pulse 3.T j + TC = P * R θJC (t)
t1
4.Duty Cycle,D =
-4 t2
10
-7 -6 -5 -4 -3 -2 -1 0
10 10 10 10 10 10 10 10
t1 , TIME( ms )

4 DEC-23-2004
N-Channel Logic Level Enhancement P2003BDG
NIKO-SEM TO-252 (DPAK)
Mode Field Effect Transistor
Lead-Free

TO-252 (DPAK) MECHANICAL DATA

mm mm
Dimension Dimension
Min. Typ. Max. Min. Typ. Max.

A 9.35 10.4 H 0.89 2.03

B 2.2 2.4 I 6.35 6.80

C 0.45 0.6 J 5.2 5.5

D 0.89 1.5 K 0.6 1

E 0.45 0.69 L 0.5 0.9

F 0.03 0.23 M 3.96 4.57 5.18

G 5.2 6.2 N

A
B

D
E
C

H G
L
3

M
2
J
I

5 DEC-23-2004

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