9/8/2010

S no Date Task Issue bugs

1
2
3
4
5
6
7

test ported for

K8::gh_smm_dbg1_1 c0010056 WRITE

NB_UNB_TN
added ored with
nb_client_2_5_pl
KX::dis_pci us

not fixed with t

BAADDAD: READ_RECVQ error he fix provided

16/08/2010

New bootROM
might be
screwing things 264534,
:BC:BUS_UNIT: WRITE BANK MISMATCH up 264546

BD6 checking for

KX::ext_cfg_mmio reserved fields

261819,
239654
KX::drvcomp

23/08/2010
Local-SIM::csr_f0_dual
 :BC:BUS_UNIT: WRITE BANK MISMATCH
read_recvq
KX::nb_rout_nodid_rw
KX::forspecyc

KX::mmcfg_smi_debug

1/9/2010
Local-SIM::rr_pm_rwmsrs
Local-SIM::rr_pm_ucmsrs
K8::gh_smm_dbg1_1-svm
Local-SIM::gh_ucsmi1 266314

6/9/2010
attempted to set 1 undefined option :
( HTIOB_ENABLE ).
:cWkCoreBc:RIP Mismatch On instruction =
APICINT_INIT 244478
KX::col_bcs_ecs_fn2
KX::col_bcs_ecs_fn1
KX::csr_enablecf8extcfg
Local-SIM::gr_bug_11377

20/09/2010
268582
ddr training 3 issues debugged on 265703

selftest: gh_bp_pin, pfmn_bp_pin 270033

:cWkCoreBc:RIP Mismatch On instruction =
JMP_FAR 271838

error: assertion: rndcfg exception

detected. Attempted to set
SYS.MPUxx.NB.NBCMN.NBCOR.HTC.HtcClkI
nact to Reserved value '*'

27/10/2010
:cWkCoreBc:RIP Mismatch On instruction = follow up with
JMP_FAR Larry Smith 270033
 This and others
are failing due to
selftest in
selfTest BAADC0DE: apic046a_gh, Regression on
apic047n_gh etc.. 1049 274042
selfTest BAADC0DE: apic_gh02e, fakeCPU
apic_gh02f read_pin sticky 272941
selftest BAADC0DE gh_bp_pin, BP pin don't 274031
pfmn_bp_pin toggle 274032
s_chipsim: Undefined option(s) found MSL updated

4/10/2010

Sno Task Signature Existing/New Bug Bug No.

error:
/proj/tn_rtl_rel/tn_1062/build/BuildRF_F_T
N1/fake_v_incl/mct_scoreboard.sv(1478)7
8626293:ovm_test_top.SYS.PKG00.MPU00.
nb.nbcmn.nbcor.MCT_SCOREBOARD
[rd_rsp_to_xbar_err2] Unexpected RD_RSP
1 launch to XBAR N 274867
selfTest BAADC0DE: apic046a_gh,
2 apic047n_gh etc.. E 274042

3 selfTest BAADC0DE: or9_init

4 Job Self Termination N 275348

error: assertion: rndcfg exception detected.

Too many disabled cores (*) for the
5 NVP number of actual cores (*). COREDIS*

6 NVP s_chipsim: Undefined option(s) found

7 NVP GetPattern:TestNotObtained
8 NVP selfTest BAADC0DE: Local-SIM::apic14c

error: assertion: rndcfg exception detected.

Attempted to set
SYS.MPUxx.NB.NBCMN.NBCOR.HTC.HtcClkI
9 NVP nact to Reserved value '*'

10 NVP selfTest BAADC0DE: apic021

11 BD No run Self-Test - FUSECODE : apicf03e

12 BD No run Error: undefined options found:
 Self-Test - BAADC0DE: apic014_gh,
13 NVP apic_lp0_gh N 276410

11/10/2010

Sno Task Signature Existing/New Bug Bug No.

selfTest BAADC0DE: apic102_gh,

1 NVP apic102b_gh

2 NVP selfTest BAADC0DE: nbp_intx

selfTest BAADC0DE: lp_ffix_gh, lp_frr_gh,
3 NVP lp_flp_gh_4 New 278434

error: [ category=assertion signature="%s :

Unexpected NbArrayParErr? "
cycle=101051 source=chk_nbmca.cc:1050 ]
SYS.PKG00.MPU00.NB.NBCMN.NBCOR :
4 NVP Unexpected NbArrayParErr?
5 NVP selfTest BAADC0DE: KX::apicgh08c
6 NVP selfTest BAADC0DE:apic194_gh

18/10/2010

Sno Task Signature Existing/New Bug Bug No.

1 NVP selfTest BAADC0DE: apic109a N 278758
2 NVP selfTest BAADC0DE: apic021
3 NVP selfTest BAADC0DE:apic19_4_gh
4 NVP selfTest BAADC0DE:apicf12a
5 NVP selfTest BAADC0DE:or1_diffint
6 NVP selfTest BAADC0DE:or9_init
7 NVP selfTest BAADC0DE:apicgh11a N 279883
8 NVP selfTest BAADC0DE:or2_brdcst
9 NVP Job Self Termination: apic065,071 E 279875
10 NVP Job Self Termination: cr8_1a, cr8_2a

Timeout: %s %s XDS has not shifted for %d

11 NVP NB clocks. XdsTimerStartCycle=%d. E 279875
12 NVP selfTest BAADC0DE:apic19b_gh
13 NVP selfTest BAADC0DE:apic19c_gh
14 NVP selfTest BAADC0DE:apic_lp3_gh
15 NVP selfTest BAADC0DE:apic1911d_gh
 16 NVP selfTest BAADC0DE: K8::apic14_3
17 NVP selfTest BAADC0DE: K8::apic100a

26/11/2010

Sno Task Signature Existing/New Bug Bug No.

selfTest BAADC0DE:
1 NVP cr8_3,cr8_3a,apicigne_gh, apicintr_gh N 288472
selfTest BAADC0DE: lp_feoi_gh, lp_ffix_gh,
2 NVP lp_flp_gh, lp_frr_gh N 287279

New3Test for uc coverage hole or9_init_init E 267832

Test update,
4 for uc coverage hole or9_init_250961 E 250691
New5Test, for uc coverage hole or9_init_268161 E 268161

Job self Termination, apic065, apic067a, ,

6 NVP apic068a, apic074, apic105a,105 E 266021

Job self Termination lp_flp4_gh, cr8_1

7 NVP cr8_2 N 289209

error: [ category=assertion
signature=":OVL_ASSERT:DataIn is changing
too quickly for the synchronizer"
cycle=84958 source=std_ovl_task.h:56 ]
ASSERT_NEVER:SYS.PKG00.MPU00.CPU0.cu
.futop.fufse.I_FURSN.I_NBCGaterValSync.I_
NSYNC4OR.gen_SYNCFF[0].Assert_SYNCFF.
8 NVP ovl_error_t :error E 288478

3/12/2010

Sno Task Signature Existing/New Bug Bug No.

1 NVP selfTest BAADC0DE: apinit09a E 288472

HTCOM Initialization timeout! NB Init has

not completed before %d cycles. (Do we
2 General Debug need to increase INIT_TIMEOUT? E 279896
 error:
*nbv_csr_model_csr.sv(****)********:
[mismatch on CSR NbMisc*]
(SYS.PKG**.MPUxx::NBCOR F*x**c) field
3 General Debug UcodeRstDone - expected *, got *
error: tried to generate too many random
4 General Debug numbers E 287636

5 UNB DEBUG gh_ucsmi1

6 UNB DEBUG or9_init_init

error:
OVL_NEVER:SYS.PKG00.MPU00.NB.NBONI
ON0.NCLKONION.InbWakeSSSync0.sync_m
ultibit.syncff_rand[0].Assert_SYNCFF.ovl_er
7 General Debug ror_t :error E 283013

error: <6026e29e> cycle 61080: assertion:

wa_top/libs/verif/classlib/legacy/utl_MPM
emModel.cc:8974: Illegal load result: IO
Address=0x00000000_aeec5118,
Data=0x00000000_00000000,
ByteEnable=0xf0, Locked=false,
8 NVP LoadProcessor=0

error: Timeout: No SRQ has made progress

in the last 40000 NB clocks(MPU0::entry0
Cmd:RdSized OpType:Apic Src:CPU1 Dst:D
9 UNB DEBUG SrqSt:Idle SrqWt:DnCpuWr :error

error: Stall ( COP) Detected (See

10 UNB DEBUG BridgeCode log file for more info) :error

error: Timeout: SYS.PKG00.MPU00.NB XDS

has not shifted for 30000 NB clocks.
11 UNB DEBUG XdsTimerStartCycle=342747. :error
12 UNB DEBUG Job Self-Termination Activated

VERIFICATION ERROR (FUNCTIONAL

COVERAGE) : Illegal state bin
13 UNB DEBUG coherent_remote
14 New Test apicf12b
 error: [ category=assertion
signature=:cChkCohSys:UnexpectedCmd
cycle=204634 source=mon_cci.cc:1285 ]
wa_top/_ip/bd/cu/verif/chk_coh_sys.cc:15
40 : 0/1 : Received WrDword T0
0x000089bf5424 Tag:47 Count:0+1 (APIC-
EXTCFG-IO-NC+SHR-FL+IBS-SPEC-) for
0x000089bf5400 M(0/1)

14 New Test :error

lp_flp_4 E 289209

10/12/2010

error: [ category=assertion
signature=":cLsdcCheckerWriteThru: Final
called while checker queue is not empty"
cycle=166255
source=chk_lsdc_writethru.cc:95 ] Final
called for cLsdcCheckerWriteThru while
there are 2 elements in checker queue
1 COV (SYS.PKG00.MPU00.CPU0.cl1) :error E 267832
self Test BAADCODE: apic_12b_gh,
2 UNB Debug apiclp10_gh
3 self Test BAADCODE: apic105a E 288472

error: [ category=assertion
signature=":OVL_ASSERT:Thread 1:
Unexpected microcode scenario"
cycle=166254 source=std_ovl_task.h:56 ]
ASSERT_NEVER:SYS.PKG00.MPU00.CPU0.id
.bp.bpctl.bpbsr.BPBSRRW.ChkT1UcodeSeq
1.ovl_error_t :error
4 New Test E 267832
5 UNB DEBUG self Test BAADCODE: apinit05_gh E 288472

error: Stall ( COP) Detected (See

6 UNB DEBUG BridgeCode log file for more info) :error

error: Timeout: SYS.PKG00.MPU00.NB XDS

has not shifted for 30000 NB clocks.
7 UNB/GEN DEBUG XdsTimerStartCycle=342747. :error
 error: Timeout: No SRQ has made progress
in the last 40000 NB clocks(MPU0::entry0
Cmd:RdSized OpType:Apic Src:CPU1 Dst:D
8 UNB/GEN DEBUGSrqSt:Idle SrqWt:DnCpuWr :error
self Test BAADCODE:
9 New Test apic_init_th0_rest_th1

10 UNB DEBUG self Test BAADCODE: apic_015a_gh

error: [ category=assertion
signature=:cChkCohSys:UnexpectedCmd
cycle=204634 source=mon_cci.cc:1285 ]
wa_top/_ip/bd/cu/verif/chk_coh_sys.cc:15
40 : 0/1 : Received WrDword T0
0x000089bf5424 Tag:47 Count:0+1 (APIC-
EXTCFG-IO-NC+SHR-FL+IBS-SPEC-) for
11 GEN BDG 0x000089bf5400 M(0/1) N 292428
12 UNB DEBUG self Test BAADCODE: gh_ucsmi1 E 266314

10/12/2010
self Test BAADCODE: apic014a_gh,
1 NVP apic015_gh N 295155
Job Self Termination, apdbreq_gh,
2 NVP svmhdt20

Timeout: %s %s SRQ has not shifted for %d

NB clocks. SrqTimerStartCycle=%d (entry0
3 NVP info: %s): E 288109
self Test BAADCODE:
4 New Test apic_init_th0_rest_th1
self Test BAADCODE:
5 New Test apic_startup_th0_rest_th2
self Test BAADCODE:
6 New Test apic_nmi_th0_rest_th3
self Test BAADCODE:
7 New Test apic_smi_th0_rest_th4
self Test BAADCODE:
8 New Test apic_intr_th0_rest_th5

9 NVP self Test BAADCODE: apic064_gh

10 UNB Debug self Test BAADCODE: apic059_gh

11 UNB Debug self Test BAADCODE: or2_brdcst E 288109
12 Coverage
 10/12/2010
Signature

error: [ category=assertion
signature=:cStrictDesignArray:READ_X/Z
cycle=122570 source=env_attach.cc:5573 ]
The following signal was unexpectedly read
as X or Z :
SYS.PKG00.MPU00.CPU0.cu.NB_SysDat[127
1 :64] (data=0xffffffff control=0xffffffff) :error

error: [ category=assertion
signature=:CHK_UCREQ:L2NonSpecNbRequ
estWhileProbesDisabled cycle=805177
source=chk_ucreq.sv:147 ] CU attempted
to issue a NonSpec request to northbridge,
but a probe is active, and probe handling is
2 disabled :error

error: Stall ( X86) Detected (See BridgeCode

3 log file for more info) :error E

10/1/2011

Sno Task Signature Existing/New Bug Bug No.

1 UNB debug SelfTest BAADC0DE: or1_diffint

2 UNB debug SelfTest BAADC0DE: apic194b_gh

3 UNB debug SelfTest BAADC0DE: apic047l_gh

4 UNB debug SelfTest BAADC0DE: svm_init_apic1

5 UNB debug SelfTest BAADC0DE: svm_init_apic2

10/1/2011

Sno Task Signature Existing/New Bug Bug No.

1 UNB debug Job Self-Termination Activated: svmhdt20

 OVL_ASSERT:EOI is asserted when no in-
2 UNB debug service interrupt is in ISA E 297837
:cWkCoreBc: X86 Stall Detected: tests
3 UNB debug apic071, apic105 E 296070
Suite KX requires COOLCODE:
4 UNB debug apic_smi_th0_rest_th1
SelfTest BAADC0DE: svm_init_apic1,
5 UNB debug svm_init_apic2 N 300183

6 UNB debug SelfTest BAADC0DE: or2_brdcst N 300189

Max Interrupt Latency (%ld ps) exceeded

7 UNB debug %ld ps! This violates the RTSIC spec
cWkCoreBc:KOS took VMEXIT_NPF and BD
8 UNB debug RTL did not execute pf_vmexit labe

9 UNB debug SelfTest BAADC0DE: apic082c, apicf04b

CompKosRtlADWrites AD bit write KOS

WROTE and RTL DID NOT" cycle=337510
source=utl_KosBridge.cc:1316 ]
Address:0x0_4b0c080 IsIO:0 Data:0x27
Memtype:6 (PKG0:MPU0:CPU1:CL1) :error
10 UNB debug
cWkCoreBc:RIP Mismatch On instruction =
11 UNB debug Decode

12 SelfTest BAADC0DE: apic105a

01-24-2011

Sno Task Signature Existing/New Bug Bug No.

:cWkCoreBc:RIP Mismatch On instruction =

1 GEN DBG Invalid

error: cycle *: assertion: *

*chk_pwrmgt.cc:* {Checker } Mpu *:
Voltage is increasing (vid code * to *), and
NBCOR is apparently sending * slam time to
CK (as for FastSlamVidDown). This is
indicating a configuration problem, or an
2 GEN DBG RTL problem
 error:
/proj/ip_release_ro/dvst/24/sim/models/cr
bbm_ovc/src/sv/crbbm_transaction.svh(24
9)952903625000:reporter
[crbbm_monitor] Masked rts asserted.
3 GEN DBG rts_mask = 00000000000111 rts_num = 3 E 295023
:cWkCoreBc:RIP Mismatch On instruction =
4 UNB DBG Decode
5 UNB DBG cWkCoreBc: X86 Stall Detected E 296070

6 GEN DBG :BC:BUS_UNIT: RTL WROTE KOS DID NOT E 301754

:CompKosRtlADWrites AD bit write KOS
7 GEN DBG WROTE and RTL DID NOT E 296171
cWkCoreBc:RIP Mismatch On instruction =
8 GEN DBG Decode E 296382
cWkCoreBc:KOS took VMEXIT_NPF and BD
9 GEN DBG RTL did not execute pf_vmexit labe E 271058

01-31-2011

Sno Task Signature Existing/New Bug Bug No.

Self-Test - BAADDAAD Detected
1 UNB Debug K8::apic067
 Fixed Checked

pass

pass

pass
failing again due to eoi not sent by fkcpu
Dropped
pass

pass

fixed

fixed in bd/bdb0/3256 and bd/sra0/1086

should be removed

ported and passsing

incorrect bp hook up frm SM, one more issue of BP pin

not toggeling

KOS fix for 244478 might be creating this

 Comments

MCT scorebooard, MCT monitor dependency, took care

in MSL
This and others are failing due to selftest in Regression on
1089
Invalid interrupt no. read in ISR, Micheal to clarify if KX
shell is responsible
VCS hang issue

MSL updated

Test checks for ECC/L3 error hence removed from TN

Test checks for ECC/L3 error hence removed from TN

Test ported, now passing

MSL updated
Both send secive illlegal bits are set against 110796,
Elzabeth to reply back

Test checks for ECC/L3 error hence removed from TN

Test checks for ECC error hence removed from TN
 Ivector reads are not supported by FakeCpu

Comments

Test Removed, Uses More than FKCPU's hence not

applicable for TN
Test Removed currently, need to discuss virtual intx tests
with Nishit

Fake cpu command queue not cleared

ported
Test removed
interrupt now received by fakecpu

Comments
SMIACK not sent through fake cpu
Test ported, Pass
Test ported, Pass
Test ported now fails due to mcfg issue
Test ported
Test ported, Pass
Ported
Test ported
Test ported and switch added
Switch added in MSL test passes nnow

12 tests after being ported were failing with this, added

the switch mentioned in the bug as a work around
Test ported, Pass
Test ported, Pass
Test ported, Pass
Test ported, Pass
Test Removed
Test Removed

Comments

FKCPU_DRV_TXREQ not being generated

FakeCPU command queue invalid entry out

Test covers the hole but fails due to 'unexpected uc hole
signature
Test passes and covers the hole
Test passes and covers the hole

Test Passes but due to HLTXCYC not

tried changing sim file of 'lp_flp4_gh'for one iteration

due to 287279, but fails due to fkcpu not gertting idle

check in at bd/PDVF110SyncFBranch78814/8 broke this

Comments
Test ported now failing as the second interrupt is not
being generated

HTINIT checker uses old scaling for to decide time out

hence all the LFBR=1 one cases time out before
initialization is complete
Asked Kiran to remove comments from the MSL

Fix yet to be tried

Test Now passes, due to random ordering of
smi/targetdone
test reran with build for no assertion still failing, Sanjay to
look further

`define incorrectly coded

apicf12a Test Removed

hanging in iretq, rerunning apic_12b_gh, ran with

increased time out

fakcPCU hanged in interrupt reception, rerunning

apic_11_gh

fakcPCU hanged in interrupt reception, rerunning

apic_11_gh
interrupt not generated, apic068 running

apic050 removed as it checks for apic ID's across Node

ID's Invalid for TN
Passes locally
Rerunning with debug enable for chk_coh_sys
Fix for the IDLE issue is still not working

Random scenario when the checker expected the queue

to becleared a cycle before
Tests updated to hacve sufficient time out before going to
baadcode

Tried with $assert off din't work or9_init_init.

Commented the assertions in the build and updated the
test the test fo rthe fix awailable now in:
bd/PDVF110SyncFBranch78814_Logical/13,
bd/PDVF110SyncFBranch78814/27. Test is now a part of
regression and checked in

potential deadlock situation in CCI_MASTER_DRIVER,

Bryan looking further

potential deadlock situation in CCI_MASTER_DRIVER,

Bryan looking further
Along with the above stated issue this might also be a
potential deadlock condition in fkcpu, Bryan looking
further
Test fails due to 4th interupt not getting generated,
updated the test
Test Modified to not read IRR but only ivector for fkcpu
interrupt handling

Coherence checker gets confused for stitched KXMT tests

Test passes with the fix suggested

Test passes but hangs after coolcode

apstclk_gh

Test ported for timing

Test ported for timing

Test ported for timing

Test ported for timing

Test ported for timing, now passes

Delay to be added before stpclk arrival, Test passes now

INIT/RESET value of LVT_LINT0 Mask is 0 should be one

Stop clk edge now getting cleared
Coverpoints written for simultanous apic interrupts
Comments

Memory request from BD is taking X's because of a

mismatched switch

Disable fast flush

after shutdown req is asserted to a different node

Comments
Test updated for correct logical and physical destination
ID's
Failing due to incorrect value returned by fakecpu
test updated for waiting for more time before disabling
apic_sw_en
These tests are failing due to a possible shell issue,
michael Greske hasn't replied yet
These tests are failing due to a possible shell issue,
michael Greske hasn't replied yet

Comments

Test hangs after coolcoding

This is a different issue bnut is related to this bug - SM not
firing trigger upon the event
Randomised nested paging is not supported in
KX_REINITIALIZE_MODE,
Target rIP not cpoied in ISR leading test not being able to
return to return_eip, hence failure
FKCPU Race condition, due to RECVQ to be updated with
two different tasks

increase wait for interrupt which is already delivered by

SM but not yet reached the CPU

EP_MCA_SEEN probably late

RTL going to the handlen of exception 7 instead of 6,Amol
Patil is looking into it

more wait needed between two interrupts from SM;

Comments

shell randomization caused same address for nested page

as the startup handler, updated to disable randomly
enabling nested paging

rndcfg incorrectly selecting an ALTVID value lower than

the least pstate value
Deferreed bug fixed for DVST but not checked in TN
related to SVM opcode exception, amol and team is
looking into it
SM not generating interrupt, similar to 296070

Comments

interrupt reached processor too late

 Tests CRDB/100days
Now
Local-SIM::dis_pci 3 p
KX::mmcfg_smi_debug 6
K8::gh_smm_dbg1_1 7 p
Local-SIM::gr_bug_11377 10
K8::gh_smm_dbg1_1-svm 10 p
KX::csr_enablecf8extcfg 13
KX::col_bcs_ecs_fn2 14
Local-SIM::rr_pm_rwmsrs 14 p
Local-SIM::csr_f0_dual 14 p
Local-SIM::rr_pm_ucmsrs 14
KX::drvcomp 14 p
KX::col_bcs_ecs_fn1 14
KX::forspecyc 14 p
S. no Test from CRDB Runs Status

1 K8::apicigne_gh 1 266024

2 K8::apicintr_gh 3 266024
3 K8::apicnmi_gh 3 271838, PASS
4 K8::apicsmi_gh 3 271838, PASS

5 K8::apic014_gh 3 276410

6 K8::apic014a_gh 3 276410

7 K8::apic015_gh 3 276410

8 K8::apic015a_gh 3 276410

9 K8::apic015b_gh 2 276410

10 K8::lp_ffix_gh 1 278434

11 K8::lp_ffix4_gh 2 278434

12 K8::lp_flp_gh 2 278434

13 K8::lp_flp4_gh 1 278434

14 K8::lp_frr_gh 1 278434

15 K8::apic109a 3 278758

16 K8::apic_lp0_gh 2 272941, PASS

17 K8::apic_lp5_gh 3 272941, PASS
18 KX::apic_gh02d 2 272941, PASS
19 KX::apic_gh02e 2 272941, PASS
20 KX::apic_gh02f 2 272941, PASS
21 Local-SIM::or9_init 1 PASS
22 K8::apic037 2 PASS
23 K8::apic050 2 PASS
24 K8::apic087 3 PASS
25 K8::apiclp3b_gh 2 PASS
26 K8::apicstc5 3 PASS
27 KX::apic_gh02a 3 PASS

28 K8::apic102_gh 3 REM
29 K8::apic102b_gh 3 REM
30 KX::apicf03e 2 REM

31 KX::apicgh07d 1 REM

32 KX::apicgh07e 1 REM

33 KX::apicgh07f 1 REM

34 KX::apicgh07g 1 REM

35 KX::apicgh08c 1 REM
36 KX::apicgh09d 1 REM
37 KX::mp_apicgh08d 1 REM

38 KX::nb_intx 1 REM

39 K8::apic021 2 PASS

40 KX::apicf12a 2 MAIL
41 K8::apic19_4_gh 3 PASS
42 K8::apic194b_gh 3 PASS
43 K8::apic194c_gh 2 PASS
44 K8::apic31a_gh 2 PASS

45 Local-SIM::apic067a 1 266021
46 Local-SIM::apic068 1 276540

47 Local-SIM::apic068a 1 266021
48 K8::lp_feoi_gh 1 PASS
49 K8::apdbreq_gh 3 PASS

50 K8::apic065 3 266024

51 K8::apic071 3 266024

52 K8::apic105 3 hang, DIP

53 K8::apic105a 1 276540
54 K8::apic100a 2 REM
55 K8::apic14_3 3 REM

56 K8::apinit05_gh 3 266024

57 K8::apinit09a 2 266024

58 K8::apstclk_gh 2 279875

59 K8::cr8_1a 3 PASS

60 K8::cr8_2a 3 PASS
61 K8::cr8_3 3 hang, DIP

62 K8::cr8_3a 3 PASS

63 K8::lowp_nmi 2 PASS

64 K8::svmhdt20 3 MAIL
65 KX::apic_gh02c 2
66 KX::apicgh11a 1 279883
67 Local-SIM::apic_init_th0_rest_th1 1
68 Local-SIM::apic_intr_th0_rest_th1 1
69 Local-SIM::apic_nmi_th0_rest_th1 1
70 Local-SIM::apic_smi_th0_rest_th1 1
71 Local-SIM::apic_startup_th0_rest_th1 1
72 Local-SIM::or2_brdcst 1
73 K8:: apic_lp3_gh 3 PASS
74 K8:: apic1911d_gh 1 PASS
 Details Posted Local Status Now
Test passses but halt not
detected Y N
Test passses but halt not
detected Y N
fakecpu not responding, y y
fakecpu not responding, y y
Intr Vector read is not
implemented in fakecpu
Intr Vector read is not
implemented in fakecpu
Intr Vector read is not
implemented in fakecpu
Intr Vector read is not
implemented in fakecpu
Intr Vector read is not
implemented in fakecpu
FKCPU command queue is not
cleared
FKCPU command queue is not
cleared
FKCPU command queue is not
cleared
FKCPU command queue is not
cleared
FKCPU command queue is not
cleared

SMI ACK not sent by fake CPU

ivector read not
implemented in fake cpu
on 1191 NVRPASS
on 1191 NVRPASS
on 1191 NVRPASS
on 1191 NVRPASS
Test Ported
on 1191 neverpass
1231 masterlist
1232 masterlist
1233 masterlist
on 1184 NVRPASS
on 1203 masterlist

Uses More than FKCPU's

hence not applicable for TN
Uses More than FKCPU's
hence not applicable for TN

DRAM ECC error not

supported
DRAM ECC error not
supported
DRAM ECC error not
supported
DRAM ECC error not
supported

Link overflow not supported

L3 Error not supported

LDT broadcast is required in

the test, discussed with
srinivasu before removal

send interrupts is also set for

a self IPI, against 110796,
Ported should pass now y y

Test Ported, mpmm memory

model issue, hanbing is
looking into it y y
switch added for 279875 y y
switch added for 279876 y y
switch added for 279877 y y
switch added for 279878 y y
Test passses but halt not
detected
KOS mismatch on JMP_FAR
Test passses but halt not
detected
switch added for 279878 y y
switch added for 279879 y y
Test passses but halt not
detected
Test passses but halt not
detected

interrup from SB not coming

KOS mismatch on JMP_FAR
Test exists in PD MSL, and
passing
Test passses but halt not
detected
Test passses but halt not
detected
Ported and switch added for
this bug y y

add fuseoffallextracores on

add fuseoffallextracores on

add fuseoffallextracores on

add fuseoffallextracores on

dbrdy coming b4 startup in

second iteration of the test,
Zhang is looking into it
switch added for 279875 y y
ported for TN

Test ported for TN y y

switch added for 279875 y y
ported y y