Ejercicio 3_ codificador

************************DESING. VHD*******************

--------------------------------------------------------------
-- Nombre:
-- Documento:
-- Fecha:
-- Proyecto:
--------------------------------------------------------------

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use IEEE.std_logic_unsigned.all;

entity codificador is
Port ( ent1, ent2, ent3, ent4: in STD_LOGIC;
sal0, sal1, sal2 : out STD_LOGIC
);
end codificador;

architecture Behavioral of codificador is

-- COMPONENTS
-- SIGNALS

signal entradas : STD_LOGIC_VECTOR (3 downto 0);

signal salidas : STD_LOGIC_VECTOR (2 downto 0);

begin
-- DISEÑO
entradas <= ent1 & ent2 & ent3 & ent4;

with entradas select

salidas <= "000" when "0000",
"001" when "0001",
"010" when "0010",
"011" when "0100",
"100" when "1000",
"000" when others;

sal0 <= salidas(0);

sal1 <= salidas(1);
sal2 <= salidas(2);

end Behavioral;

**********************TESTBENCH.VHD****************
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity Simulacion is
--
end Simulacion;

architecture Behavioral of Simulacion is

component codificador
Port ( ent1, ent2, ent3, ent4: in STD_LOGIC;
sal0, sal1,sal2 : out STD_LOGIC
);
end component;

-- Señales de las entradas

signal ent1 : STD_LOGIC := '0';

signal ent2 : STD_LOGIC := '0';
signal ent3 : STD_LOGIC := '0';
signal ent4 : STD_LOGIC := '0';

-- Señales de salidas

signal sal0 : STD_LOGIC;

signal sal1 : STD_LOGIC;
signal sal2 : STD_LOGIC;

begin

UO: codificador Port map (

ent1 =>ent1,
ent2 =>ent2,
ent3 =>ent3,
ent4 =>ent4,
sal0=> sal0,
sal1=> sal1,
sal2=> sal2
);

process begin
--- Estímulos de la simulación wait for 100 ns;
wait for 100 ns;

ent1 <= '0';

ent2 <= '0';
ent3 <= '0';
ent4 <= '0';
wait for 100 ns;

ent1 <= '1';

ent2 <= '0';
ent3 <= '0';
ent4 <= '0';
wait for 100 ns;

ent1 <= '0';

ent2 <= '1';
ent3 <= '0';
ent4 <= '0';
wait for 100 ns;

ent1 <= '0';

ent2 <= '0';
ent3 <= '1';
ent4 <= '0';
wait for 100 ns;

ent1 <= '0';

ent2 <= '0';
ent3 <= '0';
ent4 <= '1';
wait for 100 ns;

wait;
end process;

end Behavioral;