ECE/EEE F311 Communication Systems –

Laboratory.
Lab report

ID No 2018A3PS0474G Name: Mohit

Experiment started on: 29/09/2020
Completed on: 08/10/2020 Expt #: 6
Name of the expt.: A to D and D to A conversion, Non-Linear PCM
Steps Observation:
Step Observation
s
A1 Implement the circuit given below

Parameters for the

three sine waves are

1V at 500Hz,
1/3V at 1500Hz,
1/5V at 2500Hz

Set pulse at 1V and 10% duty cycle for pulse generator.

Set the simulation rate at 8 kHz, and set runtime for simulation as 5 msec.
A2 Set the ‘Uniform Encoder’ with the peak of 1.3V and 8-bits per sample
and Output Type as Signed Integer.
For the ‘To Workshop’ block, rename it as ‘simout’ and set to limit points to
last 100.
A3 Go the MATLAB Workshop window, and double click on simout icon, and
observe the following table.
A4 The signal to be quantised is as follows

Graph for impulse samples is given below

The output of Sample & Hold block is given below

The quantized signal is given below,

The output for quantisation error is

The output for the Encoded signal is,

 The output for Encoded signal in bits is as follows,

B1 Implement the following circuit

B2 In A-Law Compressor, set ‘Peak signal Magnitude’ as
1V, Ramp signal varies between ± 1V, starting at 0V,
at t=0
Set the simulation sample time as 1 msec , and run the simulation for 2 sec.
B3 Output for the Ramp is as follows,,

When the graph of A-compressor vs ramp input is plotted,

After passing through the A-Law compressor, the output comes out as
follows,
After passing through A-Law Expander, the output is as follows,
C1 Implement the 8-bit PCM system as given below

Parameters for input sine wave

Amplitude = 1 V
Frequency = 300 Hz

And for the Low Pass Filter

Set filter order = 8, edge frequency = 350 Hz
C2 Implement the 8-bit ADC as follows,

For Pulse Generator,

Amplitude = 1V, Period=1/8000, and 50% duty cycle.
For Uniform Encoder
Peak=1.3, bits=8
 For Integer to Bit Converter, number of bits per integer=8, treat input as
‘unsigned’.
For Repeating Sequence Stair specs,
Vector of output value=[1 2 3 4 5 6 7 8]
Sample time = 1/64000
Multiport Switch, Number of data ports

=8 Implement the 8-bit DAC, as shown in

figure,

Clock (Pulse Generator) specs,

Amplitude = 1V, Period= 1/64000, 50% duty cycle
DAC o/p sampled specs
Amplitude =1V, Period= 1/8000, 50% duty cycle.
C3 Set the stop time as 0.025 secs and run the simulation.

The following graph is input sine wave, with 1V as amplitude and

300Hz frequency.
The output of DAC is

The Mu-law graph comes out as

 And the final recovered signal is given below

Name: Mohit
Date: 08/10/2020