Chapter 4.

Data
Representation
Numbers, Arithmetic
Operations and Characters
 Computers are built using logic circuits, that
operate on information represented by 2
valued electrical signals ( 1 and 0).
 Numbers --- binary number
 Text character --- character code
Number representation
 3 major representations for representing positive
and negative numbers:
 Sign and magnitude
 One’s complement
 Two’s complement

In all 3 systems leftmost bit is 0 for positive number

1 for negative number
Positive values have identical representation in all
systems, but negative values have different
representation.
Contd..

For 4-bit representation

Sign and magnitude – negative numbers are
represented by changing most significant bit
from 0 t 1.
1’s complement- negative numbers are
obtained by complementing each bit of
corresponding positive number.
2’s complement- adding 1 to 1’s complement
of that number
 Assumptions:
4-bit machine word
16 different values can be
represented
Roughly half are positive, half are
negative
Sign and Magnitude
Representation
-7 +0
-6 11 11 00 00 +1
11 10 00 01
-5 +2 +
11 01 00 10
-4 11 00 00 11 +3 0 100 = + 4

-3 10 11 01 00 +4 1 100 = - 4
10 10 01 01
-2 +5 -
10 01 01 10
-1 10 00 01 11 +6
-0 +7
High order bit is sign: 0 = positive (or zero), 1 = negative
Three low order bits is the magnitude: 0 (000) thru 7 (111)
Number range for n bits = +/-2n-1 -1
Two representations for 0
One’s Complement
Representation
-0 +0
-1 11 11 00 00 +1
11 10 00 01
-2 +2 +
11 01 00 10
-3 11 00 00 11 +3 0 100 = + 4

-4 10 11 01 00 +4 1 011 = - 4
10 10 01 01
-5 +5 -
10 01 01 10
-6 10 00 01 11 +6
-7 +7
 Subtraction implemented by addition & 1's complement
 Still two representations of 0! This causes some problems
 Some complexities in addition
Two’s Complement
Representation
-1 +0
-2 11 11 00 00 +1
11 10 00 01
-3 +2 +
like 1's comp 11 01 00 10
except shifted -4 11 00 00 11 +3 0 100 = + 4
one position
clockwise -5 10 11 01 00 +4 1 100 = - 4
10 10 01 01
-6 +5 -
10 01 01 10
-7 10 00 01 11 +6
-8 +7

 Only one representation for 0

 One more negative number than positive
number
Binary, Signed-Integer
Representations
B Values represented

Sign and
b 3 b 2 b1 b 0 magnitude 1's complement 2's complement

0 1 1 1 +7 +7 + 7
0 1 1 0 +6 +6 + 6
0 1 0 1 +5 +5 + 5
0 1 0 0 +4 +4 + 4
0 0 1 1 +3 +3 + 3
0 0 1 0 +2 +2 + 2
0 0 0 1 +1 +1 + 1
0 0 0 0 +0 +0 + 0
1 0 0 0 - 0 -7 - 8
1 0 0 1 - 1 -6 - 7
1 0 1 0 - 2 -5 - 6
1 0 1 1 - 3 -4 - 5
1 1 0 0 - 4 -3 - 4
1 1 0 1 - 5 -2 - 3
1 1 1 0 - 6 - 1 - 2
1 1 1 1 - 7 -0 - 1

Figure 2.1. Binary, signed-integer representations.

Addition and Subtraction of
Signed Numbers
 Rules for addition and subtraction for n-bit signed numbers
using 2’s complement representation
1.To add two numbers, add their n-bit representations,
ignoring the carry-out signal from most significant bit
position. Sum will be algebraically correct in 2’s
complement as long as answer is in range -2n-1 to 2 n-1 -1
2. To subtract two numbers A - B, form 2’s complement of B
and add to A as in rule 1. Result will be algebraically
correct in 2’s complement as long as answer is in range
-2n-1 to 2 n-1 -1
Addition and Subtraction – 2’s
Complement
4 0100 -4 1100
+3 0011 + (-3) 1101
If carry-in to the high
order bit = 7 0111 -7 11001
carry-out then ignore
carry

if carry-in differs from 4 0100 -4 1100

carry-out then overflow
-3 1101 +3 0011
1 10001 -1 1111

Simpler addition scheme makes twos complement the most common

choice for integer number systems within digital systems
2’s-Complement Add and Subtract Operations

(a) 0010 ( + 2)
+ 0011 ( + 3)
0101 ( + 5) (b) 0100 ( + 4)
+ 1010 (- 6)
(c) 1011 (- 5 )
+ 1110 ( - 2) 1110 (- 2)
(d) 0111 ( + 7)
1001 ( - 7)
+ 1101 ( - 3)
(e) 1101 (- 3 ) 0100 ( + 4)
- 1001 (- 7 )
1101
+ 0111
(f) 0010 ( + 2) 0100 ( + 4)
- 0100 ( + 4)
0010
+ 1100
(g) 0110 ( + 6) 1110 ( - 2)
- 0011 ( + 3) 0110
+ 1101
0011 ( + 3)
(h) 1001 ( - 7)
- 1011 ( - 5) 1001
+ 0101
1110 ( - 2)
(i) 1001 (- 7 )
- 0001 ( + 1) 1001
+ 1111
1000 ( - 8)
(j) 0010 ( + 2) 0010
- 1101 ( - 3) + 0011
0101 ( + 5)

Figure 2.4. 2's-complement Add and Subtract operations.

Overflow in Integer Arithmetic
 When results of arithmetic operation is outside
the representable range, an arithmetic overflow
has occurred.
 Carry-out from most significant bit serves as
overflow indicator.
1. Overflow can occur only when adding 2
numbers with same sign. ( Ex: +7 and +4, -6
and -4)
2. Carry –out signal is not sufficient indicator of
overflow ( ie. Carry-out may be 0 or 1)
Overflow Conditions
0111 1000
5 0101 -7 1001
3 0011 -4 1100
-8 1000 10111
Overflow Overflow
0000 1111
5 0101 -3 1101
2 0010 -5 1011
7 0111 -8 11000
No overflow No overflow
Character Representation
 ASCII stands for the "American Standard
Code for Information Interchange".
 ASCII is a 7-bit character set containing 128
characters.
 It contains the numbers from 0-9, the upper
and lower case English letters from A to Z,
and some special characters.
Fixed and floating point
representations
 Are used to represent fractional numbers.
1. Fixed Point has a specific number of bits (or digits)
reserved for the integer part (the part to the left of the
decimal point) and a specific number of bits reserved for
the fractional part (the part to the right of the decimal
point)
Ex: IIIII.FFFFF
In a 32 bit format
MSB –Sign , Integer—15 bits, Fraction—16 bits
contd
Advantage
computers can perform integer arithmetic without
having to rely on additional hardware or software
logic. Thus increasing performance.
Disadvantage
Fixed Point Representations have a relatively
limited range of values that they can represent.
Thus reducing precision in representing
Q)How is -43.625 represented in fixed
representation using 32-bit format which
reserve 1 bit for the sign, 15 bits for the
integer part and 16 bits for the fractional part?
 Floating point- A floating point number does
not reserve a specific number of bits for the
integer part or the fractional part.
 Instead it reserves a certain number of bits
for the number (called the mantissa) and a
certain number of bits for decimal place sits
(called the exponent).
 +/- mantissa x 2exponent
Q)Suppose number is using 32-bit format:
the 1 bit sign bit, 8 bits for signed exponent,
and 23 bits for the fractional part. How is
−53.5 represented using floating point repres
entation?
-53.5=(-110101.1)2= (-1.101011)x25 , which is
represented as following below,