8086 Assembly Language

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 Program Statements
name operation operand(s) comment
• Operation is a predefined or reserved word
– mnemonic - symbolic operation code
– directive - pseudo-operation code

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• Space or tab separates initial fields
• Comments begin with semicolon
• Most assemblers are not case sensitive

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 Program Data and Storage
• Pseudo-ops to define data or reserve storage
DB - byte(s)
DW - word(s)
DD – double word(s)
DQ – quad word(s)
DT – ten byte(s)

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• These directives require one or more operands
– define memory contents
– specify amount of storage to reserve for run-time data

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 Defining Data
• Numeric data values
100 - decimal
100B - binary
100H - hexadecimal
'100' - ASCII
• Use the appropriate DEFINE directive (byte,
word, etc.)

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• A list of values creates 4 consecutive words
DW 40CH,10B,-13,0
• A ? represents an uninitialized storage location
DB 255,?,-128,'X'

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 Naming Storage Locations
• Names can be associated with storage
locations
ANum DB -4
DW 17
ONE
UNO DW 1
X DD ?
• These names are called variables

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• ANum refers to a byte storage location
• The next word has no associated name
• ONE and UNO refer to the same word
• X is an unitialized doubleword

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 Arrays
• Any consecutive storage locations of the
same size can be called an array
X DW 40CH,10B,-13,0
Y DB 'This is an array'
Z DD -109236, FFFFFFFFH, -1, 100B

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• Components of X are at X, X+2, X+4, X+8
• Components of Y are at Y, Y+1, …, Y+15
• Components of Z are at Z, Z+4, Z+8, Z+12

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 DUP
• Allows a sequence of storage locations to
be defined or reserved
• Only used as an operand of a define
directive

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DB 40 DUP (?)
DW 10h DUP (0)
DB 3 dup ("ABC")
db 4 dup(3 dup (0,1), 2 dup('$'))

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 Word Storage
• Word, double word, and quad word data are
stored in reverse byte order (in memory)
Directive Bytes in Storage
DW 256 00 01
DD 1234567H 67 45 23 01
DQ 10 0A 00 00 00 00 00 00 00
X DW 35DAh DA 35
Low byte of X is at X, high byte of X is at X+1

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 Named Constants
• Symbolic names associated with storage locations
represent addresses
• Named constants are symbols created to
represent specific values determined by an
expression

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• Named constants can be numeric or string
• Some named constants can be redefined
• No storage is allocated for these values

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 Equal Sign Directive
• name = expression
– expression must be numeric
– these symbols may be redefined at any time
maxint = 7FFFh
count = 1
DW count
count = count * 2
DW count

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 EQU Directive
• name EQU expression
– expression can be string or numeric
– Use < and > to specify a string EQU
– these symbols cannot be redefined later in the
program
sample EQU 7Fh
aString EQU <1.234>
message EQU <This is a message>

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 Data Transfer Instructions
• MOV target, source
– reg, reg
– mem, reg
– reg, mem
• Sizes of both operands must be the same

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• reg can be any non-segment register except IP
cannot be the target register
• MOV's between a segment register and memory or
a 16-bit register are possible

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 Sample MOV Instructions
b db 4Fh
w dw 2048

mov bl,dh
mov ax,w
mov ch,b
mov al,255
mov w,-100
mov b,0

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• When a variable is created with a define directive, it
is assigned a default size attribute (byte, word, etc)
• You can assign a size attribute using LABEL
LoByte LABEL BYTE
aWord DW 97F2h

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 Addresses with Displacements
b db 4Fh, 20h, 3Ch
w dw 2048, -100, 0

mov bx, w+2

mov b+1, ah
mov ah, b+5
mov dx, w-3
• Type checking is still in effect

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• The assembler computes an address based on
the expression
• NOTE: These are address computations done at
assembly time
MOV ax, b-1
will not subtract 1 from the value stored at b

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 XCHG
• XCHG target, source
– reg, reg
– reg, mem
– mem, reg
• MOV and XCHG cannot perform memory to
memory moves

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• This provides an efficient means to swap the
operands
– No temporary storage is needed
– Sorting often requires this type of operation
– This works only with the general registers

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 Arithmetic Instructions
ADD dest, source
SUB dest, source
INC dest
DEC dest
NEG dest
• Operands must be of the same size

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• source can be a general register, memory location,
or constant
• dest can be a register or memory location
– except operands cannot both be memory

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 Program Segment Structure
• Data Segments
– Storage for variables
– Variable addresses are computed as offsets from
start of this segment
• Code Segment
– contains executable instructions

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• Stack Segment
– used to set aside storage for the stack
– Stack addresses are computed as offsets into this
segment
• Segment directives
.data
.code
.stack size

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 Memory Models
• tiny: code+data <= 64K (.com program)
• small: code<=64K, data<=64K, one of each
• medium: data<=64K, one data segment
• compact: code<=64K, one code segment

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• large: multiple code and data segments
• huge: allows individual arrays to exceed 64K
• flat: no segments, 32-bit addresses, protected
mode only (80386 and higher)

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 Program Skeleton
.model small • Select a memory model
.stack 100H • Define the stack size
.data
;declarations • Declare variables
.code • Write code
main proc – organize into procedures
;code • Mark the end of the
main endp source file
;other procs – optionally, define the
end main entry point

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Introduction to 8086 assembly
 Why Assembly ?
• Assembly lets you write fast programs
– You can write programs that execute
calculations at the maximum hardware
speed…
– Assuming that you know what you’re
doing…
• Assembly is necessary for writing certain
portions of system software
– Compilers
– Operating systems
• Assembly is used to program embedded
devices and DSPs

36
 x86
• Intel/Microsoft’s monopoly: cost-effective
microprocessors for the mass market
• x86 refers to an instruction set rather than a
specific processor architecture, also known as
32 bit processor
• The processor core that implements the x86
instruction set has gone through substantial
modifications and additions over the last 20
years

38
• x86 is a Complex Instruction Set Computer
– 20,000+ instructions
• 64 instruction set is well along in displacing
x86

39
 Registers
• Registers are storage locations
• The first-level of a computer’s memory
hierarchy
• The fastest to access storage in your system
• Purposes
– Data used in arithmetic/logical operations
– Pointers to memory locations containing data or
instructions
– Control information

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X86 Registers at a Glance

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 General Purpose Registers
• Accumulator (AH,AL,AX,EAX)
– Accumulates results from mathematical
calculations
• Base (BH,BL,BX,EBX)
– Points to memory locations
• Count (CL,CH,CX,ECX)
– Counter used typically for loops
– Can be automatically incremented/decremented
• Data (DL,DH,DX,EDX)
– Data used in calculations
– Most significant bits of a 32-bit operation

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 General purpose registers
• In 80386 and newer processors General
Purpose (GP) registers can be used with a
great deal of flexibility…
• Each GP register is meant to be used for
specific purposes…
• Memorizing the names of the registers will
help you understand how to use them
• Learning how to manage your registers will
help you develop good programming practices

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 Index Registers
• SP, ESP
– Stack pointer
• BP, EBP
– Address stack memory, used to access subroutine
arguments as a stack frame mechanism
• SI, ESI, DI, EDI
– Source/Destination registers
– Point to the starting address of a string/array
– Used to manipulate strings and similar data types

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 Segment Registers
• CS
– Points to the memory area where your program’s
instructions are stored
• DS
– Points to the memory area where your program’s
data is stored
• SS
– Points to the memory area where your stack is
stored
• ES,FS,GS
– They can be used to point to additional data
segments, if necessary

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 Special Registers
• IP, EIP
– Instruction pointer, points always to the next
instruction that the processor is going to execute
– Only changed indirectly by branching instructions
• FLAG, EFLAG
– Flags register, contains individual bits set by
different operations (e.g. carry, overflow, zero)
– Used massively with branch instructions

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 x86 memory addressing modes

• Width of the address bus determines the

amount of addressable memory
• The amount of addressable memory is NOT
the amount of physical memory available in
your system
• Real mode addressing
– A throwback to the age of 8086, 20-bit
address bus, 16-bit data bus
– In real mode we can only address memory
locations 0 through 0FFFFFh. Used only with
16-bit registers

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• Protected mode addressing
– 32-bit address bus, 32-bit data bus, 32-bit
registers
– Up to 4 Gigabytes of addressable memory
– 80386 and higher operate in either real or
protected mode

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Real-mode addressing on the x86
• Memory address format Segment: Offset
• Linear address obtained by:
– Shifting segment left by 4 bits
– Adding offset
• Example: 2222:3333 Linear address: 25553
• Example: 2000:5553 Linear address: 25553
 Assembly files
1. Labels
– Variables are declared as labels pointing to
specific memory locations
– Labels mark the start of subroutines or locations
to jump to in your code
2. Instructions – cause machine code to be
generated
3. Directives – affect the operation of the
assembler
4. Comments
5. Data

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 Comments
• Denoted by semi-colons.
• Comment your code thoroughly
• It helps to figure out what you were doing
• What you were doing when you look back at
code
• Everything from the semi-colon to the end
of the line is ignored.
 Labels
• Labels are local to your file/module
• Unless you direct otherwise, the colon
identifies a label (an address!)
MyLabel:
• to make it global we say
global MyLabel
 Example with simple instructions
var1: dd 0FFh
str1: db “my dog has fleas”,10
var2: dd 0

; Here are some simple instructions

mov eax, [var1] ; notice the brackets
mov edx, str1 ; notice the not brackets
call dspmsg
jmp done
mov ebx, [var2] ; this will never happen

done: nop
 Intel 8088 (8086) Microprocessor
❑ Intel 8088 facts
20 bit address bus allow accessing VDD (5V)
1 M memory locations
16-bit internal data bus and 8-bit
external data bus. Thus, it need 20-bit
8-bit
two read (or write) operations to addre
data
read (or write) a 16-bit datum ss
control 8088 control

··
signals

···
Byte addressable and byte-swapping signals
To from
Word: 8088 8088
5A2F CLK
1800 5A High byte of
word GND
1
1800 2F Low byte of
0 word
8088 signal classification
Memory
locations 3-62
 Organization of 8088
Address bus (20
AH AL bits)
General purpose
BH BL register Σ
CH CL
Execution DH DL
Unit Data
SP CS bus
(EU) Segment
BP DS (16 bits)
register
SI SS
DI ALU Data bus ES
(16 bits)
IP

Bus
contro
ALU Instruction l External bus
EU Queue
contro
Flag register l
Bus Interface Unit
(BIU)
3-63
 General Purpose Registers
15 8 7 0
AX AH AL Accumulat
or
BX BH BL Bas
Data Group e
CX CH CL Count
er
DX DH DL Dat
a

SP Stack
Pointer
BP Base
Pointer and
Pointer
Index Group
SI Source
Index
DI Destination
Index
3-64
 Arithmetic Logic Unit (ALU)
A B F Y
n n
bits bits 0 0 0 A+B
0 0 1 A -B
Carry
0 1 0 A -1
Y= 0 ? F 0 1 1 A and B
A>B? 1 0 0 A or B
1 0 1 not A
∙ ∙ ∙ ∙ ∙ ∙
Y
Signal F control which function will be conducted by ALU.
Signal F is generated according to the current instruction.

Basic arithmetic operations: addition, subtraction, ·····

Basic logic operations: and, or, xor, shifting,·····

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 Flag Register
❑ Flag register contains information reflecting the current status of a
microprocessor. It also contains information which controls the
operation of the microprocessor.
1 0
5
⎯ NT IOPL OF DF IF TF SF ZF ⎯ AF ⎯ PF ⎯ CF

Control Flags Status Flags

IF: Interrupt enable flag CF: Carry flag

DF: Direction flag PF: Parity flag
TF: Trap flag AF: Auxiliary carry flag
ZF: Zero flag
SF: Sign flag
OF: Overflow flag
NT: Nested task flag
IOPL: Input/output privilege
level 3-66
 Instruction Machine Codes
❑ Instruction machine codes are binary numbers
For Example:
1000100011000011 MOV AL, BL
Registe
MOV
r
❑ Machine code structure
mode

Opcode Mod Operand Operand

e 1 2
Some instructions do not have operands, or have only one operand
Opcode tells what operation is to be performed.
(EU control logic generates ALU control signals according to
Opcode)
Mode indicates the type of a instruction: Register type, or Memory type
Operands tell what data should be used in the operation. Operands can
be addresses telling where to get data (or where to store results)
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 EU Operation
1. Fetch an instruction from instruction
queue AH AL General purpose
BH BL register
2. According to the instruction, EU control CH CL
logic generates control signals. DH DL
(This process is also referred to as SP
BP
instruction SI
decoding) DI ALU Data bus
3. Depending on the control signal, (16 bits)
EU performs one of the following
operations:
An arithmetic ALU
EU
operation
A logic operation contro instruction
Flag register l 101100010100101
Storing a datum into a 0
register
Moving a datum from a
register
Changing flag
register
3-68
 Generating Memory Addresses
❑ How can a 16-bit microprocessor generate 20-bit memory addresses?

Left shift 4
FFFFF
bits
16-bit 000 Addr1 +
register 0 0FFFF Segme
+ 16-bit Offse Offse nt
register t Addr (64K)
1 t
20-bit memory Segme
address nt
0000 address
0
Intel 80x86 memory address 1M memory
generation space

3-69
 Memory Segmentation
❑ A segment is a 64KB block of memory starting from any 16-byte
boundary
For example: 00000, 00010, 00020, 20000, 8CE90, and E0840 are all valid
segment addresses
The requirement of starting from 16-byte boundary is due to the 4-bit
left shifting

❑ Segment registers in BIU

1 0
5 CS Code Segment

DS Data
Segment
SS Stack Segment

ES Extra Segment

3-70
 Memory Address Calculation
❑ Segment addresses must be stored 000
Segment
in segment registers address 0
❑ Offset is derived from the combination + Offse
t
of pointer registers, the Instruction
Memory
Pointer (IP), and immediate values address
❑ Examples

CS 3 4 8 A 0 SS 5 0 0 0 0
IP + 4 2 1 4 SP + F F E 0
Instruction 3 8 A B 4 Stack 5 F F E 0
address address
DS 1 2 3 4 0
DI + 0 0 2 2
Data 1 2 3 6 2
address
3-71
 Fetching Instructions
❑ Where to fetch the next instruction?
808 Memor
8 y
CS 1 2 3
IP 4 0 0 1 1235 MOV AL, 0
2
2
1235
2
❑ Update IP
— After an instruction is fetched, Register IP is updated as follows:

IP = IP + Length of the fetched instruction

— For Example: the length of MOV AL, 0 is 2 bytes. After fetching this
instruction,
the IP is updated to 0014

3-72
 Accessing Data Memory
❑ There is a number of methods to generate the memory address when
accessing data memory. These methods are referred to as
Addressing Modes
❑ Examples:
— Direct addressing: MOV AL, [0300H]

DS 1 2 3 4 0 (assume
0 3 0 0 DS=1234H)
Memory 1 2 6 4 0
address
— Register indirect addressing: MOV AL, [SI]

DS 1 2 3 4 0 (assume
0 3 1 0 DS=1234H)
(assume
Memory 1 2 6 5 0 SI=0310H)
address
3-73
 Reserved Memory Locations
❑ Some memory locations are reserved for special purposes.
Programs should not be loaded in these areas
FFFFF
Locations from FFFF0H to FFFFFH Reset FFFF0
are used for system reset code instructio
n
area
Locations from 00000H to 003FFH
Interrup
are used for the interrupt pointer
t
table
⎯ It has 256 table pointer
⎯entries
Each table entry is 4 table
bytes 003F
256 × 4 = 1024 = memory addressing F
space 0000
From 00000H to 0
003FFH
3-74
 Interrupts
❑ An interrupt is an event that occurs while the processor is executing a program
❑ The interrupt temporarily suspends execution of the program and switch the
processor to executing a special routine (interrupt service routine)
❑ When the execution of interrupt service routine is complete, the processor
resumes the execution of the original program
❑ Interrupt classification

Hardware Interrupts Software Interrupts

⎯ Caused by activating the processor’s
interrupt control signals (NMI,
INTR)
⎯ Caused by the execution of an INT
instruction
⎯ Caused by an event which is generated
by the execution of a program, such
as division by zero

❑ 8088 can have 256 interrupts

3-75
 Minimum and Maximum Operation modes
❑ Intel 8088 (8086) has two operation modes:

Minimum Mode Maximum Mode

⎯ 8088 generates control ⎯ It needs 8288 bus controller to

signals generate
for memory and I/O control signals for memory and
⎯operations
Some functions are not ⎯I/OIt allows the use of 8087
available operations
coprocessor;
in minimum mode it also provides other functions
⎯ Compatible with
8085-based
systems

3-76
Programming samples

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