Download as doc, pdf, or txt
Download as doc, pdf, or txt
You are on page 1of 50

E3165 / UNIT 2 / 1

ARCHITECTURE OF MICROPROCESSOR

UNIT 2

OBJECTIVE:

General Objectives :

To know and understand the architecture of microprocessor.

Specific Objectives:

At the end of the unit you should be able to:

2.1 draw the block diagram of basic computer system, and describes each
of them.
2.2 describe the evolution of microprocessor.
2.3 state and describe the Data size: Nibble, Byte, Word, Long Word
2.4 explain the fetch and execute cycle
2.5 state and describe the bus system
2.6 explain the Internal structure and basic operation of a microprocessor
2.7 explain the microprocessor clock system
E3165 / UNIT 2 / 2
ARCHITECTURE OF MICROPROCESSOR

INPUT-2A

2.0 INTRODUCTION

What you know about your personal computer at home or in the office?
What are the features provided in your computer system? To know the
features of a computer, the easiest way is referring to the specification
sheet provided at the counter of most of the computer shop, or
newspaper advertisement , magazines, etc. Normally the first item in
the list is the micro-processor of the computer system, for instance,
“Intel Pentium-4 1.7G” is the micro-processor of the computer system.
The capability of processor determine the capability of the computer
system, in other word the processor is the key element or heart of a
computer system. Apart from personal computer, microprocessors are
used in many other computerized system in various field, for instance,
industrial automation. This unit will introduce you the architechure and
the construction of a microprocessor.
E3165 / UNIT 2 / 3
ARCHITECTURE OF MICROPROCESSOR

2.1 EVOLUTION OF MICROPROCESSOR.

One of the capacities of a microprocessor (P) chip is determined by


the number of bits it can handle at any one time, thus the
advancement of P chip technology directly relates to the increase of
bits of the chip. The first P chip developed by Intel was 4-bit chip. It
then be improved to 8-bit, 16-bit and so on, which comply to a simple
equation of 2n ( where n is an integer, 0,1,2…). Table 2.1 shows the
evolution of P by comparing the two most well-known P chip
manufacturers Intel and Motorolla. This table is not finite, you may
update the evolution of P with reference to the latest improvement.

Table 2.1: Evolution of microprocessor between Intel and


Motorola
Manufac INTEL MOTOROLA
-turer/
Year
1971 4004, 4 bit, 108 kHz, contains 6800, 8 bit
2300 transistors
1979 8088, 8 bit, 2 MHz, contains 29000 68000, 16 bit
transistors
1982 80286, 16 bit, 8-12 MHz, contains
80286 transistors
1985 80386, 32 bit, 16-20 MHz, contains
275000 transistors
1989 80486, 32 bit, 25-66 MHz, contains
1.2 million transistors
1993 Pentium, 64 bit, 60-166 MHz,
contains 3.1 million transistors
1997 Pentium II, 300 MHz
:
:

Figure 2.1 compares the Intel and Motorola P in a graphical form.


You can see clearly when was a model be developed and the
equivalent series of its counterpart from the other manufacturer. Some
model had improved version, which is indicated with a branch line.
For instance, Intel 8086 had improved version named 8088 and
80186, while at the same time, the later model 80286 was developed.
E3165 / UNIT 2 / 4
ARCHITECTURE OF MICROPROCESSOR

1970
4004
8008

8080 6800
1975

8085

8086
6809
1980 8088 68000

80188 80286
68010
80186 68008 68012
68020
80386
1985
68030
80386SX
80486 68040
1990

Pentium
68060
1995

Figure 2.1 Evolution of Microprocessor between Intel and Motorola


(Source: Muhammad Mu’nim, Asas Organisasi Sistem Komputer, UTM, 1996)

M68000 Family
The comparative details of the various properties of the M68000 family
microprocessor are summarized in Table 2.2. Although all chips have
32-bit CPU registers, the 68000, 68008, 68010 are 16-bit systems,
while the microprocessor starting with 68020 and onwards are 32-bits.
The 68008 has the same architecture as the 68000, but an 8-bit
external data bus.

Table 2.2 M68000 family summary


Attribute MC68000 MC68008 MC68010 MC68020 MC68030 MC68040
Data bus size (bits) 16 8 16 8, 16, 32 8, 16, 32 32
Address bus size (bits) 24 20 24 3 32 32
Instruction cache - - 3* 256 256 4096
(in byte) (words)
Data cache (in byte) - - - - 256 4096
Clock MHz 8 - 16 16 - 33 16 - 50 25, 33, 40
Note: * The MC68010 supports a three-word cache for the loop mode.
E3165 / UNIT 2 / 5
ARCHITECTURE OF MICROPROCESSOR

2.2 DATA SIZE: NIBBLE, BYTE, WORD, LONG WORD

The capacity of a microprocessor is normally referred to how many


bits of data can be handled at one time, or what is the memory size
(the amount of data cells of the memory, determined by the amount of
address lines/bits) accessible by the system. Thus it is important to
have a great understanding about data size.

Data size is a mean of measure to determine how much data can be


stored in a single cell of memory. Imagine you are looking at the post
boxes at a post office. Each box can store a certain amount of letter
(assumed all letters have equal size). The size of each post box is
made in equal size or dimensions. The bigger size of a single post
box the greater numbers of letter can be stored. Similarly in memory
storage, a memory storage can be distributed into many single cell
with equal data size. In digital form, the smallest size of a single cell is
called 1 bit.

If a single cell can store 4 bit of data, the cell size is called Nibble.
Subsequently 8 bits is called Byte, 16 bits is Word, and 32 is Long
Word.

A single cell sized 1 bit can store either logic-0 or logic-1. In other
word, two different situations can be stored or represented. Thus the
range of data is 0 – 1.
Data size: n = 1
Data capacity : 2n = 21 = 2
Range : 0 – 1

A single cell sized 4 bit (Nibble) can store 16 possible situations.


Data size: n = 4
Data capacity : 2n = 24 = 16
Range : 0 - 15

Similar approach is applied to other data sizes, and the resultant


particulars are shown in Table 2.2.

TABLE 2.2 : PARTICULAR OF DIFFERENT DATA SIZE.

Data size Data type Data capacity Range


n 2n
1 Bit 2 0–1
4 Nibble 16 0 - 15
8 Byte 256 0 – 255
16 Word 65536 0 – 65535
32 Long Word 4,294,967,296 0 - 4,294,967,295
E3165 / UNIT 2 / 6
ARCHITECTURE OF MICROPROCESSOR

Figure 2.2 shows the different data sizes in a graphic manner. Please
note that the data size is determined by the number of bit (n) , and is
labelled from 0 to n-1. For the data type Byte, Word and Long Word
allocate the MSB as the sign bit, to determine that value of remaining
bits is positve or negative.

For the data which has more bits, it is easier to divide it into dual-half
portions i.e. upper (MSB section) and lower portions (LSB section).

1 Byte consists of two nibbles, upper nibble and lower nibble.


1 Word consists of two bytes, upper byte and lower byte.
1 Long Word consists of two word, upper word and lower word.

Figure 2.2 Different Data sizes

Bit = 1 bit (n=0)


Range: 0 -1

Nibble = 4 bit (n= 0-3)


Range: 0 -15

3 0

Byte = 8 bit (n = 0-7)


Range: 0 -255

Sign 7 4 3 0
Upper Lower
bit
Nibble Nibble

Word = 16 bit (n= 0-15)


Range: 0 -65,535

Sign 15 Upper byte 8 7 Lower byte 0


bit

Sign 31 Upper word 16 15 Lower word 0


bit MSB LSB
(Most significant Bit) Long Word = 32 bit (n = 0-31) (Least significant Bit)
Range: 0 -4,294,967,295
E3165 / UNIT 2 / 7
ARCHITECTURE OF MICROPROCESSOR

ACTIVITY – 2A

TEST YOUR UNDERSTANDING BEFORE YOU CONTINUE TO THE NEXT INPUT….!

2A-1:
What are the two major microprocessor manufacturers?

2A-2:
What are the features for the microprocessor Pentium (Refer Table 2.1) :
Number of bits: ______
Speed : __________
Number of transistors : ___________
Developed in year: ____________

2A-3:
State the features of microprocessor MC68000 (Refer Table 2.2) :

2A-4:
What is the two main facts to determine the capacity of a microprocessor?

2A-5:
What is the definition of data size?

2A-6:
What do you know about “bit”?

2A-7:
If the smallest size of a single cell is called bit, what are the other cell sizes
with reference to the bits of data shown in the following table:

Bit of data Cell size


can be stored
(Bit/s)
1
4
8
16
32

2A-8:
Please determine the following features of a single cell sized 32 bits?
Data size: n = ____
Data capacity : 2n = ______
Range : ________
E3165 / UNIT 2 / 8
ARCHITECTURE OF MICROPROCESSOR

2A-9:
If the sign bit of a byte is at bit b7, and bit 0 to bit 3 is called lower nibble,
what is the sign bit of a long word, and the name of bit 16 to bit 31? (Refer
Figure 2.2)
E3165 / UNIT 2 / 9
ARCHITECTURE OF MICROPROCESSOR

FEEDBACK TO ACTIVITY – 2A

2A-1:
What are the two major microprocessor manufacturers?
Intel and Motorola

2A-2:
What are the features for the microprocessor Pentium (Refer Table 2.1) :
Number of bits: 64
Speed : 60 – 166 MHz
Number of transistors : 3.1 million.
Developed in year: 1993

2A-3:
State the features of Attribute MC68000
microprocessor MC68000 Data bus size (bits) 16
(Refer Table 2.2) : Address bus size (bits) 24
Instruction cache -
(in byte)
Data cache (in byte) -
Clock MHz 8 - 16
2A-4:
What is the two main facts to determine the capacity of a microprocessor?
bits of data can be handled at one time,
memory size accessible by the system.

2A-5:
What is the definition of data size?
Data size is a mean of measure to determine how much data can be stored
in a single cell of memory.

2A-6:
What do you know about “bit”?
In digital form, the smallest size of a single cell is called 1 bit.

2A-7:
If the smallest size of a single Bit of data Cell size
cell is called bit, what are the can be stored
other cell sizes with reference (Bit/s)
to the bits of data shown in the 1 Bit
following table: 4 Nibble
8 Byte
16 Word
32 Longword
E3165 / UNIT 2 / 10
ARCHITECTURE OF MICROPROCESSOR

2A-8:
Please determine the following features of a single cell sized 32 bits?

A single cell sized 32 bit (longword):


Data size: n = 32
Data capacity : 2n = 232 = 4,294,967,296
Range : 0 - 4,294,967,295

2A-9:
If the sign bit of a byte is at bit b7, and bit 0 to bit 3 is called lower nibble,
what is the sign bit of a long word, and the name of bit 16 to bit 31? (Refer
Figure 2.2)
Sign bit is Bit b31
Bit b16 to b31 is upper word.
E3165 / UNIT 2 / 11
ARCHITECTURE OF MICROPROCESSOR

INPUT-2B

2.3 BLOCK DIAGRAM OF A BASIC COMPUTER SYSTEM.

What is a digital computer? (Tocci, 1991)


A digital computer is a combination of digital devices and circuits that
can perform a programmed sequence of operations with a minimum of
human intervention. The sequence of operation is called a program.
The program is a set of coded instructions that is stored in the
computer’s internal memory along with all the data that the program
requires. When the computer is commanded to execute the program, it
performs the instructions in the order that they are stored in memory
until the program is completed. It does this at extremely high speed.

How do computers think? (Tocci, 1991)


Computers do not think! The computer programmer provides a program
of instructions and data which specifies every detail of what to do, what
to do it to, and when to do it. The computer is simply a high-speed
machine that can manipulate data, solve problems, and make
decisions, all under the control of the program. If the programmer
makes a mistake in the program or puts in the wrong data, the
computer will produce wrong results.
(Conclusion: The computer itself is not smart, it just works very hard
and very fast. Contrary the programmer is smarter who knows how to
instruct computer to fulfill the needs of human (programmer) )

A complete computer system physically consists of several electronic


circuit board or device, such as motherboard, memory chips, interface
cards and so on. We may study a computer system in terms of
function blocks or units.

Every computer contains five essential elements or units: the aritmetic


logic unit (ALU), the memory unit, the control unit, the input unit, and the
output unit. The basic interconnection of these units is shown in Figure
2.3. The arrows in this diagram indicate the direction in which data,
information, or control signals are flowing. Two different size arrows are
used; the larger arrows represent data or information that actually
consists of a relatively large number of parallel lines, and the smaller
arrows represent control signals that are normally only one or a few
lines. The various arrows are also numbered to allow easy reference to
them in the following descriptions.
E3165 / UNIT 2 / 12
ARCHITECTURE OF MICROPROCESSOR

From
outside
world

Figure 2.3 Block Diagram Of a Basic Computer System

Arithmetic logic unit (ALU)


 Arithmetic and logic operations are performed on data here.
 Type of operation is determined by signal from control units
(arrow 1).
 The input data can come from either:
a. memory unit (arrow 2) or
b. input unit (arrow 3).
 Result of operation is transferred to either:
a. memory unit for storage (arrow 4) or
b. output unit (arrow 5).

Memory Unit
 Memory unit stores group of binary digits (word) that can
represent:
a. instructions (program) that the computer is to perform.
b. the data that are to be operated on by the program.
 As storage for intermediate and final results of arithmetic
operation (arrow 4)
 Operation of the memory (either Read or Write) is controlled by
the control unit (arrow 6).
E3165 / UNIT 2 / 13
ARCHITECTURE OF MICROPROCESSOR

 Appropriate address code is fed by control unit (arrow 7) to


determine the location in the memory.
 Data/information can be inputted into memory from:
a. ALU (arrow 4).
b. input unit (arrow 3).
c. Control unit (arrow 7).
 Data/information can be fetched from memory and sent to:
a. ALU (arrow 2).
b. input unit (arrow 9).
c. Control unit (arrow 11).
 The operation (either Read or Write) of the memory is
controlled by signal of control unit (arrow 6)

Input Unit
 Consists of all of the devices used to take information and data
from the external environment to be inputted into the
computer system.

External Input Computer


environment Unit system

 These inputted information/data is sent to either:


a. memory unit (arrow 8) or
b. ALU (arrow 3).
 The operation will be controlled by signal from control unit
(arrow 10).
 The input unit is used to enter the program and data into the
memory unit prior to starting the computer.
 Some of the common input devices: keyboards, toggle
switches, modems, magnetic strip readers, magnetic disc
units, magnetic tape units, and analog-to-digital converters
(ADCs).
 Example of application: when a key is pressed, the keyboard
will send data via input unit to the computer system.

Output Unit
 Consists of all of the devices used to transfer information and
data from computer system to the external environment.

Computer Output External


system Unit environment

 These outputted information/data is fetched from either:


E3165 / UNIT 2 / 14
ARCHITECTURE OF MICROPROCESSOR

a. memory unit (arrow 9) or


b. ALU (arrow 5).
 The operation will be controlled by signal from control unit
(arrow 12).
 Some of the common output devices: LED readouts, indicator
lights, printers, disk or tape units, video monitors, and digital-
to-analog converters (DACs).
 Example of application: computer will send data via output
unit to printer for display.

Interfacing Unit
 The devices that make up the input and output units are called
peripherals because they are external to the rest of the
computer.
 The most important aspect of peripherals involves interfacing.
 Computer interfacing is specifically defined as transmitting
digital information between a computer and its peripherals in a
compatible and synchronized way.

Control Unit
 It directs the operation of all the other units by providing timing
and control signals.
 The unit contain logic and timing circuits that generate the
proper signals necessary to execute each instruction in a
program.
 The control unit fetches instruction codes (in binary codes)
from memory, then decodes the codes into instructions
subsequently execute operations.

Central processing Unit (CPU)


 When both ALU and control units are combined, this unit is
called central processing unit (CPU).
 It is also called the ‘brain’ of the computer system.
 In a microcomputer the CPU is usually implemented on a single
chip, which is the microprocessor.
 Some system may need several additional chips to be
connected to a microprocessor chip to make the CPU.

2.3.1 Microcomputer system

We already learned that in a basic computer system, a central


processing unit (CPU) consists of both ALU and control units.
In a microcomputer the CPU is usually implemented on a
single chip, which is the microprocessor. Some system may
need several additional chips to be connected to a
microprocessor chip to make the CPU. It is common to refer to
the microprocessor as the MPU (microprocessor unit), since it
is the CPU of the microcomputer.
E3165 / UNIT 2 / 15
ARCHITECTURE OF MICROPROCESSOR

Figure 2.4 shows the block diagram of a microcomputer.


It is noted that the microcomputer preserves the characteristic
of a basic computer system, but with smaller capabilities. A
simple comparison, mainframe is a computer system, whereas
personal computer is a microcomputer. However, the
advancement in microprocessor technology has increased the
capabilities of microcomputer.

Figure 2.4 Basic element Of a microcomputer

Since microcomputer system is actually a basic computer


system, the main elements of the internal constructions and
function are similar. However, the following outlines some
important features in more specific manner of a microcomputer
system as a comparison to the basic computer system.

a) CPU (Central Processing Unit)


 A silicon chip that works as ‘heart’ of the computer.
 Receive instructions from memory to implement a task.

b) Memory Unit
 Store data and programs.
 Divided into two (2) main categories:
i. Primary memory:
E3165 / UNIT 2 / 16
ARCHITECTURE OF MICROPROCESSOR

RAM (Random Access Memory):


 Data can be read and stored.
 However the stored data will disappear when the
power suplly is disconnected.

ROM (Read Only Memory):


 Data can only be read but cannot be written
into it.
 The tored data will not disappear when the
power suplly is disconnected.

ii. Secondary memory:

 RAM can only keep data in temporary basis, thus


we need a permenant storage, which is also
called secondary storage.
 The example of secondary storage are floppy disc
and harddisk.
 Another type is CDROM (Compact-disc ROM),
which can store upto 600 million characters and it
is suitable for storing huge size of information.

c) Input/Output (I/O) Unit


 I/O unit contains the interface circuits needed to allow
the peripheral to properly communicate with the rest of
the computer.
 In some cases these interface circuits are LSI chips
designed by the MPU manufacturer to interface the MPU
to a variety of I/O devices. In other cases the interface
circuits may be as simple as a buffer register.
 I/O unit allows user (external environment) to
communicate with the computer system via interface unit
that connected to the peripheral devices.
 peripheral devices such as keyboard, printer, sensor that
measuring vehicle speed etc.
 The port size of I/O unit is equivalent to the data bus size
of the microprocessor.

2.3.2 Microcomputer system with microprocessor Intel 8085

Based on the block diagram of a microcomputer with a general


microprocessor as shown in Figure 2.4, let us take a glance to
a more specific connection to a microprocessor Intel 8085 as
shown in Figure 2.5.
E3165 / UNIT 2 / 17
ARCHITECTURE OF MICROPROCESSOR

Figure 2.5 Microcomputer system with microprocessor Intel 8085

By comparing the two diagram of Figure 2.4 and 2.5, the MPU
is Intel 8085, and the pins is labeled according to the specific
function group names. For instance, the address lines are
grouped as "A15 - A0"; data lines are grouped as "D0-D7" ; control
lines with individual pin names, etc. All these line groups of the
MPU are connected to the three bus systems and subsequently
to the main function blocks of Memory (RAM and ROM), and
I/O interfaces-devices. On the left side of the MPU is the clock
circuitry to provide timing and sequence control to the MPU and
also the system.

2.3.3 Microcomputer system with microprocessor Motorola


MC68000

Another type of well-known microprocessor is Motorolla


MC68000. Figure 2.6 shows the diagram of a microcomputer
system based on microprocessor MC68000.
E3165 / UNIT 2 / 18
ARCHITECTURE OF MICROPROCESSOR

We are not here to analyze about the detail connections of the


MPU, but rather to familiarize the concept how a MPU chip is
physically wired up to the external devices to form a
microcomputer system. We need to know specifically what is
the name and function of each pin or a group of pins of a
microprcessor chip, before we can link them to the external
devices and buses. The pins configuration of MPU chip will be
discussed further in subsequent unit.

Refer Figure 7-2 in the Book yu Cheng Liu page 200

Figure 2.6 Microcomputer system with microprocessor Motorola


MC68000.
E3165 / UNIT 2 / 19
ARCHITECTURE OF MICROPROCESSOR

ACTIVITY – 2B

TEST YOUR UNDERSTANDING BEFORE YOU CONTINUE TO THE NEXT INPUT….!

2.1 A program is:


a) _________________________________
b) _________________________________

2.0 A complete computer system physically consists of several electronic


circuit board or device such as:
a) _______________________________

b) _______________________________

c) _______________________________
E3165 / UNIT 2 / 20
ARCHITECTURE OF MICROPROCESSOR

FEEDBACK TO ACTIVITY – 2B

2.1 A program is:


a) The sequence of operation
b) a set of coded instructions

2.2 a) motherboard b) memory chips c) interface cards.


E3165 / UNIT 2 / 21
ARCHITECTURE OF MICROPROCESSOR

INPUT-2C

2.4 Bus system

 A wire is used to transfer a signal from one point to another. A


group of wires is called bus.
 In the microcomputer system, there are three buses (data, address,
and control) to connect the microprocessor (CPU) to each of the
devices in the microcomputer system such as memory and I/O
devices.
 These buses will carry (sending or receiving) all the information and
signals involved in the system operation from one device to
another.

Figure 2.7 shows the bus system of a microcomputer system.

Data Bus
CPU Address Bus

Control Bus

MEMORY I/O Unidirectional:


Interface Signals flow in
Primary:
one direction.
RAM I/O
ROM Devices
Secondary: Bidirectional:
Floppy Signals flow in
CDROM both direction
Etc. (one at a time).

Figure 2.7 The bus system of a microcomputer system.

Data bus:
 Bidirectional bus, because data can flow to or from the CPU.

DATA BUS CPU to other elements


CPU
From other elements
to CPU
Memory I/O
Devices
E3165 / UNIT 2 / 22
ARCHITECTURE OF MICROPROCESSOR

 The size of data bus is determined by the number of lines (bits)


which is also called data size.
 Data size:
 Size of single cell in the memory.
 Numbers of bit the CPU can handle at any one time.
 Intel 8085 microprocessorhas 8 bits data bus, thus:
Data size n = 8 bits,
Data lines are labelled Dn : D0, D1, ….. D6, D7
 In other words, the CPU can handle, or data bus can transfer 8
bits data in parallel simultaneously, thus determine the speed of
data transfer.
 The same data bus (bits) can be set to either inputs or outputs
depending on whether the CPU is performing a read or a write
operation respectively.

Data bus Data bus

Control CPU Input CPU Output


signal is (from Control
(to Memory
READ Memory or signal is
R/W R/W or I/O
I/O devices) WRITE
devices)

Address bus:
 Unidirectional bus, because information flows over it in only one
direction, i.e. from CPU to thememory or I/O elements.

ADDRESS BUS CPU to other elements


CPU

Memory I/O Devices

 The number of address lines (address bus size) determine the


number of memory cells that CPU can handle.
 For instance, the Intel 8085 has 16 bits of address bus:

n = 16 bits (Size of address bus):


Address bus is labelled An : A0, A1, ….. A14, A15

2n = 216 = 65536:
CPU can handle or address 65536 single cells (each cell has 8
bits data size) of memory.
E3165 / UNIT 2 / 23
ARCHITECTURE OF MICROPROCESSOR

 In other words, 16 bit address lines can represent 65536 memory


location:
0 to 65535 locations, addressed as 0000h to FFFFh

Control bus:
 This is the set of signals that is used to synchronize the activities
of the seperate microcomputer elements.
 Control bus consists some individual lines for sending and some
others for receiving signals from CPU, thus control bus is
bidirectional. However, not like data bus that uses the same
lines to send or receive data. In Figure 2.5 two arrows with
opposite direction represents control bus as bidirectional but not
sharing the same lines for both sending and receiving signals.
 For instance, CPU sends control signals (Read/Write) to the
memory or I/O devices to tell them either to be set to send or
receive data.
 Contrary, CPU receives signal from other elements; for instance,
Reset signal will tell CPU to reset the on going operation, and
INTR signal causes CPU to interrupt an on going process.
E3165 / UNIT 2 / 24
ARCHITECTURE OF MICROPROCESSOR

ACTIVITY – 2C

TEST YOUR UNDERSTANDING BEFORE YOU CONTINUE TO THE NEXT INPUT….!

1a-1 Nyatakan tiga ciri motor tiga fasa yang menjadi kelebihan berbanding
motor
E3165 / UNIT 2 / 25
ARCHITECTURE OF MICROPROCESSOR

FEEDBACK TO ACTIVITY – 2C

1a-1:
a) faktor kuasa yang lebih baik.
E3165 / UNIT 2 / 26
ARCHITECTURE OF MICROPROCESSOR

INPUT-2D

2.5 OPERATION OF COMPUTER SYSTEM : FETCH AND EXECUTE


CYCLES

How a computer system works?


 Before a computer system is switched ON, CPU and RAM store
no data. Contrary, ROM permenantly stores a short program
for initializing the computer system.
 When the computer is switched ON, CPU will READ
data/program that stored in ROM, two tasks is performed. First,
devices that are readily connected to the computer will be reset
to a standby mode. Second, system programs from permenant
storage will be transferred to the RAM.
 System program will display instructions to guide the user to
proceed accordingly.

When a micro-computer system performs a task, there are basically


two cycles to be implemented. Figure 2.8 shows the two cycles are
implemented.

START

Fetch (next) 1: Microprocessor fetch


Instruction instruction representing the
signal carried by the address
3)
bus.
Microprocessor
continue the next
Execute 2: Microprocessor
instruction.
Instruction execute the instruction.

Is
No
it aHALT
instruction?

Yes

STOP

Figure 2.8 Fetch and execute cycles


E3165 / UNIT 2 / 27
ARCHITECTURE OF MICROPROCESSOR

Figure 2.9 is the extract from the basic computer system in Figure 2.3,
here we focus on the processes involve the control unit. The control
unit fetches an instruction from memory subsequently executes it by
the following steps:

a) sending an address to the memory unit (arrow 7).


b) Read a command to the memory unit (arrow 6).
c) The instruction word (codes) stored at the memory location is then
transferred to the control unit (arrow 11).
d) The instruction word, which is in some form of binary code, is then
decoded by logic circuitry in the control unit to determine which
instruction is being called for.
e) The control unit uses this information to send the proper signals to
the rest of the units in order to execute the specified operation.

Figure 2.9 Fetch and execute cycles of control unit


E3165 / UNIT 2 / 28
ARCHITECTURE OF MICROPROCESSOR

Example2-1
2-1
Example

b.) Add two data which are stored in memory at address 0001 and 0002.
c.) Store the result in the memory at address 0003.
Show the the above process in terms of fetch and execute cycles.

Solution
Solution2-1
2-1

START

Step 1:
CPU fetches the instruction “ADD” stored
in the memory (in binary codes), CPU then
decodes the instruction code.

Fetch
Step 2: cycle
First data is fetched from the memory (at
address 0001).

Step 3:
Second data is fetched from the memory
(at address 0002).

Step 4:
The two data are added.
Execute
This operation is carried out by ALU.
cycle
The result will be stored in the memory
(at address 0003).

END
E3165 / UNIT 2 / 29
ARCHITECTURE OF MICROPROCESSOR

Within the fetch cycle, there are two operations or sub-cycles, i.e.
Read and write.

READ CYCLE

 CPU sends a signal via control bus. If the bus is busy, CPU is put
on Wait state.
 If the bus is free, CPU will place instruction address on the
address bus.
 This address will be decoded or translated by the circuitry in the
memory or I/O interface.
 Finally the data at that specific address is obtained, and is placed
on the data bus.

Figure 2.10 shows the the whole Read cycle in the graphical form.

Address Bus

SYSTEM BUS
Data Bus

Control Bus
2 1
REQUEST
MEMORY
Step 1 : Read Request

RAM ROM MPU Step 2 : Send Address

Address Bus
SYSTEM BUS

Data Bus

Control Bus

3 4

DATA TRANSFER
MEMORY
MPU Step 3 : Receive Data
Step 4 : Signal OK
RAM ROM

Figure 2.10 Read cycle


E3165 / UNIT 2 / 30
ARCHITECTURE OF MICROPROCESSOR

WRITE CYCLE

 Write cycle enables CPU sends data to the memory or I/O


devices.
 CPU will send a signal (request to write) to the control bus.
 If the data bus is free, the data is placed on the data bus,
whereas the location address will be placed on the address bus.
 CPU will then send the data to the destination with respect to the
address.

Figure 2.11 shows the the whole Write cycle in the graphical form.

Address Bus

SYSTEM BUS
Data Bus

Control Bus
1

MEMORY REQUEST
MPU
RAM ROM Step 1 : Write Request

2
Address Bus
SYSTEM BUS

3
Data Bus

Control Bus
4

DATA TRANSFER
MEMORY
MPU Step 2 : Send Address
RAM ROM Step 3 : Send Data
Step 4 : Signal OK

Figure 2.11 Write cycle


E3165 / UNIT 2 / 31
ARCHITECTURE OF MICROPROCESSOR

ACTIVITY – 2D

TEST YOUR UNDERSTANDING BEFORE YOU CONTINUE TO THE NEXT INPUT….!

1a-1 Nyatakan tiga ciri motor tiga fasa yang menjadi kelebihan berbanding
motor
E3165 / UNIT 2 / 32
ARCHITECTURE OF MICROPROCESSOR

FEEDBACK TO ACTIVITY – 2D

1a-1:
a) faktor kuasa yang lebih baik.
E3165 / UNIT 2 / 33
ARCHITECTURE OF MICROPROCESSOR

INPUT-2E

2.6 INTERNAL STRUCTURE AND BASIC OPERATION OF A


MICROPROCESSOR

The microprocessor is an semiconductor integrated circuit which is


normally abbreviated as IC chip. In other words, the chip contains the
internal architecture and is connected to the external environment via
the pins arranged in a specific pattern surrounding the body of the
chip. Each pin has its own function and label. The pins configuration
is the diagram showing how the pins is organized.

The pins configuration in circuitry or block diagrams used to explain or


analyze the architecture of a microprocessor chip is usually organized
in a very friendly presentation. However, in practical, the actual pins
configuration of a chip, provided by the chip manufacturers is confined
to the circuitry fabrication which may not be organized in the friendly
function groups. Thus it is essential to specifically aware of the
physical pins configuration when dealing with the design of the actual
circuitry connections.

2.6.1 Pins configuration of a microprocessor chip


Figure 2.6.1 and Figure 2.6.2 show the pins configuration for
Intel 8085 and Motorola MC68000 microprocessor chips
respectively.

Figure 2.6.1 Pins configuration for Intel 8085


microprocessor chip

Figure 2.6.2 Pins configuration for Motorola MC68000


microprocessor chip.
E3165 / UNIT 2 / 34
ARCHITECTURE OF MICROPROCESSOR

There are many types of microprocessors, however we will pick one of


them i.e. Motorola MC68000 to discuss in details throughout the
subsequent sections and units. Many of the design practices and
fundamental concepts can apply to other modern microprocessors as
well. Before a detailed discussion of the MC68000 microprocessor is
presented, it is appropriate first to provide an overview of the hardware
and software organization of microcomputer systems and a
description of the data formats used in processing data inside the
MC68000 microprocessor.

2.6.2 Internal structure of microprocessor MC68000


Before we analyze how a microprocessor (P) works, it is better
we know the internal architecture of the P in term of function
blocks, though we may not need to know the complex circuitry
inside the chip. Basically P consists of three basic sections:
the control and timing section, the register section, and the
ALU, as shown in Figure 2.12.

Address bus
ALU Register
Section Data bus

Control and timing


sectrion Control bus

Microprocessor

Figure 2.12 Major function of a microprocessor chip

Arithmetic Logic Unit (ALU) section:


 Performs variety of arithmetic andlogic operations on data,
such as addition, subtraction, AND, OR, EX-OR, shifting,
incrementing, and decrementing.
 The more advanced MPU have ALUs that can do
multiplication and divisions.

Registers section:
 These internal registers serve as temporary data storage,
before, in progress and after the process done by ALU. Data
transfer within these registers is much faster as compared to
the memory.
 This section contains various registers (inside the MPU),
each of which performs a special function.
 These registers are: general purpose registers array,
accumulator, instruction register, program counter, and flag
register.
E3165 / UNIT 2 / 35
ARCHITECTURE OF MICROPROCESSOR

Control and timing section:


 The main function is to fetch instruction codes from program
memory.
 Then decode (interpret) them, to generate into necessary
control signals from MPU
 Then to execute the instructions.
 This section also generates timing and control signals (eg.
R/W clock), that are needed by external RAM, ROM, and I/O
devices.
Microprocessor (P) is the heart of every microcomputer. It
performs a number of functions, includes:
a) Providing timing and control signals for all elements of the
microcomputer.
b) Fetching instruction and data from memory.
c) Transfering data to and from memory and I/O devices.
d) Decoding instructions.
e) Performing arithmetic and logic operations called for by
instructions.
f) Responding to I/O-generated control signals such as
RESET and INTERRUPT.

2.6.3 Register Set of MC68000


The working element of a microprocessor is the internal
registers, where raw data and addresses to be stored, moved
around and transferred to be processed in the ALU.

The MC68000 is an internal 32-bit processor, meaning that


each register has 32 bits and the processor can perform
arithmetic and logic operations on 32-bit operands. Figure
2.6.1 is a block diagram showing all the registers in the
MC68000 that are directly accessible to the user.
E3165 / UNIT 2 / 36
ARCHITECTURE OF MICROPROCESSOR

PROGRAMMING MODEL
31 16 15 8 7 0
__ __ D0
__ __ D1
__ __ D2
__ __ D3 Eight
__ __ D4 Data
__ __ D5 Registers
__ __ D6
__ __ D7

31 16 15 8 7 0
__ __ A0
__ __ A1
__ __ A2 Seven
__ __ A3 Address
__ __ A4 Registers
__ __ A5
__ __ A6

User Stack Pointer Two


Supervisor Stack Pointer A7 Stack
Pointers
Program
PC Counter
15 8 7 0
System Byte User Byte Status
SR Register

Figure 2.6.1 Registers in the MC68000

The register set is divided into two groups, the data registers
and the address registers.

Data registers:
 There are eight registers, denoted by D0-D7.
 Each can be used as a source or destination operand in a
typical instruction.
 A data register may be accessed as a byte, word, or a
longword.
 For a byte operation, only the least significant byte, i.e. bits
7-0, is used as an operand. The remaining 24 bits are not
affected by the operation.
 Similarly, for a word operation, only the least significant half
of the register can be used.

Address registers:
 The address registers are primarily for generating memory
operand addresses. Therefore, their accesses are more
restrictive when compared to the data registers.
E3165 / UNIT 2 / 37
ARCHITECTURE OF MICROPROCESSOR

 There are nine address registers, which are referenced by


A0-A7, with A7 consists two registers which also serve as
Stack Pointer (either SSP or the USP).
 An address register cannot be referenced as a byte
operand.
 When an operand is specified as a source, an address
register can be accessed as a word (its lower 16 bits) or
longword operand.
 But, when used as a destination in a word operation, the
operand word is sign-extended to a longword before being
stored into the destination address register.
 This means that the entire register will be affected
regardless of whether the operation size is word or
longword.
 Although the program counter and address registers are 32
bits long, only the lower 4 bits are used for addressing the
memory. This limits the programming space to 16
megabytes.

Stack Pointer (SP):


 Address register A7 also serves as SP either supervisor
stack pointer (SSP) or the user stack pointer (USP),
depending on the supervisor bit in the status register.
 In a subroutine call or some other instructions, the active
system SP is automatically used for saving and restoriing
the return address and other information.
 The active system SP is the SSP in the supervisor mode
and the USP in the user mode.

Program counter (PC):


 The PC always points to the next instruction to be executed.
 Unlike a general purpose register, it cannot be explicitly
specified as an operand in any instruction except as an
index register.
 During a branch-type instruction, the destination is loaded
into the PC.
 For any other instruction, its content are incremented by the
instruction length as the instruction is executed.

Status Register (SR):


 The status register (SR) has 16 bits and is divided into the
system byte and user byte.
 The user byte contains five condition flags. The remaining 3
bits are not used and remain zero.
 The condition flags contain information on the result of the
last processor operation. The setting can be tested by
conditional branch instructions.
E3165 / UNIT 2 / 38
ARCHITECTURE OF MICROPROCESSOR

 Since each bits of this condition flags register are self


contained, thus a detail analysis is necessary and to be
discussed in subsequent section.
E3165 / UNIT 2 / 39
ARCHITECTURE OF MICROPROCESSOR

ACTIVITY – 2E

TEST YOUR UNDERSTANDING BEFORE YOU CONTINUE TO THE NEXT INPUT….!

2 Nyatakan tiga ciri motor tiga fasa yang menjadi kelebihan berbanding
motor
E3165 / UNIT 2 / 40
ARCHITECTURE OF MICROPROCESSOR

FEEDBACK TO ACTIVITY – 2E

1a-1:
a) faktor kuasa yang lebih baik.
E3165 / UNIT 2 / 41
ARCHITECTURE OF MICROPROCESSOR

INPUT-2F

2.7 Microprocessor clock system

Apart from the working part of the microprocessor, the microprocessor


requires an external circuitry (though some chips have built-in
circuitry) i.e. the clock system to supply proper timing and sequence
control to monitor and synchronize the whole operation of the
microprocesor.

2.7.1 Intel 8085 clock system and bus cycle timing


We take a closer look into one of the microprocessors, Intel
8085, to learn more about a microprocessor clock system. The
microcomputer system with microprocessor Intel 8085 as
shown in Figure 2.5 contains an on chip clock oscillator circuit
that generates the basic clock signal to time all of its operations.

In normal operation, a crystal is attached to the X1 and X2 input


pins of the 8085 to produce a signal that is twice the desired
clock frequency (see Figure 2.12). This frequency is internally
divided by 2 to produce the P clock signal, which is used
internally and is also made available as an output for the control
bus. The most common cyrstal frequency used is 6 MHz, which
produces a clock signal frequency of 3 MHz.

Extract of
Intel 8085 P

1 - 6 MHz Clock signals are


Clock
Crystal 1. Used internally and
X1 2. as output for control bus

20pF CLOCK

X2
20pF
3 MHz
6 MHz
6 MHz 2

Figure 2.12 Major function of a microprocessor chip


E3165 / UNIT 2 / 42
ARCHITECTURE OF MICROPROCESSOR

 All of the 8085 microprocessor and microcomputer are


synchronised to this 3-MHz clock signal.
 The individual cycles of the clock signal are called T-state.
 Each read or write operation performed by the CPU is
referred to as a machine cycle.
 Each 8085 instruction fetched and executed by the CPU
takes anywhere from one (1) to five (5) machine cycles, and
each machine cycle requires anywhere from three (3) to six
(6) T-states (clock cycles).
Memory
 Take one of an instruction in a
Addr Data
program, eg. "STA $0300" stored at
0006
address $0007.
STA $0300 ; op code = 32 00 03 0007 32
 To illustrate, Figure 2.13 (Figure 13- 0008 00
9) shows the timing for the 0009 03
instruction. 000A

Instruction Cycle
Machine
Cycle M1 M2 M3 M4

T state T1 T2 T3 T4 T1 T2 T3 T1 T2 T3 T1 T2 T3

CLOCK

Type of
machine cycle Memory Read Memory Read Memory Read Memory write

Hex address 0007 0008 from PC; 0009 from PC; 0300, the
from PC; address of address of low address of operand
Address bus op code for STA. byte of the high byte of address.
operand the operand
address. address.
Hex data 32, the op Hex 00, the 03, the high Data byte
Data bus code for STA. low byte of the byte of the from
operand operand accumulator
address. address. register of the
CPU.

Figure 2.13 The timing sequence for 8085's STA $0300


instruction.
 The complete instruction cycle takes four (4) machine cycles
(M1 - M4), and a total of 13 T-states.
 Each of the machine cycles consists of either 3 or 4 T-states.
 The diagram also show what is on the address and data
buses during each machine cycle.
E3165 / UNIT 2 / 43
ARCHITECTURE OF MICROPROCESSOR

2.7.2 Motorola MC68000 clock system and bus cycle timing


An MC68000 requires one or more bus cycles, and each bus
cycle in turn is composed of several clock cycles. The
processor needs to fetch the instruction from memory, and
additional bus cycles may be required, depending on how many
data transfer operations to or from memory are needed. Since
the MC68000 is an external 16-bit, internal 32-bit processor,
reading or writing a longword from or to memory requires two
bus cycles. The following table shows some examples of read
and write bus cycles required for fetching and executing various
instructions.

Table 2.7.2 Read and write bus cycle of some instructions.


Instruction No. of No. of
Read cycle Write cycle
MOVE.L D2,D3 1 0
MOVE.W 34(A1),D2 3 0
MOVE.B D3,60(A2) 2 1
ADD.L 56(A3),D4 4 0
ADD.L D4,56(A3) 4 2
ADDI.W #$1234,56(A3) 4 1
JMP XXXX.W 2 0
JSR XXXX.W 2 2
TRAP #5 4 3

 The length of a bus cycle for the MC68000 has a minimum


of four clock cycles, denoted by S0/S1, S2/S3, S4/S5, and
S6/S7.
 The timing diagram for a word read and a word write
(without a wait cycle state) are shown in Figure 2.7.2.1
(Figure 7-4, Pg 202 Yu-Cheng Liu).

Read cycle:
 During the first clock cycle (S0/S1), the processor places an
address on address pins A1-A23, specifying the location to
be accessed.
 It also sets the R/W pin initially high to indiacate a read
operation and send out a 3-bit function code on pins FC0-
FC2.
 At the beginning of the second clock cycle (S2/S3), the
processor asserts the AS pin to indicate a valid address and
maintains it low for the entire bus cycle.
 In S2/S3, for read cycle, the processor maintains the R/W
signal high, outputs UDS and LDS, and places data pins
D0-D15 into the high impedance mode.

Write cycle:
E3165 / UNIT 2 / 44
ARCHITECTURE OF MICROPROCESSOR

 During the write cycle, the processor changes the R/W


output to low and places data on D0-D7, and/or D8-D15
according to UDS and LDS.
 The UDS and LDS signals are not output until the end of S3.
 If an acknowledge (DTACK) is received from the addressed
device before S5, the processor proceeds with the fourth
clock cycle (S6/S7).
 In this clock period, the data are latched by the processor
for a read operation or by the addressed device for awrite
operation.
 Then the processor deactivates AS, UDS, and LDS signals,
enters the first clock cycle (S0/S1), and the data are
removed from the data pins, thus terminating the bus cycle;
and ready for the next read/write cycle.
 The flow chart of this interaction between the processor and
addressed device in read and write operations is shown in
Figure 2.7.2.2 (Fig 7-5, pg 202, Yu Cheng).

Figure 2.7.2.1 (Figure 7-4, Pg 202 Yu-


Cheng Liu).

Figure 2.7.2.2 (Fig 7-5, pg 202, Yu Cheng).


E3165 / UNIT 2 / 45
ARCHITECTURE OF MICROPROCESSOR

The microprocessor (P) contains the logic


circuitry (harware) to perform variuous You will learn
operations and functions, but its internal logic further about
circuitry is generally not to be directly program of
accessible externally by the users or instructions, the
programmers. Instead we can control what so-called “P
happens inside the P by the program of program-
instructions that we put in the memory for the ming” in
P to execute. subsequent
unit.
This is what makes the P so versatile and
flexible. When we want to change its
operation, we simply change the programs
stored in RAM (software) or ROM (firmware)
rather than rewire the electronics (hardware).
E3165 / UNIT 2 / 46
ARCHITECTURE OF MICROPROCESSOR

ACTIVITY – 2F

TEST YOUR UNDERSTANDING BEFORE YOU CONTINUE TO THE NEXT INPUT….!

1a-1 Nyatakan tiga ciri motor tiga fasa yang menjadi kelebihan berbanding
motor
E3165 / UNIT 2 / 47
ARCHITECTURE OF MICROPROCESSOR

FEEDBACK TO ACTIVITY – 2F

1a-1:
a) faktor kuasa yang lebih baik.
E3165 / UNIT 2 / 48
ARCHITECTURE OF MICROPROCESSOR

SELF-ASSESSMENT 2
KENDIRI - U1

You are approaching success. Try all the questions in this self-assessment section
and check your answers with those given in the Feedback on Self-Assessment 1
given on the next page. If you face any problem, discuss it with your lecturer. Good
Luck

1-1:
a. Senaraikan LIMA kebaikan sistem tiga fasa berbanding dengan sistem satu fasa.
E3165 / UNIT 2 / 49
ARCHITECTURE OF MICROPROCESSOR

FEEDBACK TO SELF-
ASSESSMENT 2

Have you tried the question?????? If “YES”, check your answer now.

JAWAPAN 1-1:

a. Pilih lima daripada enam kebaikan dalam nota modul ini.


E3165 / UNIT 2 / 50
ARCHITECTURE OF MICROPROCESSOR

End of unit 2

You might also like