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Logic Design Styles: Dinesh Sharma
Logic Design Styles: Dinesh Sharma
Dinesh Sharma
A A A A
A.B A+B
B A
A.B A+B
A B
A.B A+B
B A
A.B A+B
A B
AND−NAND OR−NOR
‘0’ ‘1’ ‘0’ In fact, the multiplexer n transistor and the pull
up p transistor constitute a pseudo nMOS
inverter.
Therefore, the multiplexer output cannot be pulled low unless
the transistor geometries are appropriately ratioed.