Download as docx, pdf, or txt
Download as docx, pdf, or txt
You are on page 1of 3

Basics of Operating Systems (IT2019-2)

GIANG LE e1800927
Assignment IV:
1. What are MAR, MBR, I/OAR and I/OBR?
 MAR: stand for memory address register, which specifies the address in memory for
the next read or write.
 MBR: stand for memory buffer register: which contains the data to be written into
memory, or which receives the data read from memory.
 I/OAR: I/O address register specifies a particular I/O device.
 I/OBR: I/O buffer register (I/OBR) is used for the exchange of data between an I/O
module and the processor.

2. What happens during a load instruction?


The load instruction moves a byte or word from main memory to an internal register within
the CPU

3. What happens during a store instruction?


The store instruction moves the content of a register to main memory

4. What is a register file?


The CPU can load instructions only from memory, so any program to run must be stored
there. A register file is an array of processor registers in a central processing unit (CPU).
Modern integrated circuit-based register files are usually implemented by way of fast static
RAMs with multiple ports. Such RAMs are distinguished by having dedicated read and write
ports, whereas ordinary multiported SRAMs will usually read and write through the same
ports. The term static differentiates SRAM from DRAM (dynamic random-access memory)
which must be periodically refreshed. SRAM is faster and more expensive than DRAM; it is
typically used for CPU cache while DRAM is used for a computer's main memory.
5. What is ACU or AGU in a computer architecture? Why do we need ACU?
 Address generation unit (AGU) or address computation unit (ACU) is an execution unit
inside central processing units (CPUs) that calculates addresses used by the CPU to
access main memory.  
 ACU can separate circuit(s) that operates in parallel with the rest of the CPU, the
number of CPU cycles required for executing machine instructions can be reduced,
and the performance can be improved.
6. What is ALU in a computer architecture?
1
 Arithmetic logic unit (ALU) is a combinational digital electronic circuit that performs
arithmetic and bitwise operations on integer binary numbers.
 An ALU is a fundamental building block of many types of computing circuits, including
the central processing unit (CPU) of computers, FPUs, and graphics processing units
(GPUs). A single CPU, FPU or GPU may contain multiple ALUs.
7. What is cache?
Cache is used by the central processing unit (CPU) of a computer to reduce the average
cost (time or energy) to access data from the main memory. A cache is a smaller, faster
memory, closer to a processor core, which stores copies of the data from frequently used
main memory locations. It reduce the average cost to access data from the main memory.
Most CPUs have different independent caches, including instruction and data caches,
where the data cache is usually organized as a hierarchy of more cache levels (L1, L2, etc.).

8. What is cache entry?


Data is transferred between memory and cache in blocks of fixed size, called cache
lines or cache blocks. A cache entry is created when a cache line is copied from memory
into the cache. The cache entry will include the copied data as well as the requested
memory location (called a tag).
9. Explain cache hit and cache miss?
 A cache hit occurs when the processor finds that the memory location is in the cache.
In the case of a cache hit, the processor immediately reads or writes the data in the
cache line.
 A cache miss occurs when the processor does not find the memory location in the
cache. For a cache miss, the cache allocates a new entry and copies data from main
memory, then the request is fulfilled from the contents of the cache.
10. What are the instruction cycle steps in a Von Neuman architecture?
Instructions are processed under direction of the control unit in step-by-step manner.
Each step is referred to as a phase, there are six fundamental phases of the instruction
cycle:
1. fetch instruction (aka pre-fetch)
2. decode instruction
3. evaluate address (address generation)
4. fetch operands (read memory data)
5. execute (ALU access)
6. store result (writeback memory data)
11. Explain the following terms:
1. Bit: one binary digit, is either 0 or 1.
2. Byte: unit data of eight bits long.
3. Octet: octet: in some systems, the term octet is used for an eight-bit unit instead of
byte.
4. Nibble: half a byte (four bits).

2
5. Word: A word is a unit of data of a defined bit length. Usually, the defined bit length of
a word is equivalent to the width of the computer's data bus so that a word can be
moved in a single operation from storage to a processor register.
6. full-word: length of 32 bits. 1 word = 4 bytes = 32 bits
7. half-word: length of 16 bits. 1 halfword = 2 bytes = 16 bits

1 byte = 8 bits
1 double word = 2 words = 8 bytes = 64 bits
12. How does the length of word affect the processor efficiency?
The longer the architected word length, the more the computer processor can do in a
single operation.
13. What does a word can contain?
A word can contain a computer instruction, a storage address, or application data that is to
be manipulated (for example, added to the data in another word space).

14. What is device controller?


A device controller maintains some local buffer storage and a set of special-purpose
registers. A device controller maintains some local buffer storage and a set of special-
purpose registers.
The device controller is responsible for moving the data between the peripheral devices
that it controls and its local buffer storage.

15. How do device driver and device controller work together to execute an operation?
To start an I/O operation, the device driver loads the appropriate registers within the
device controller.
The device controller, in turn, examines the contents of these registers to determine what
action to take (such as “read a character from the keyboard”).
The controller starts the transfer of data from the device to its local buffer.
Once the transfer of data is complete, the device controller informs the device driver via an
interrupt that it has finished its operation.
The device driver then returns control to the operating system, possibly returning the data
or a pointer to the data if the operation was a read.

I/O: Input/ Output

You might also like