PRACTICE # 7

Multiplexers (Analog and Digital)

A Multiplexer (MUX) is a channel selector. The channels can be analog or digital. The most basic
Multiplexers are the 4-to-1 and 2-to-1 shown in Figure 7.1. A classical 2-to-1 MUX is the CD4019, which
is suitable for low-frequency applications. For High-speed applications, you might use the 74HC157
series. For video multiplexing, consider the ones from Maxim.

Figure 7.1: 2-to-1 Mux and 4-to-1 Mux with their equivalent logic circuit.

Figure 7.2 shows a design of a 4-bit MUX using AND/OR gates similar to the classic chip CD4019
or 74HC159. This MUX finds application to transfer nibbles of data to a Microcontroller port
input. The ogic Equations for this MUX are:
Zo = Ao */SEL + Bo * SEL;
Z1 = A1 */SEL + B1 * SEL;
Z2 = A2 */SEL + B2 * SEL;
Z3 = A3 */SEL + B3 * SEL;
The Logic circuit obtained is on the right side of Figure 7.2.
 Figure 7.2: 4-bit Mux similar to the IC 74HC159.

DESIGNING A 3-BIT DIGITAL-TO-ANALOG CONVERTER USING A MULTIPLEXER

Figure 7.3 shows a 3-bit DAC designed with the analog MUX CD4051. A set of nine 1K series resistors
provide eight different voltage levels V1-V7. Those voltages are selected with three channel selector
inputs called A, B, and C. A voltage follower (1/2 MCP602) is used as a buffer to isolate the output
Voltage from the resistor network.

Figure 7.3: 8-to-1 DMUX application to design a 3-bit Digital-to-Analog Converter DAC.
USING A MUX AS A LOGIC GATE
A 2-to-1 Mux in Figure 7.4 can simulate any 2-input gate. Figure 7.4 shows four different gates
made of a 4-to-1 MUX. The SEL inputs now become the variable inputs, and the channel inputs
must be connected to logic “0” or “1” to perform the logic function that you need.

Figure 7.4 Four different gates made of a single MUX: AND, NAND, XOR, and IOR.

An 8-input channel MUX can simulate 3-input Gates, or any other 3-variable logic function.
Figure 7.5 shows several cases.

Figure 7.5: 8-to-1 MUX simulating logic functions.

Student Assignment:

a) Using a 2-to-1 MUX design OR and NOR gates.

b) Using an 8-to-1 MUX configure the MUX to solve the equation:

Z = /C * /B * A + /C * B * A + C * B * A;