Tes Testing of Logic Gates

Experiment - 1
Course Code : 18ECC103J Course Title : Digital Electronic Principles
Reg. No. : RA1911004010350 Name : Abhishek Mourya
Semester : III Semester Year : II Year
Date of Expt. : 5-08-2020 Date of Submission : 19-08-2020
Name of the Lab Instructor : P. Radhika

Title of the Experiment: Testing of Logic Gates

Aim(s) / Objective(s) / Purpose

Verification and interpretation of truth tables for AND, OR, NOT, NAND, NOR Exclusive OR (EX-OR),
Exclusive NOR (EX-NOR) Gates

Introduction / Background

The AND gate is a basic digital logic gate. The logical operation AND is interpreted to mean that output
Y=1 if and only if inputs A=1 and B=1; otherwise Y=0, where A, B, Y are binary variables. It has N
inputs (N>=2) and one output.
The NAND gate is known as universal gate. The NAND function is the complement of AND function.
The logical NAND operation interpreted to mean that output Y=1 if both inputs A=0 and B=0 or if A=0
and B=1 or if A=1 and B=0; otherwise Y=0.
The OR gate is a basic digital logic gate. The logical operation OR is interpreted to mean that output Y=1
if inputs A=1 and B=0 or if A=0 and B=1 or both A=1 and B=1; otherwise Y=0. It has N inputs (N>=2)
and one output.
The NOR gate is known as universal gate. The NOT-OR operation is known as the NOR operation. The
logical operation NOR is interpreted to mean that output Y=1 if and only if both inputs A=0 and B=0;
otherwise Y=0.
The logical operation XOR is interpreted to mean that the output Y=1 if A=0 and B=1 or if A=1 or B=0;
otherwise Y=0.

Logic diagram of AND gate

Abhishek Mourya RA1911004010350 Digital electronic Principles
Tes Testing of Logic Gates

Truth table of AND gate

Input Output
s
A B Y
0 0 0
0 1 0
1 0 0
1 1 1

Logic diagram of NAND gate

Truth table of NAND gate

Inputs Output
A B Y
0 0 1
0 1 1
1 0 1
1 1 0

Logic diagram of OR gate

Truth table of OR gate

Inputs Output

A B Y

0 0 0

0 1 1

1 0 1

1 1 1

Logic diagram of NOR gate

Abhishek Mourya RA1911004010350 Digital electronic Principles

Tes Testing of Logic Gates

Truth table of NOR gate

Inputs Outpu
t
A B Y

0 0 1

0 1 0

1 0 0

1 1 0

Logic diagram of AND gate

Truth table of XOR gate

Inputs Output

A B Y

0 0 0

0 1 1

1 0 1
1 1 0

Materials / Equipment

1. IC 7408 (AND gate)

2. IC 7400 (NAND gate)
3. IC 7432 (OR gate)
4. IC 7402 (NOR gate)
5. IC 7486 (XOR gate)

Procedure

Abhishek Mourya RA1911004010350 Digital electronic Principles

Tes Testing of Logic Gates

After Starting the experiment first click on the Components button to get component list. Now you can
Drag and Drop any component in the circuit designing area. To make connection between components,
just click on the Blue bubble of any components and Drag it to another Blue bubble of the same or any
other components. To delete connection or to remove any component use Double click on that component
or connection.
Connect the Vcc and Ground pins of the ICs with the power supply. Now connect the input pins of the
ICs with the Input Switches. Connect the output pins with output LEDs. Only pins with Blue bubbles can
be used.
Green LEDs are used for indicating logic 0 and Red LEDs are used for logic 1.
After connecting all the required components, click on the Start button.

Data

Abhishek Mourya RA1911004010350 Digital electronic Principles

Tes Testing of Logic Gates

Abhishek Mourya RA1911004010350 Digital electronic Principles

Tes Testing of Logic Gates

Abhishek Mourya RA1911004010350 Digital electronic Principles

Tes Testing of Logic Gates

Results and Conclusion

The truth table for all logic gates are verified.

References

1. https://www.iitg.ac.in/cseweb/vlab/Digital-System-Lab/exp/xor_gt/index.php?id=5

Abhishek Mourya RA1911004010350 Digital electronic Principles