ECE2026 – DIGITAL CIRCUIT DESIGN

LAB FAT

CATHERINE CRUZ M – 19BML0048

11) Multiplexer 8:1

AIM:
To analyse the function and applications of 8 :1 multiplexer.
Verilog code:
module mux8to1(a,b,c,d,y);
input a;
input b;
input c;
input [7:0] d;
output y ;
reg y;
always @(a or b or c or d)
case ({a,b,c})
0:y=d[0];
1:y=d[1];
2:y=d[2];
3:y=d[3];
4:y=d[4];
5:y=d[5];
6:y=d[6];
7:y=d[7];
endcase
endmodule

Block Diagram:
Z MSB LSB 3 +
= A′.B'.C'.I0 + A'.B'.C.I1 + A'.B.C'.I2 + A'.B.C.I
A.B'.C'.I4 + A.B'.C.I5 + A.B.C'.I6 + A.B.C.I7

Truth Table:

Logic diagram:
Simulation:

Application:

In all types of digital system applications,multiplexers find its immense usage.Since

Multiplexers allows multiple inputs to be connected independently to a single output,these
are found in variety of applications including data routing logic function generators,control
sequencers,parallel to serial converters.
1)Communication System: It makes the communication more efficient by allowing the
transmission of data such as audio, video etc from different channels to a single line.
(Read about FDM(Frequency Division Multiplexing) and TDM(Time Division
Multiplexing) to know more about it.)

2)Computer Memory: It is used to decrease the number of copper wires from memory to
other parts of the computer.

Input and output:

An 8-to-1 multiplexer consists of eight data inputs D0 through D7, three input select lines S2
through S0 and a single output line Y. Depending on the select lines combinations,
multiplexer decodes the inputs.

The below figure shows the block diagram of an 8-to-1 multiplexer with enable input that
enable or disable the multiplexer. Since the number data bits given to the MUX are eight
then 3 bits (23=8) are needed to select one of the eight data bits.

The truth table for an 8-to1 multiplexer is given below with eight combinations of inputs so
as to generate each output corresponds to input.