TIRTH PATEL SE ETRX 2019110040

ED EXP 8 : JFET AMPLIFIER DESIGN

1.CALCULATIONS
On running simulations, we obtain a gain value of about 14.5 for calculated value of R D =
2273.16Ω
On tweaking the value to 2.37KΩ, we get a gain of approximately 15.125 which is close to
design requirement
 1. CS JFET AMPLIFIER

Figure 1 :Schematic

Figure 2 : Input and Output waveforms

As we can see, we have a gain of about 15.125 for the given design which is slightly higher
than what we designed for. Note that all resistance and capacitance values are from parts list
and hence our design can be made from commercially available components in a realworld
situation.
Input and Output waveforms are 180o out of phase with each other
 Figure 3: Frequency Response waveform

Mid Band Gain is about 23.65dB which comes to a simple ratio of around 15.223 which is
reasonably close to our calculations and design
-3dB points (~20.65dB) are at around 341.14mHz (FLOWER) and 43.97MHz (FUPPER)
 2. REMOVING BYPASS CAPACITOR

Figure 4: Schematic

Figure 5: Input and Output waveforms

On removing the bypass capacitance, we observe that our gain drops to around 1.41 with the
phase difference again being 1800 between input and output.
 Figure 6: Frequency Response waveform

Mid Band Gain is about 3dB which comes to a simple ratio of around 1.41
-3dB points (~0dB) are at around 547.8µHz (FLOWER) and 1GHz (FUPPER)
 3. CASCADED AMPLIFIER

Figure 7: Schematic

Figure 8: Input and Output waveforms

Here the voltage gain is around 225.5 which is close to the square of the gain of individual
amplifier which was 15.125(practical) and 15(designed).
Input and Output waveforms are in phase with each other.
 Figure 9:

Mid Band Gain is about 47.09dB which comes to a simple ratio of around 226.203 which is
reasonably close to our calculations and design
-3dB points (~44.09dB) are at around 531.6mHz (FLOWER) and 2.324MHz (FUPPER)

As we can observe, cascading two amplifiers results in an equivalent with the decibel gain
and phase difference equal to the sum of the decibel gains and phase differences of its
constituent amplifiers.
Since decibel gain is logarithmic, ratio gain is equal to the product of the ration gains of the
constituent amplifiers.

LEARNING OUTCOMES

• Understood how to design an JFET amplifier from commercially available parts for a
given value of Voltage Gain.
• Understood the significance of bypass capacitor and the effect of removing it.
• Learned how to cascade multiple amplifiers and understood the effect of doing so on the
Voltage Gain.