EMBEDDED SYSTEMS LABORATORY

EE-306

TASK#2

DESIGN OF LOW PASS FIR FILTER OF 2ND ORDER

Submitted by:

SUBHAM PANDA – 116EE0327

H.R SAI KIRAN PANDIT – 116EE0328

POONAM PRIYADARSHINI PARIDA – 116EE0329

THUMUKINTA VIDYA-716EE4103

TABLE OF CONTENTS:
S NO. Content Page
1 Title 01
2 Objective 01
3 Equipment and Software Used 01
4 Theory 01
5 Circuit diagram 05
6 Procedure 06
7 Code with comments 07
8 Observations 10
9 Tabulation 11
10 Conclusion 11

LOW PASS FILTER WITH FIR STRUCTURE OF 2ND ORDER

Aim of the Experiment:

  To develop RTOS with FIFO structure for signal access to realize the
filters in the circuit developed in Task-1.
 To design Low pass filter with FIR structure of 2nd order.

Equipment and software used:

1. Proteus 8 professional
2. Matlab

Theory:

Digital filter:

In signal processing, a digital filter is a system that performs mathematical

operations on a sampled, discrete-time signal to reduce or enhance certain
aspects of that signal. This is in contrast to the other major type of electronic
filter, the analog filter, which is an electronic circuit operating on continuous-
time analog signals.

A digital filter system usually consists of an analog-to-digital converter (ADC)

to sample the input signal, followed by a microprocessor and some peripheral
components such as memory to store data and filter coefficients etc. Finally
a digital-to-analog converter to complete the output stage. Program Instructions
(software) running on the microprocessor implement the digital filter by
performing the necessary mathematical operations on the numbers received
from the ADC. 
FIR FILTER:

In signal processing, a finite impulse response (FIR) filter is

a filter whose impulse response (or response to any finite length input) is
of finite duration, because it settles to zero in finite time. This is in contrast
to infinite impulse response (IIR) filters, which may have internal feedback and
may continue to respond indefinitely.

For a causal discrete-time FIR filter of order N, each value of the output

sequence is a weighted sum of the most recent input values:
where:

 x[n] is the input signal,

 y[n] is the output signal,
 N is the filter order; an Nth-order filter has (N+1) terms on the right-hand
side
  bi is the value of the impulse response at the ith instant for 0 < i < N of
an Nth-order FIR filter. If the filter is a direct form FIR filter then bi is
also a coefficient of the filter.
This computation is also known as discrete convolution.

Circuit Diagram: -

The above is the circuit followed for the experimental design and was
implemented in the proteus design environment. Then, the code was written in
proteus environment from which the hex file was generated and dumped in the
microcontroller for execution.
Procedure: -

1. Proteus design suite existing file of ADC interfacing with

microcontroller 8051 was opened.
2. Additional circuit required for this was added as shown in the figure.
3. Opened the keil Uvision and made a new project for the AT89c52 in keil
and set to make the hex code
4. Code written is shown below
5. Hex file generated was browsed and dumped in the microcontroller
6. program was built and compiled
7. Output was observed and readings are tabulated.

Code:

org 0000h

sjmp main ;Jump to main program

org 0003h
sjmp sample ;Jump to Interrupt service subroutine

main:

mov P1,#0FFh ;To make port 1 as input

mov P2,#00h ;To make port 2 as output

mov IE,#81h ;To enable interrupt zero

setb TCON.0 ;To make interrupt 0 negative edge triggered

mov R0,#00h ;Register to store value of x[2]

mov R1,#00h ;Register to store value of x[1]

mov R2,#00h ;Register to store value of x[0]

mov R3,#63h ;Register to store value of h0 and h2

mov R4,#69h ;Register to store value of h1

setb P3.0 ;To set ALE

setb P3.1 ;To set SC for starting the conversion

clr P3.0 ;To generate a time delay in SC pulse

clr P3.1

loop: sjmp loop ;To run all the foreground processes

;Interrupt service
subroutine=======================================

sample:

mov R0,P1

mov A,R0 ;To store the sampled value x[2] of ADC in R0

mov B,R3 ;To move h0 into B for multiplication

mul AB ;TO perform h0*x[2]

mov R5,B ;To store the result in register

mov A,R1 ;To move x[1] for multiplication

mov B,R4 ;TO move h[1] for multiplication

mul AB ;Performing h1*x[1]

mov R6,B ;To store the result in register

mov A,R2 ;To move x[0] for multiplication

mov B,R3 ;To move h2 for multiplication

mul AB ;To perform h2*x[0]

mov R7,b ;To store the result in a register

mov A,R5

add A,R6

add A,R7 ;performing h0*x[2]+h1*x[1]+h2*x[0]

mov P2,A ;sending the result to DAC

mov A,R1 ;To store the current x[1] as next x[0]

mov R2,A

mov A,R0 ;To store current x[2] as next x[1]

mov R1,A

;To start another conversion in

ADC===================================

setb P3.0

setb P3.1
clr P3.0

clr P3.1

reti

end

Observations:

Frequency response of Low Pass filter with 328 Hz as Cut off frequency:
Coefficients obtained From MATLAB FDA-Tool are:

Tabulation:

Sl.no Input output

Amplitude(V) Frequency(Hz Amplitude(V Frequency(Hz)
 ) )
1 1 50 4.5 55.5
2 1 75 4.25 73.5
3 1 100 4.5 100
4 1 400 4.25 384.61(distorted
)
5 1.5 50 7 49.75
6 1.5 100 7.25 100
7 1.5 400 6.75 384.6(distorted)
8 2 50 distorted distorted
9 2 100 distorted distorted
10 2 400 distorted distorted

Conclusion:

The design of low pass FIR filter is done with the help of MATLAB and
Proteus and the outputs were observed and measured for frequencies below the
cut-off frequency and above the cut-off frequency