ECE 695R:

SYSTEM-ON-CHIP DESIGN
Module 3: Behavioral Synthesis
Lecture 3.5: Heuristic Scheduling – ASAP and ALAP

Anand Raghunathan
raghunathan@purdue.edu
Fall 2014, ME 1052, T Th 12:00PM-1:15PM
ECE 695R: System-on-Chip Design, Fall 2014 © 2013 Anand Raghunathan 1
 Heuristic Scheduling Techniques

• Unconstrained
– As soon as possible (ASAP)
– As late as possible (ALAP)
• Scheduling as a graph partitioning
problem
• List scheduling
• Force-directed scheduling

ECE 695R: System-on-Chip Design, Fall 2014 2

 ASAP Schedule: Example
Y = ((a*b)+c)+(d*e)-(f+g)

a
MUL
ADD
b
ADD
c
SUB Y
d
MUL
e
The execution cycle of each
f operation is the least one
ADD allowed by the dependencies
g

Clock cycle 1 2 3 4

ECE 695R: System-on-Chip Design, Fall 2014 3

 ASAP Scheduling Algorithm
ASAP (DFG G(V, E)) {
Terminology:
for each vi ∈ V { ti: start cycle of vi
if(vi is driven only by PIs) di: no. of cycles for vi
vj is a predecessor of vi
ti = 1; if (vj , vi ) ∈ E
}
repeat {
for each vi ∈ V {
if(predecessors of vi are all scheduled) {
Schedule vi by setting ti = MAX(tj + dj);
}
}
} until all the nodes are scheduled;
}
Q: What is the worst-case time complexity of this algorithm?

ECE 695R: System-on-Chip Design, Fall 2014 4

 ALAP Schedule: Example
Y = ((a*b)+c)+(d*e)-(f+g)

a
MUL
ADD
b
ADD
c
SUB Y
d
MUL The execution cycle
e of each operation is
the latest one
allowed by the
f dependencies and
ADD the latency
g constraint

Clock cycle 1 2 3 4
ECE 695R: System-on-Chip Design, Fall 2014 5
 ALAP Scheduling Algorithm
Terminology:
ALAP (DFG G(V, E), Time T) { ti: start cycle of vi
di: no. of cycles for vi
for each vi ∈ V { vj is a successor of vi
if(vi drives POs) if (vi, vj ) ∈ E
ti (execution cycle of vi) = T;
}
repeat {
for each vi ∈ V {
if(successors of vi are all scheduled) {
Schedule vi by setting ti = MIN(tj) - di;
}
}
} until all the nodes are scheduled;
}
Q: What is the worst-case time complexity of this algorithm?

ECE 695R: System-on-Chip Design, Fall 2014 6

 Mobility (or Slack)
Y = ((a*b)+c)+(d*e)-(f+g)

a
MUL
op1 ADD
b op4
ADD
c op5
Mobility SUB Y
d op6
MUL MUL
e op2 Mobility is the
Mobility difference of the
f execution cycles
ADD ADD computed by ALAP
g op3 and ASAP
scheduling
Clock cycle 1 2 3 4
ECE 695R: System-on-Chip Design, Fall 2014 7
 Scheduling as a Graph Partitioning Problem

• Given an acyclic data-flow

graph DFG = G(V, E)
1 2
• Partition it into sub-graphs 3 4
S1…Sk such that
– The reduced graph formed by 5
collapsing each partition into
a single vertex is acyclic Legal schedule
• Constraint ensures causality
is maintained
– Additional constraints
• Longest path between ops in 1
a single partition (limit clock
period) 2
• Number of operations of a
given type in a single 3
partition (limit area)
Illegal schedule
ECE 695R: System-on-Chip Design, Fall 2014 8