Sample Final Exam EECS388 - Fall 2020

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EECS388 Embedded Systems

Final Exam Sample – Fall 2020

NOTE: the final exam is cumulative. This document only includes sample questions
from the second half of the class.
Exam Guidelines:

1. You have 150 minutes to complete this exam.


2. This exam is open-book and open-note. You may use a calculator and the Internet,
But not Chegg.com or any website that solves the question for you!
3. You can search for keywords on the Internet during the exam, but you are not
allowed to copy-paste from the Internet! What you write in the exam should be
your own words.
4. Upload your work on problems if you wish to receive partial credit.
Note: You do not get any point if there is a mismatch between your notes and your
submitted answer.
5. The exam is meant to test your understanding. So be patient and read the
questions/problems carefully before you answer.

DO NOT do anything that might be perceived as cheating, such as:


• Sharing solutions with each other.
• Getting help from any human being other than yourself (your classmate, your
friend, family, a random guy over the Internet, etc. ) for solving a question.

• We have a zero-tolerance for cheating for the final exam.


• There are several implicit mechanisms in place for preventing you from cheating
and possibly detecting students who cheat. E.g., the questions and options are
reordered in the Blackboard, and there are different versions of the same exam.

 THIS IS NOT A REAL EXAM 


You are not going to get that many questions in the real one, do not worry.
Part 1 – True/False
Indicate true or false for each of the following statements:

1. A sound card is both ADC and DAC (T/F)

2. A negative feedback op-amp is used in an Analog to Digital Converter


(ADC) to convert output current to voltage. (T/F)

3. The output of a DAC is a current that is a function of the input binary


numbers and references current. (T/F)

4. We need a handshaking protocol to communicate with an


asynchronous ADC. (T/F)

5. Brushless motors are simpler than brushed motors. (T/F)

6. The speed of a motor can be controlled by changing its supply voltage.


7. Stepper motors are equipped with a position feedback device. (T/F)

8. We do not use interrupts for high-speed peripherals if interrupt


handling is expensive in our system. (T/F)

9. An interrupt-driven peripheral can stop the current execution of the


processor anytime. (T/F)

10. Interrupts can happen at any time and but they cannot stop the
execution of the processor at any time. (T/F)

11. Baremetal execution is always faster than OS-assisted execution


(assuming similar hardware config). (T/F)

12. Modern OSes are interrupt-driven. (T/F)


13. We cannot have interrupts in a bare-metal system. (T/F)

14. Process Control Block (PCB) is used for context switches in an OS.
(T/F)

15.Context switches improve the locality of reference in the memory.


(T/F)

16. Cooperative processes are non-deterministic. (T/F)

17. A real-time scheduler should always prioritize more critical tasks.


(T/F)

18. The priority of jobs dynamically changes in an EDF scheduler. (T/F)


19. There can be a task set scenario that is schedulable with Rate
Monotonic Scheduler (RMS) but not with EDF scheduler. (T/F)

20. L&L bound can prove that a task set is not schedulable with RMS.
(T/F)

21. The exact schedulability test calculates the total interference caused
by higher priority tasks for a lower priority task. (T/F)

22. It is impossible to have priority inversion in a system with two tasks.


(T/F)

23.Priority inherence protocol prevents certain deadlocks. (T/F)


Part 2 – Multiple Choice
Select the appropriate options for the following questions:

1. Why PWM is an effective way of controlling the speed of DC motors?


a. It’s a simple way of controlling the average power delivery to a
motor using a digital signal
b. The speed of the motor is directly proportional to supply voltage
c. Mechanical inertia smoothen the motor movement
d. All of the above

2. Which one do we use precise control of linear or angular position or


velocity
a. Stepper motors
b. DC motors
c. Servo motors
d. AC motors

3. Assume that we have a keyboard that is connected to a


microcontroller. When operating the keyboard in interrupt-driven
mode is most beneficial? Why? (multi-choice)
a. The inter-arrival time of keystrokes is fixed.
b. The inter-arrival time of keystrokes is unknown.
c. The average inter-arrival time of keystrokes is in the same order
as the micro controller’s frequency
d. The average inter-arrival time of keystrokes is orders of
magnitudes larger than the micro controller’s frequency
4. What is the purpose of having an “interrupt enable” bit in the status
register of an I/O device?
a. To enable/disable the operation of the device.
b. To enforce the permission for sending interrupts to the processor
from different I/O devices.
c. To identify that a device is ready to send an interrupt.
d. A and B

5. What do you store inside an interrupt vector table?


a. Interrupt vector table offset
b. A jump instruction to an address.
c. Interrupt service routine.
d. Interrupt vector number.

6. What is the Trap Handler in direct mode interrupts?


a. A sequence of instructions.
b. A function that finds out the cause of the interrupt and jumps
into an appropriate ISR.
c. Stores interrupt vector table.
d. A and B.
7. A process
a. Has a private stack and heap
b. Can have multiple threads of execution
c. Is a program in execution
d. All above.

8. Context switch overhead depends on


a. Memory speed
b. PCB size
c. Hardware support for context switch
d. All above.
Part 3 – Short Answer
Provide a short answer to the following questions:

1. What is the Vo in the following circuit considering that digital input


Digital = 0x56. Assume that the MSB of Digital is connected to the MSB
of DAC.

5.000 V = Vref
2. Consider the following connection between a microcontroller and a
DAC.
Part 1) Complete the function below to generate a step ramp considering
the resolution of the DAC.

𝐴1 𝐴2 𝐴3 𝐴4
𝑉𝑜𝑢𝑡 = 𝑉𝑟𝑒𝑓 ( + + + )
2 4 8 16

8-bit GPIO register


0 1 2 3 4 5 6 7

A3 A2 A1
µcontroller DAC

A4

int step_ramp()
{
int i = 0;
unsigned int ramp = 0;
for (i = 0; i < _________________ ; i++ ) {
uint8_t val = *(volatile uint32_t *) (GPIO_CTRL_ADDR +
GPIO_OUTPUT_VAL);
val &= ________________;
val |= ramp;
ramp = (ramp + 1) % 256;
*(______________ *) (GPIO_CTRL_ADDR + GPIO_OUTPUT_VAL)
= val;
}
return 0 ;
}
Part 2) What happens if we remove the line that is highlighted with blue?

3. What is the average voltage of the following PWM signal?

2ms

10 V

0
10ms
4. Assume that you have a processor that is connected over a network
adapter to the Internet. The network adapter receives packets with the
following inter-arrival time distribution:

Burst of packets No packets Burst of packets …

One of your EECS388 classmates developed a protocol called


“adaptive interrupts” for notifying the microcontroller of packet
arrivals at the network adapter:

By default, the network adapter is interrupt-driven, meaning that once a


packet is received, it sends an interrupt to the processor immediately. After
the first interrupt is received, we switch to polling, meaning that the processor
starts polling the network adapter for a short interval and then switch back to
interrupts again.

Do you endorse your classmate's protocol? Why?


9. Why do we want to check for interrupts after fully executing each
instruction inside the CPU?

10. Do you advise saving the content of the register file inside the
processor hardware or inside the software when an interrupt occurs?
Justify your choice?
11. Does the following figure show a valid case of handling interrupts
with the following priority levels?

(Lowest Priority) Program A < Device C < Device B (Highest priority)

12. Why do we need an operating system? Provide 4 reasons.


13. Classify the following processes based on their state. Use the
following state diagram.
Process 1: Accessing disk
Process 2: Executing a math operation
Process 3: Reading from memory
Process 4: keyboard interrupt handler
14. How much is the average context switch overhead in the following
example? Which process do you think has the largest context?

2.5ms 2.5ms

20ms 20ms
1ms 1ms

22ms 22ms
2.5ms 1ms

21ms 21ms

15. Compare shared memory and message passing. Count their


advantages and disadvantages.
16. Why is the biggest advantage of RMS over EDF scheduler?

17. What are the possible values of the counter after the execution of the
following threads?

Initial condition: counter = 5

Thread 1 Thread 2
R1 = load (counter); R2 = load (counter);

Acquire (lock); Acquire (lock);

R1 = R1 + 1; R2 = R2 – 1;

Release (lock); Release (lock);

counter = store (R1); counter = store (R2);


18. What is the priority of task 3 at time 1, 4, and 6 when with and without
priority inheritance protocol? Assume that the initial priority of the
tasks is: (highest priority) task#1 == 3 >task#2 == 2 > task#3 == 1 (lowerst
priority)
19.What is the priority ceiling of lock#a at time 1.5 and 4? Assume that
the priority of taks#1 == 2 and task#2 == 1

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