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    Tech Info JSB Tune Up

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    Tech Info JSB Tune Up

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    alan scape
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    japan

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    Tech info JSB Tune up

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    japan

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    54 views61 pages

    Tech Info JSB Tune Up

    Uploaded by

    alan scape
    japan

    Copyright:

    © All Rights Reserved
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    TECHNICAL DESCRIPTION FOR JSB-196GM TUNE UP Foo §2.1033(0)9),(13)] INDEX 1. CIRCUIT DESCRIPTIONS. 1.1 JSB-196GM_RADIOTELEPHONE 1A. CO1960 CONTROLUNIT 1.1.2 CMN-1960 TRXUNT 14.3 CAH-1960 PAUNIT 1.2. NFC-196 ANTENNA TUNER 1.21 CFG196 MATCHING UNT 1.3. NCT-196 _DSCTERMINAL 13.1 CDJ-1909 CONTROL BOARD 182 CQC-1962 MOTHER BOARD 133. CAF-450 WIKRE AMP coy1701 WIKCONTROL 2. TUNE UP PROCEDURE 24 JSBI96GM M/F RADIOTELEPHONE, 22 NCT-196 DSC TERMINAL 1. CIRCUIT DESCRIPTIONS 1.1 JSB-196GM RADIOTELEPHONE ‘The JSB-196 consists of the three units: Control UNIT(CDJ-1960), TRX UNIT(CMN- 1960) and PA UNIT(CAH-1960). ‘The Control unit controls the TRX unit, PA unit and Antenna Tuner, and panel block. ‘The panel block consists of a keypad, control dial, knob and LCD. ‘The TAX unit includes the Front-end block, IF block, DSP block, AF/Connection block and Synthesizer block. ‘The receiver employs the triple superheterodyne configuration: 1st IF of 70.455 MHz, ‘2nd IF of 455 kHz, and 3rd IF of 20.217 kHz. The input circuit employs the electronic tuning to improve the two-signal characteristic. The electronic tuning circuits also activated for the transmitter to suppress the spurious. The circuit tunes according to the control voltage from the CPU. ‘The transmitter block converts the audio signal from a microphone into 455 kHz, 70.455 MHz and desired frequency and drives the PA unit. “The DSP unit is operated a fitering, AGC, demodulation, noise reduction for reception, ‘and audio compressor, modulation, fitering for transmission. ‘The AF/Connection block consists of AF circuits for reception and transmission, voltage regulators, control switches circuit and connectors in the rear panel. The synthesizer block includes 20MHz oscillator circuit, 70MHz local circuits, 70.545 100.45499MHz frequency synthesizer circuit. “The PA unit amplifies the transmit signal from the TRX unit to the rated power supplies with the wide band direct linear amplifier. 4.1.1 CDJ-1960 CONTROL UNIT “This unit contro! the CMN-1960-S TRX UNIT and CAH-1860 (-S) PA UNIT and NFO- 496 ANTENNA TUNER, and displays and outputs the radio communication information, with keypad, control dial, knob, liquid crystal screen. CPU IC1 is a single-chip microprocessor with functions such as ports, timers, Serial WO, and A/D conversion. The GPU performs high speed processing at X1 frequency (18.6608MH2). The flash memory consists of IC2 providing up to $12k-bytes of program area and user definition storage area and user channel storage area. The parallel /O 1C3 provide the key scan and unit interface, supporting the panel keypad and control dial respectively. This circuit also includes analog circuits such as the MIC AMP and A/D conversion buffer circuit for the transmission power, antenna current, temperature, power supply voltage, RF GAIN, and CLARI. The DC-DG CONVERTER 1C6 and amplifier circuit IC20 provides the control voltage for RF variable tuning circuit. This unit includes the power supply voltage detection circuit consists of IC27 and its peripheral components. This circuit provides low voltage (7.9V) and high voltage detect (16.8V) and prevention of incorrect polarity. 1.4.2 CMN-1960 TRX UNIT ‘The CMN-1960 TAX UNIT consists of five blocks: FRONT-END, IF, DSP, AFICONNECTION and SYNTHESIZER. + FRONT-END block: “This block includes the FF tuning circuit mainly, and is used both in transmission and reception. It consists ofthe circuits that receive the incoming signal through the antenna terminal and convert it into the 70.485 kHz receiver IF signal, and the circuits that convert and ampiiy the 70.455 kHz transmitter IF signal into the desired transmit frequency. ‘The RF tuning, which is the main circuit in this block, consists of six frequency bands. One of the bands is selected according to the operating frequency by the decoder (IC51) and TRS1. For each band, a variable parallel tuning circuit is formed by the variable capacitors and transformers, and the variable double tuning method is employed to assure more sharp tuning characteristic, ( except for the 100kHz~1,600 kHz) The tuning frequency of the circuit is controled by the tuning voltage from the CONTROL UNIT. The tuning circuit is used both in transmission and reception. Table : Band Classification in RF Tuning Circuit Class __| Frequency Remarks 1 100kHz-0.4MHz LPF method 2 0.4MHz-1.6MHZ_ LPF method 3 4.6MHz-4.4MHz 4 4.4MHz-12.3MHz Variable double tuning 5 42.3MHz-20.5MHz method 6 20.5MH2-30MHz_ For reception, the incoming signal received through the antenna terminal passes through the input protection circuit (21, R1, CD1 — CD4), the 35 MHz LPF, sel-tests ‘switching relay (K1), 20 dB attenuator switching circuit, and enters the RF tuning circuit. The unwanted components of the incoming signal are eliminated by the RF tuning circuit, and the desired signal passes through the SSMHz LPF and is applied to the receiver RF amplifier (R151 and TR152). ‘The receiver RF amplifier uses low-noise junction FETs in gate ground to amplify the wide frequency range with high reliability and low noise. The output signal of the RF amplifier is mixed with the local signal by the mixer (TR1S3 and TR154), and converted into the 70.455 MHz receiver IF signal. This mixer employs the balanced type circuit and assures high receiver performance with the aid of the RF tuning circuit and receiver AF amplifier. The 70.455- 100.4548 MHz local signal supplied from the ‘Synthesizer block is amplified to the required level by TR161 and then supplied to receiver mixer circuits (TR1S3 and TR154) and the transmitter mixer circuit (10171). For transmission, the 70.455 MHz IF signal from the IF block is mixed with the local ‘signal by double balanced mixer (IC3) to convert into the desired transmit frequency signal. This signal s passes though the buffer amplifier (TA14), and the unwanted spurious components are eliminated by 35MHz LPF and the RF tuning circuit, which are also used for reception. ‘The transmit signal output from the RF tuning circuit is amplified by the TR21 and the wide band IC (1C22) to the level suitable for driving the POWER AMP UNIT. For self- test, the C22 exciter output is switched by the K31 relay. Transmit operation is judged by CD4tand IC41. + IF block: This block includes frequency conversion circuits for reception and transmission, For reception, the IF block converts the 70.455 MHz IF signal from the Front-end block into the 455 kHiz IF frequency and passes through the ceramic fiter, and converts the 455kHz IF signal into the 20.217kHz IF frequency. For transmission, the IF block converts the 20.217 kHiz IF signal from the DSP block into the 456 kHz IF frequency and passes through the ceramic filer, and converts the ‘485kHz IF signal into the 70.455KHz IF frequency. For reception, the 70.455 MHz IF signal from the Front-end block passes through the ‘monolithic filter {FL200), and is amplified by TR210. TR210 is the dual gate MOS FET and secures the satisfied AGC characteristic. TR210 output is mixed with the local signal (70MHz) from the ‘Synthesizer block by balanced FET mixer (TR220 and TR221), and converted into the ‘455 kHz IF signal. This local signal is amplified by TR222 and supplied to receiver mixer TR221 and TR222. ‘The output signal from TRZ21 and TR222 passes through the ceramic fiter (FL230) and is mixed with the local signal (434.783kHz) from DSP block by double balanced mixer IC (1C240), and is converted into the 20.217 kHz IF signal. The output signal from 1240 passes through the LPF, and is converted into the balanced line by the low noise OP amplifier (10260). For transmission, the 20.217kHz IF signal form the DSP block passes through the LPF by OP amplifier (IC380). The output signal from IC380 is mixed with the local signal {(434.783kHz) from DSP black by double balanced mixer IC (10290) and passes through the butter amplifier TR300. The output signal from TR300 passes through the ‘ceramic fiter (FL230) and is sent to 1C270. 1C270 is included the level controller and the mixer, The level controller controls the transmission power by the TX POWER CONT port from the CONTROL UNIT, The mixer converts into the 70.455kHz with the local signal (7OMHz) from Synthesizer block. The output signal from IC270 passes through the monolithic fiter (FL200) and is sent to the Front-end block. + DSP block: ‘The DSP block consists of A/D converter, D/A converter, DSP and PLD. ‘The AD converter(!C300) converts the received signal and the transmitting signal to 24 bit digital signal. ‘The D/A converter(IC310) converts the 20 bit digital signal to the demodulated analog signal ,the modulated analog signal and the AGC control voltage. The A/D converter and D/A converter are operated for 78.125kHiz sampling rate and communicate with the DSP IC. ‘The DSP IC is operated as follow: For reception; (1) fitering 2) ec (@) Demodulation (4) Noise reduction For transmission; (1) Audio compressor (2) Modulation (8) fitering The demodulation and the modulation are using the phased shift method. ‘The PLD(IC350) is generated the sampling clocks, serials interfaces clocks(MHz ‘and10MHz) and local signal (434.783kHz) from the 20MHz. 1C361,TR351,TR352 are level converter for interfaced with CONTROL UNIT. 16340 is a regulator with output of 3.3V for DSP IC. + AFICONNECTION block: This block consists of AF circuits for reception and transmission, voltage regulators, control switches circuit and connectors in the rear panel. For reception, the AF circuits amplify the demodulated signal from DSP block into the rated AF power. The demodulated signal passes through the LPF for OP amplifier (1400), and is controlied by Voltage Controlled Amplifier IC (IC410). One output signal from the IC410 is amplified by 1C420, and is sent to the speaker of the front panel via the speaker ON/OFF switching relay K420, and the extemal speaker connector (EXT SP) of the rear panel. The beep signal form the CONTROL UNIT is mixed in 1C420. Another output signal from IC410 is sent to OP amplifier (C400) and amplified to the 048m, For transmission, the AF circuits amplify the voice signal from the CONTROL UNIT ‘and the line input signal from rear panel. The voice signal and the line input signal from 16430 is switched by IC431 and passes through the OP amplifier (IC440), and is sent to the A/D converter for the DSP block. This block has two voltage regulators. 1C450 is a regulator with output of 9.0V. IC451 is a regulator with output of 5.0V. The switch circuit is consist of TR455, TR4S6, ‘TR4S7 and TR458, and controls the reception and the transmissic * SYNTHESIZER block: This block includes 20MHz oscillator circuit, 70MHz local circuits, 70.545- 100.45499MHz frequency synthesizer circuit. ‘The 20MHz oscillator circuit consists of the temperature compensated crystal oscilator (X610), the buffer amplifier (TR610, TR611, TR612, TR13) and LPF. The ‘waveform of the signal from the buffer amplifier is shaped by the LPF, and is supplied to the DSP block, ‘The signal from the buffer amplifier (TR611) supplied to 1/2 divider (IC610). The output signal from IC610 passes through buffer amplifier (R616) has harmonics. Through the BPF and the amplifier (TR700), the output frequency is selected 70MHz and is supplied to the IF block. ‘The 70.545-100.45499MHz frequency synthesizer circuit consists of the VCO, the butfer amplifier, DDS, BPF and PLL . The three VCO cover the frequency range of 70.545-100.4599MHz as follows: ‘R500 VCO1 70.545- 80.45499MHz TRS01 VCO2 80.545- 90.45499MHz TRES0 VCO3 '90.545-100.45499MHz “TRS06, TRS10 and TRES! are switching transistors of VCO1, VCO2 and VCO3.One of transistors is turned on according to frequency selected. The output signal from \VCO passes through the buffer amplifier (TRS02), and is supplied local amplifier (TR503, TRSO6-TRSOB). “The output from TRSOB passes through the LPF, and is supplied to the FRONT-END block as the 70.548-100.4599MHz. On the other hand, the output from TR503 passes through the amplifier (TR504 and TRS0S), and is supplied to the DDS IC (IC570). The DDS divides the input frequency. The division number is serially set by the CPU in the CONTROL UNIT. The output passes through the BPF, and is supplied PLL IC (10850). ‘The reference frequency is supplied by TR611. The err data form the phased detector in the PLL IC passes through TR670, TR671 and IC670, and is converted into the DC by LPF to control the frequency. The DC/DC convector (1C660) and the ripple filter (TR66O) regret the voltage and supply to PLL IC. 1.1.3 CAH-1960 PA UNIT ‘The CAH-1960 PA UNIT amplifies the output signal of the CMN-1960-S TRX UNIT (about 0.1 to 1mW) up to the rated power (150W) supplies with the wide band direct linear amplifier. ‘The power amplifier is composed of first stage amplifier circuit, emitter follower circuit, second stage amplifier circuit, driver amplifier circuit, power amplifier circuit, low-pass filter circuit, bias voltage supply circuit, output detection circuit. 4) First stage amplifier circuit ‘This first stage amplifier circuit, which consists of the TR1 transistor and the periphery, amplifies up to about SOmW by class A operation with the signal from ‘OMN-1960 TAX UNIT. 2) Emitter follower circuit This emitter follower circuit, which consists of transistors TR2 and RB, works as current buffer circuit and adjusts the input impedance of the second stage amplifier input. 3) Second stage amplifier circuit “This second stage amplifer circuit, which consists of the TRS transistor and the periphery, amplifies the output level (obtained from the impedance conversion through transformer T1) up to the power (about 1W). This circuit uses the negative feedback circuit hat consists of RS and C5, improves the frequency response and stabilizes the bias. 4) Driver amplifier circuit This driver amplifier circuit, which consists of the TA4 and TRS transistors, is @ circuit which is called SEPP (Single Ended Push Pull). Transformer 71 distributes the output from the second stage amplifier circuit, and the impedance is converted with transformers T2 and T3. Then each signal amplified by the Transistor, is combined again by transformer TS and amplified to the level of 10 to 20W. 5) Power amplifier circuit “This power amplifier circuit, which consists of the TR6 through TAS transistors, has two same circuits. Transformer TS distributes the output from the driver amplifier land equally split the power into each power amplifier, and the impedance is converted with transformer T7 and TS. Then the input signal amplified by the each power amplifier, is combined again by transformer T13 and amplified to the level of 150W. 6) Low-pass filter circuit ‘This low-pass filter circuit attenuates the harmonic component of the power ‘amplifier output by more than approximately 3048 using the appropriate filter for the transmission frequency from the six filter circuits. 7) Bias voltage supply circuit ‘The keying signal from the CDJ-1960 CONTROL UNIT switches TR20 and TR22, and supplies the bias voltage to the TRS through TRS transistors. 8) Output detection circuit “This circuit detects forward-wave and reflection-wave levels, and compares these levels. If an abnormality (SWA>3) occurs in the power amplifiers load impedance, the comparator switch the D-latch IC3 and tum off the bias voltage supply circuit. 1.2 NFC-196 ANTENNA TUNER, 1.2.1 CFG-196 MATCHING UNIT ‘The MATCHUNG unit performs matching in combination of ten series inductors (binary step) and the six parallel capacitors arranged in input or the five parallel capacitors arranged in the antenna terminal. These inductors and capacitors are switched by relays under CPU (IC1) control. IC1, which is a single chip microcomputer, has builtin functions such as serial 10, parallel 10, and A/D converter. Serial 10 is used for communication with the ‘Transceiver. Parallel IO is used for detection of other sensors and relay control. A/D converter is used for SWR sensor detection. 1C14 is phase sensor that indicate whether L-phase or C- L:phase in the matching circuit input side. IC12 is load sensor that indicate whether greater than 50 ohms or less than or 50 ‘ohms in the matching circuit input side. 1C10 is SWR sensor that indicates the SWA status in the matching circuit input side, Based on these sensor information, the CPU operates automatic tuning as follows: When the TUNE key on the transcelver panel is pressed, the transceiver sends a tuning request command to the antenna tuner. When it receives this command, the CPU sends a power request command to the transceiver to transmit by tuning power (6W

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