IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 64, NO.

8, AUGUST 2017 2219

Error Detection Technique for a Median Filter

Luis Alberto Aranda, Pedro Reviriego, and Juan Antonio Maestro

Abstract— In digital image processing systems, the acquisition

stage may capture impulsive noise along with the image. This
physical phenomenon is commonly referred to as “salt-and-
pepper” noise. The median filter is a nonlinear image processing
operation used to remove this impulsive noise from images.
This digital filter can be implemented in hardware to speed up
the algorithm. However, an SRAM-based field-programmable
gate array implementation of this filter is then susceptible to
configuration memory bit flips induced by single event upsets,
so a protection technique is needed for critical applications in
which the proper filter operation must be ensured. In this paper,
a fault-tolerant implementation of the median filter is presented
and studied in-depth. Our protection technique checks if the
median output is within a dynamic range created with the
remaining nonmedian outputs. An output error signal is activated
if a corrupted image pixel is detected, then a partial or complete
reconfiguration can be performed to remove the configuration
memory error. Experimental results show that our technique
detects enough corrupted pixels in an image to prevent 91% of
the corrupted images from being erroneously sent to the next
image processing operation. This high error detection rate is
Fig. 1. Effects of impulsive noise in an image and median filter restoration
achieved introducing only a 35% of additional resource overhead.
results. (a) Original Lena image. (b) Corrupted Lena image with 10% salt-
Index Terms— Configuration memory, image processing, and-pepper noise. (c) Corrupted Lena image with 20% salt-and-pepper noise.
median filter, single event upset (SEU), soft error, SRAM-based (d) Original Lena image filtered. (e) 10% salt-and-pepper noise Lena image
field-programmable gate array (FPGA). restored. (f) 20% salt-and-pepper noise Lena image restored.

I. I NTRODUCTION in a large number of operations per second, which makes

D IGITAL image sensors are widely used in space appli-

cations, so space radiation can affect the sensor or the
image processing system itself. Energetic particles can collide
with vulnerable parts in the device (i.e., transistors) leading
to, for example, single event upsets (SEUs). Image sensors
often acquire undesirable noise along with the captured image
frame, so it is important to repair these corrupted pixels to
facilitate subsequent image processing operations such as edge
detection or object recognition [1]. In order to remove this
noise, image filtering and enhancement is usually performed
immediately after the image is captured and before any other
image processing operation. This approach avoids propagating
the input noise, obtaining better resulting images [2].
Different image filtering techniques can be used to remove
noise [3], however, they are usually required to perform several
mathematical operations on each image pixel to obtain the
desired modified version of the input image. This results
Manuscript received October 10, 2016; revised February 5, 2017 and
February 5, 2017; accepted February 7, 2017. Date of publication February 9,
2017; date of current version August 15, 2017. This work was supported
by the Spanish Ministry of Economy and Competitiveness under
Grant ESP2014-54505-C2-1-R.
The authors are with the ARIES Research Center, Universidad Antonio
de Nebrija, 55 E-28040 Madrid, Spain (e-mail: laranda@nebrija.es;
previrie@nebrija.es; jmaestro@nebrija.es).
Color versions of one or more of the figures in this paper are available
online at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TNS.2017.2666843
0018-9499 © 2017 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
field-programmable gate arrays (FPGAs) an alternative to
the classic implementation of image processing algorithms in
microprocessors. In particular, SRAM-based FPGAs provide
high performance, high densities, and low cost, while allowing
a practically unlimited number of reconfigurations [4].
Moreover, a reprogrammable logic offers the additional benefit
of on-the-fly changes, so image processing applications can be
evolved to meet more complex requirements.
Acquisition noise in digital image processing systems
may be composed of impulsive noise such as hot and dead
pixels [5]. The term “hot pixel” describes those pixels that
are much brighter than surrounding pixels, and the term
“dead pixel” refers to those permanently off. When both
physical phenomena appear together in the same image they
are commonly referred to as “salt-and-pepper” noise, and are
mainly caused by charge leakages within the image sensor
chip [6]. The first three images in Fig. 1 illustrate the effects
of impulsive noise in an image.
The median filter is a nonlinear image processing operation.
In contrast to linear filters, nonlinear filters are preferred
against impulsive noise due to their robustness and denoising
power [7]. In particular, the median filter can efficiently atten-
uate the effects of low percentages of this “salt-and-pepper”
noise while preserving the edges of the objects existing in
the image. The denoising power of the median filter can be
observed in Fig. 1(d)–(f).

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 2220
Fig. 2. (a) Original, (b) median filtered, and (c) bad filtered Lena image [10].
As mentioned before, SRAM-based FPGAs provide high
performance that can be exploited by image processing
systems to speed up their algorithms. However, SRAM-based
FPGAs are also vulnerable to radiation effects, so an
implementation of the median filter in these devices can
be susceptible to SEUs in the FPGA configuration memory
SRAM cells, changing the median filter functionalities perma-
nently until the original bitstream is reloaded. An example of
a median filter malfunction due to an SEU in the SRAM-based
FPGA configuration memory is illustrated in Fig. 2(c).
Redundancy-based techniques such as dual modular redun-
dancy (DMR) or reduced precision redundancy (RPR) are
typically used to protect digital filters [8], [9]. The main
difference between these techniques is that the RPR method
combines the main circuit with a low precision replica to
detect errors in the most significant bits (MSBs), instead
of using a full precision replica as happens in the DMR
scheme. This means that least significant bits (LSBs) changes
cannot be detected with RPR, but less resource overhead
is added. This paper is an extension of our paper about a
fault-tolerant implementation of the median filter presented
in [10]. Our technique checks if the median output value is
within a dynamic range created each time with the remaining
nonmedian outputs. The implemented design is tested with
several 8-b grayscale 128 × 128 images, and is compared
to DMR and RPR schemes. Experimental results show that,
although our technique cannot detect as many corrupted pixels
as the DMR scheme, it detects enough to prevent 91% of the
corrupted images from being erroneously processed by the
next image processing operation.
This paper is organized as follows. Section II introduces
an FPGA implementation of the original median filter.
In Section III, the proposed fault-tolerant median filter design
is presented. The experimental setup and new results are
described in Sections IV and V, respectively, and, finally,
Section VI concludes this paper.
II. M EDIAN F ILTER
The median filter is a nonlinear image processing technique
used to remove impulsive noise from images. This spatial
filtering operation applies a 2-D window mask to an image
region and replaces its original center pixel value with the
median value of the pixels contained within the window. The
window is then moved to the next image region and the cycle
is repeated until the entire image is processed. As a result,
the ideal filtered image would have no impulsive noise and
perfectly sharp edges. These are intrinsic properties of the
median filter that cannot be achieved by traditional linear
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IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 64, NO. 8, AUGUST 2017
Fig. 3. Median substitution process [10].
filtering techniques without resorting to time-consuming data
manipulations [11]. However, the median filter is not an ideal
filtering operator, and edge preservation worsens as the total
percentage of impulsive noise increases.
In sliding window filtering, the 2-D window is defined as an
N-by-N square kernel (for odd N) whose center is positioned
in the currently processed pixel. N being odd ensures a well-
defined center to the window. The window size N can be
increased in order to remove higher percentages of shot noise,
however, this also causes more image blurring. Thus, a typical
3×3 pixels square window has been chosen in this paper.
Fig. 3 illustrates the described median substitution process
with a 3×3 pixels square window. It should be noted that the
analyzed “dead pixel” is removed from the original image.
In order to process every image pixel, the 3×3 square
window should be moved through the image. However, in
FPGAs, this can also be achieved using a nine-pixel stream
that sequentially passes through the median filter. Each group
of nine pixels can be sorted using a structure composed of
two-input exchange nodes as the one illustrated in Fig. 4. The
exchange node in Fig. 4 performs a two-input sorting using an
8-b comparator and two 2:1 multiplexers. The two inputs are
internally compared and the higher (H) and lower (L) values
are obtained.
The classic sorting network structure shown in Fig. 5
uses 41 basic nodes. In this figure, each box is an identical
exchange node as the one illustrated in Fig. 4. This classic
implementation has proven to be far from optimal since
improved FPGA implementations have been developed over
the years [12]–[15]. Using the Batcher bitonic sorter [16],
a nine-input sorting network can be created [17]. This
 ARANDA et al.: ERROR DETECTION TECHNIQUE FOR A MEDIAN FILTER
Fig. 4. Internal diagram of one exchange node [10].
Fig. 5. Classic exchange network scheme for nine input pixels.
Fig. 6. Minimum exchange network scheme for nine input pixels [10].
sorting network, composed of 28 basic nodes, significantly
reduces the amount of FPGA resources used. However, the
architecture proposed in [18] has been followed in this paper
since it uses the minimum number of exchange nodes. In this
network, the resource usage minimization is achieved because
it performs a nine-pixel partial sorting, which means that
higher and lower output pixel values are unsorted. This is not
a problem since only the median value is needed to replace
the center pixel. Fig. 6 illustrates this optimal scheme.
III. P ROPOSED T ECHNIQUE
Configuration memory errors in SRAM-based FPGAs mod-
ify the design functionalities permanently until the original
bitstream is reloaded. A redundant scheme can identify and
mitigate user register errors. However, in order to remove
these configuration errors, it is more practical to detect and
then reconfigure partially or completely the faulty design. For
this reason, the proposed fault-tolerant technique activates an
output error signal if a corrupted image pixel is detected.
Then, a partial or complete reconfiguration can be performed
to remove the permanent error.
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2221
Fig. 7. Proposed technique [10].
Fig. 8. Numerical example of range values calculation [10].
Fig. 7 illustrates the proposed technique. Gray-shaded
blocks are added to the original scheme of Fig. 6 in order
to create a range with the nonmedian outputs. The range
is dynamically determined for each nine pixel group using
identical exchange nodes to the one shown in Fig. 4. The
upper range (H3 low output) is calculated as the lower
value from the four higher input values, and the lower range
(L 3 high output) is obtained using the higher value from the
four lower input pixel values. Once the range is calculated,
two 8-b comparators check if the median output value is
within the range, and set their output signals to 0 if the
condition is satisfied or 1 otherwise.
For a better understanding of the error detection mechanism
a numerical example is presented in Fig. 8, where the median
value is delimited by the two closest nonmedian outputs.
As can be observed in this figure, the four highest pixel values
(95, 92, 90, and 75) are sorted with the H1 , H2 , and H3 blocks,
obtaining 75 as the upper range. At the same time, the four
lowest values (10, 20, 50, and 53) are sorted with L 1 , L 2 ,
and L 3 , obtaining 53 as the lower range. Thus, if the median is
not contained within these values, a malfunction has occurred.
The median filter is a pure combinational circuit, so SEUs
in the SRAM-based FPGA configuration memory can modify
the internal routing, changing the behavior of the median
sorting network. This may cause a bad median calculation or
a nonmedian input value modification (i.e., the median value
is correctly calculated but other inputs are corrupted during
the shortening process). Both errors can be detected by the
proposed technique if the median value is out of range, or the
calculation of the range itself creates a never-satisfied range
condition. Our method does not detect in-range value changes.
However, the impact of in-range median value changes is low,
as demonstrated in the following section.
IV. E XPERIMENTAL S ETUP
The proposed technique has been compared in terms
of resource utilization and error detection rate with
 2222
TABLE I
U TILIZATION R EPORT
Fig. 9. Standard test images. (a) Baboon. (b) Boat. (c) Cameraman.
(d) House. (e) Lena. (f) Peppers [10].
DMR and RPR schemes. These schemes have been selected
since configuration bits errors can only be corrected with a
partial or complete FPGA reconfiguration, so it is more appro-
priate to detect the error and execute the reconfiguration of the
device. A DMR system consists of two fully redundant copies
of the median filter with a comparator that detects incorrect
behaviors. The RPR method uses a replica of the original
median filter with reduced precision exchange nodes. The four
MSBs of the 8-b input pixels are processed and compared to
the median output MSBs. Therefore, LSBs changes cannot be
detected, but less resource overhead is added.
These two methods and the proposed technique have
been implemented in the SRAM-based FPGA part of a
Xilinx Zynq-7000 all programmable system on a chip [19].
They have been compared to the original unprotected median
filter, obtaining the utilization report presented in Table I.
As can be observed in this table, the number of lookup
tables (LUTs) is, as expected, doubled in the DMR imple-
mentation, while the proposed error detection technique only
requires 35% of additional logic resources.
First, the proper operation of the three studied methods is
validated against the standard 8-b grayscale images shown in
Fig. 9. Then, the uncorrupted median filtered (golden) images
are stored for subsequent comparisons.
Once the golden filtered images are obtained, an exhaustive
fault injection-correction loop is executed using the Xilinx Soft
Error Mitigation (SEM) IP Controller [20]. The SEM IP is an
independent circuit that enables read/write operations in the
FPGA configuration memory through the internal configura-
tion access port. In each iteration, a design under test (DUT)
configuration memory bit is flipped, then a test image is
processed and the golden comparison results are stored.
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IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 64, NO. 8, AUGUST 2017
Fig. 10. Fault-injection flowchart.
Fig. 11. Fault-injection framework [10].
Finally, the bit flip is corrected and the loop is repeated until all
the DUT-related bits are covered. The described fault-injection
flowchart is illustrated in Fig. 10.
For a better understanding of the described flowchart, the
fault-injection framework is presented in Fig. 11. This figure
represents the elements that are loaded in the SRAM-based
FPGA. Those modules that are grouped together inside the
gray-shaded “Testbench” box are not affected by the fault
injector, this is, only the DUT-related configuration memory
bits are flipped.
The exhaustive fault injection-correction loop is performed
for each error detection technique with all the standard test
images, obtaining an image-level and a pixel-level report for
each image and technique. An image-level report includes
the number of corrupted and uncorrupted images that the
technique has detected, while a pixel-level report contains
the total number of corrupted and uncorrupted pixels that the
technique has detected. So, with these reports, an estimation
of the number of corrupted pixels per image can be calculated,
as will be presented later in the next section.
V. E XPERIMENTAL R ESULTS
In this section, the proposed technique and the DMR and
RPR schemes have been studied in terms of error detection
 ARANDA et al.: ERROR DETECTION TECHNIQUE FOR A MEDIAN FILTER
TABLE II
AVERAGED FAULT-I NJECTION R EPORT (I MAGE -L EVEL )
TABLE III
AVERAGED E RROR D ETECTION R EPORT (I MAGE -L EVEL )
capabilities. In order to illustrate the differences between these
three methods, three tests have been performed. First, in
Section V-A, the fault injection results have been summarized
in image-level reports. Meaning that the configuration memory
bit flip is performed and then the entire image in pixel-
stream format is processed by the median filter. If at least
one erroneous pixel is detected, then the image is classified
as corrupted but detected. In Section V-B, these image-level
reports are subdivided collecting the individual erroneous pixel
values per image. This way, the total number of corrupted but
detected pixels can be determined. Finally, in Section V-C,
the input test images are analyzed to prove that they cover a
wide variety of input scenarios. The purpose of this analysis
is to test that the error detection capabilities of the studied
techniques are not dependent of the inputs.
A. Image-Level Results
An image-level report gives us information about the per-
centage of corrupted/uncorrupted images detected/undetected
by the technique. The eighteen image-level error reports have
been summarized in Tables II and III.
In Table II, the average number of corrupted and uncor-
rupted images is presented for each technique. It should be
noticed that the number of injections needed to cover the
DMR scheme is higher due to its bigger resource usage.
Table III shows the error detection rate and the mean-square
error (MSE). It can be observed that the proposed technique
detects 91% of the corrupted images, while the RPR scheme,
due to its reduced precision, only achieves a detection rate
of 48%. This 91% of detection rate is still far from the
expected 99% of the DMR, however, our method presents
less number of false positives, which means that less detected
errors occur when no design malfunction is observed. The
number of false positives is related with the resource overhead
added to the original design. Therefore, the bigger the error
detection branch, the higher the number of false positives.
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TABLE IV
AVERAGED E RROR D ETECTION R EPORT (P IXEL -L EVEL )
In SRAM-based FPGAs, these false detections mean that an
undesirable reconfiguration is performed, so reprogramming
time and power are wasted. In addition to the waste of time,
the filter is not operational during the reconfiguration time, so
it can be critical depending on the application.
Table III also presents the MSE value of the undetected
images. MSE is calculated using (1), where Pi represents the
original uncorrupted median pixel values, and P i the observed
pixel values

N−1
MSE = [Pi − P i ]2 . (1)
i=0
Our proposed scheme presents the lowest averaged MSE
value of the three studied techniques. This means that the
corrupted pixel values of the undetected images are closer
to the uncorrupted golden image, so these corrupted pixels
can be used by the following image processing steps without
significantly altering the final results.
B. Pixel-Level Results
A pixel-level report summarizes the total percentage of
corrupted pixels detected. This additional information is useful
to understand how each technique works at low-level. Table IV
presents the average number of corrupted pixels detected
by each technique. As can be observed in this table, the
proposed implementation detects 59% of the total number
of pixels in average, however, as was observed in Table III,
it also detects 91% of corrupted images. This is because one
corrupted pixel detected is enough to classify an image as
corrupted but detected. Here lies the difference with DMR.
As mentioned before, DMR consists of two fully redundant
copies of the original design for the purpose of detecting any
small change in the design. This implies a high detection
rate but also a high resource usage. Conversely, our detection
technique is optimized in terms of resource usage to detect
some particular cases when the median value is outside the
limits of a dynamic range.
Our technique cannot detect those cases when the created
dynamic range is large or the changes in the median value are
small, because the median value still remains within the range.
In order to evaluate this behavior, the detected/undetected pixel
values have been split into LSBs and MSBs changes in the
median value. This is, the configuration memory error has
modified the median value in less or equal than 15 (four LSBs)
or in more or equal than 16 (four MSBs changes). Table V
shows this pixel classification.
As can be observed in this table, almost all the corrupted
pixels detected by the RPR technique are those whose value
 2224 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 64, NO. 8, AUGUST 2017

TABLE V
AVERAGED E RROR D ETECTION C LASSIFICATION (P IXEL -L EVEL )

Fig. 12. Stars image to test the homogeneous regions assumption.

TABLE VI
AVERAGED N UMBER OF C ORRUPTED P IXELS PER I MAGE

changes take place in the most significant part. This is

reasonable since the RPR only compares the four MSBs
of the median output. Undetected MSBs changes affect
more the resultant image in terms of magnitude and visual
appearance, and it can worsen due to the error propagation to Fig. 13. Comparison of the total number of corrupted pixels per image.
successive image processing operations so, in this case, the
DMR scheme exhibits the worst behavior with a 24.8% of TABLE VII
undetected MSBs changes. S TARS I MAGE E RROR D ETECTION R EPORT (I MAGE -L EVEL )

C. Test Images Analysis

During experimental data gathering, it was observed that
the number of corrupted pixels varied depending on the test
image used. An estimation of the number of corrupted pixels
per image was performed to figure out the reason. These values
have been collected in Table VI.
Analyzing Table VI, it can be concluded that Cameraman
and House images have fewer corrupted pixels than the other
test images, so they must share a common feature. Looking
at Fig. 9, it can be deduced that both images have several
homogeneous color regions. This means that, when the median
filter goes through these regions, many median filter inputs will
be equal to each other, so a median value change is less prob-
able due to a filter exchange network malfunction, resulting
in an uncorrupted median pixel value. In order to prove this
assumption, a new test image with large homogeneous color
regions was selected. This figure is presented in Fig. 12.
A new exhaustive fault-injection/correction campaign was
performed for each error detection technique using Fig. 12
as input. Fig. 13 summarizes these new results and compares
them with the previous values presented in Table VI. As this
figure shows, the homogeneous regions assumption seems to
make sense.
The “homogeneous regions” feature exhibited by Stars
image has been studied to verify that the selected test images
cover a wide variety of scenarios, and that the error detection
rates are not highly dependent on the input images. Table VII
shows the fault-injection results at image-level.
A visual comparison between the results collected in
Tables III and VII is presented in Fig. 14.
As can be observed in Fig. 14, the error detection capabili-
ties of the RPR method are greatly affected by this new input
image, while the DMR and proposed technique capabilities
remain almost unchanged. This phenomenon can be explained
since the RPR method cannot detect LSBs changes, and most
of the Stars image pixel values are close to zero (black color),
so most of the pixel value changes will not be detected by this
method.
The pixel-level analysis has also been performed to under-
stand how each technique works with the Stars image as input.
Results are summarized in Table VIII.

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 ARANDA et al.: ERROR DETECTION TECHNIQUE FOR A MEDIAN FILTER
Fig. 14. Detection rates and false positives comparisons between Stars image
and the averaged case.
TABLE VIII
S TARS I MAGE E RROR D ETECTION C LASSIFICATION (P IXEL -L EVEL )
Fig. 15. Undetected LSBs and MSBs comparison between Stars image and
the averaged case.
In a similar way to the previous image-level analysis, results
from Tables V and VIII are compared in Fig. 15.
The pixel-level comparison in Fig. 15 reveals that the
percentage of undetected MSBs changes has decreased in each
technique. It should be noticed that now, in the Stars image
case, the proposed technique exhibits the worst behavior with
a 15.6% of undetected MSBs changes. However, looking at
Table VII, it can also be observed that the MSE value is lower
in our proposed technique than in the DMR or RPR schemes,
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2225
Fig. 16. Percentage of detected images for each technique and test image.
Fig. 17. Percentage of false positives detections for each technique and test
image.
so our technique is still better for these “homogeneous
regions” images.
Finally, in order to conclude this test images analysis, the
individual image-level results for each test image and error
detection technique are displayed in Figs. 16 and 17. These
figures illustrate that the RPR scheme is dependent on the input
images, so it is not appropriate for some particular applications
in which the input image color is mainly black. Conversely, the
error detection rate of the proposed technique is not affected
by the input images or the homogeneous image regions.
In short, three different experimental analyses have been
performed in this section. As the image-level experiment
shows, there is always a tradeoff between detection rate and
FPGA resource usage, and the DMR scheme, as expected, has
the best image error detection rate (99%), but a resource usage
of 100% needs to be added to the original design in exchange.
However, with our technique, a significant saving in terms of
resource utilization can be reached (35%) losing only a 8% of
detection rate. This lower overhead means that a lower number
of false positive detections are performed and, consequently,
less undesirable reconfigurations. The pixel-level study shows
that, although our technique cannot detect as many corrupted
pixels as the DMR scheme, it detects enough to prevent 91%
of the corrupted images from being erroneously processed
by the next image processing module. The remaining 9% of
undetected images presents a lower MSE value than the DMR,
which means that the image damage propagation to successive
image processing operations is minimized. Finally, the test
 2226
images analysis proves that the selected images cover a wide
variety of scenarios and that the error detection rate of the
proposed technique is not affected by the input images.
VI. C ONCLUSION
This paper is an extension of our previous work presented in
[10] about a fault-tolerant implementation of the median filter.
Our proposed technique checks if the median output value is
within a dynamic range created each time with the remaining
nonmedian outputs.
The proposed technique has been compared in terms of
resource utilization and error detection rate with DMR and
RPR schemes. The design has been implemented in a Xilinx
SRAM-based FPGA and several fault-injection campaigns
have been performed. Image-level experimental results show
that, adding 35% of FPGA resources to the original design,
91% of the corrupted images can be detected. This lower over-
head means that a lower number of false positive detections
are performed, so less reprogramming time is wasted and,
consequently, the time that the median filter is not operational
due to the reconfiguration is minimized.
Pixel-level results show that images with homogeneous
pixel-value regions are less susceptible to be corrupted when
processed by a configuration memory damaged median filter.
More homogeneous pixel-value regions imply more median
filter inputs with equal values, so the probability that a median
filter malfunction alters the median value is decreased.
The test images have also been analyzed to prove that
they cover different input scenarios. These experiments have
revealed that the RPR method is dependent on the input
images, while the detection rate of our proposed technique
is not affected by the input images.
In conclusion, although our technique cannot detect as many
corrupted pixels as the DMR scheme, it detects enough to
prevent 91% of the corrupted images from being erroneously
processed by the next image processing module. Moreover,
the remaining 9% of undetected images presents a lower
MSE value than the DMR, which means that the image
damage propagation to successive image processing operations
is minimized.
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