Descriptio: Features

LTC1100
Precision, Zero-Drift
Instrumentation Amplifier
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FEATURES DESCRIPTIO
■ Offset Voltage: 10µV Max The LTC®1100 is a high precision instrumentation amplifier
■ Offset Voltage Drift: 100nV/°C Max using zero-drift techniques to achieve outstanding DC
■ Bias Current: 65pA Max performance. The input DC offset is typically 1µV while
■ Offset Current: 65pA Max the DC offset drift is typically 5nV/°C; a very low bias
■ Gain Nonlinearity: 20ppm Max current of 65pA is also achieved.
■ Gain Error: ±0.075% Max
The LTC1100 is self-contained; that is, it achieves a differ-
■ CMRR: 90dB
ential gain of 100 without any external gain setting resistor
■ 0.1Hz to 10Hz Noise: 1.9µVP-P
or trim pot. The gain linearity is 20ppm and the gain drift is
■ Single 5V Supply Operation
4ppm/°C. The LTC1100 operates from a single 5V supply
■ 8-Pin MiniDIP
up to ±8V. The output typically swings 300mV from its
U power supply rails with a 10k load.
APPLICATIO S An optional external capacitor can be added from Pin 7 to
■ Thermocouple Amplifiers Pin 8 to tailor the device’s 18kHz bandwidth and to
■ Strain Gauge Amplifiers eliminate any unwanted noise pickup.
■ Differential to Single-Ended Converters
The LTC1100 is also offered in a 16-pin surface mount
package with selectable gains of 10 or 100.
The LTC1100 is manufactured using Linear Technology’s
enhanced LTCMOSTM silicon gate process.
, LTC and LT are registered trademarks of Linear Technology Corporation.
LTCMOS is a trademark of Linear Technology Corporation
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TYPICAL APPLICATIO
Single 5V Supply, DC Instrumentation Amplifier
1 8
VOUT
2 7 0.01µF
LTC1100
3 6
–VIN VIN
4 5
V+ = 5V
0.1µF
VOUT = 100 [VIN – (–VIN)] LTC1100 • TA01
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LTC1100
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ABSOLUTE AXI U RATI GS (Note 1)
Operating Temperature Range Storage Temperature Range ................ −65°C to 150°C
LTC1100M/AM (OBSOLETE) ........... −55°C to 125°C Total Supply Voltage (V + to V −) ............................. 18V
LTC1100C ......................................... −40°C to 85°C Input Voltage ....................... (V + + 0.3V) to (V − − 0.3V)
Output Short Circuit Duration ......................... Indefinite Lead Temperature (Soldering, 10 sec)................. 300°C
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PACKAGE/ORDER I FOR ATIO
TOP VIEW ORDER PART TOP VIEW
ORDER PART
GND REF 1 8 VOUT NUMBER NC 1 16 NC
NUMBER
CMRR 2 7 COMP
–VIN 3 6 VIN
LTC1100CN8 GND REF 2 15 VOUT LTC1100CSW
G = 10 3 14 G = 10
V– 4 5 V+
CMRR 4 13 COMP
N8 PACKAGE NC 5 12 NC
8-LEAD PDIP
–VIN 6 11 VIN
TJMAX = 110°C, θJA = 130°C/W
V– 7 10 V+
J PACKAGE
8-LEAD CERDIP
LTC1100CJ8 NC 8 9 NC
TJMAX = 150°C, θJA = 100°C/W LTC1100AMJ8 SW PACKAGE
LTC1100MJ8 16-LEAD PLASTIC SO WIDE
OBSOLETE PACKAGE TJMAX = 110°C, θJA = 100°C/W

Consider the N Package for an Alternate Source
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = ± 5V, R L = 10k, C C = 1000pF, unless otherwise noted.
LTC1100ACN LTC1100CN/CJ
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Gain Error 0.01 0.05 0.01 0.075 ±%
● 0.10 0.150 ±%
Gain Nonlinearity 3 8 3 20 ppm
● 12 30 12 60 ppm
Input Offset Voltage (Note 2) ±1 ±10 ±1 ±10 µV
Input Offset Voltage Drift (Note 2) ● ±5 ±100 ±5 ±100 nV/°C
Input Noise Voltage DC to 10Hz, TA = 25°C 1.9 1.9 µVP-P
Input Bias Current 2.5 50 2.5 65 pA
● 120 135 pA
Input Offset Current ● 10 50 10 65 pA
Common Mode Rejection Ratio VCM = 2.3V to −4.7V (Note 3) ● 104 115 90 110 dB
Power Supply Rejection Ratio VS = ±2.375V to ±8V ● 120 105 dB
Output Voltage Swing RL = 2k, VS = ±8V ● – 7.2 6.2 – 7.2 6.2 V
RL =10k, VS = ±8V ● – 7.7 7.5 – 7.7 7.5 V
Supply Current 2.4 2.8 2.4 3.3 mA
● 3.4 4.0 3.4 4.5 mA
Internal Sampling Frequency 2.8 2.8 kHz
Bandwidth 18 18 kHz
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2
LTC1100
LTC1100AMJ (Note 4) LTC1100MJ
Gain Error 0.01 0.05 0.01 0.075 ±%
● 0.11 0.150 ±%
Gain Nonlinearity 3 8 3 20 ppm
● 40 65 ppm
Input Bias Current 5 50 5 65 pA
● 300 450 pA
Input Offset Current ● 80 120 pA
Common Mode Rejection Ratio VCM = −4.7V to 2.3V ● 100 90 dB
Output Voltage Swing RL = 10k, VS = ±8V ● – 7.4 7.4 – 7.4 7.4 V
RL = 2k, VS = ±8V ● – 7.0 6.0 – 7.0 6.0 V
Supply Current 2.4 2.4 3.3 mA
● 4.2 4.6 mA
Bandwidth 18 18 kHz
temperature range, otherwise specifications are at TA = 25°C. VS = ± 5V, R L = 10k, C C = 1000pF, unless otherwise specified.
LTC1100ACS LTC1100CSW
Gain Error TA = 25°C, A V =100 0.01 0.05 0.01 0.075 ±%
A V =100 ● 0.10 0.150 ±%
A V =10 0.01 0.04 0.01 0.060 ±%
A V =10 ● 0.10 0.150 ±%
Gain Nonlinearity TA = 25°C, A V =100 3 8 3 20 ppm
A V =100 ● 12 30 12 60 ppm
A V =10 1 8 1 10 ppm
A V =10 ● 25 40 ppm
Input Bias Current 2.5 50 2.5 65 pA
● 120 135 pA
Input Offset Current ● 10 50 10 65 pA
Common Mode Rejection Ratio VCM = −4.7V to 2.3V,
A V =100 ● 104 115 90 110 dB
A V =10 ● 95 85 dB
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3
LTC1100
LTC1100ACS LTC1100CSW
Output Voltage Swing RL=10k, VS = ±8V ● – 7.2 6.2 – 7.2 6.2 V
RL= 2k, VS = ±8V ● – 7.7 7.5 – 7.7 7.5 V
Supply Current 2.4 2.8 2.4 3.3 mA
● 3.4 4.0 3.4 4.5 mA
Bandwidth G = 100 18 18 kHz
G = 10 180 180 kHz
Note 1: Absolute Maximum Ratings are those values beyond which the life systems. VOS is measured to a limit determined by test equipment
of a device may be impaired. capability.
Note 2: These parameters are guaranteed by design. Thermocouple effects Note 3: See Applications Information, Single Supply Operation.
preclude measurement of these voltage levels in high speed automatic test Note 4: Please consult Linear Technology Marketing.
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BLOCK DIAGRA S
2
R R
14
7
+ 99R 10 (V+) 9R 90R
5 (V )
99R 90R 9R 4
1 – 2 −
R R 13
– 3
–
3 + 8
6 + 15
R = 2.5k + R = 2.5k
6 + 11
4 (V –) 7 (V – ) LTC1100 • BD02
LTC1100 • BD01
NOTE: FOR A VOLTAGE GAIN OF 10V/V SHORT PIN 2 TO 3, AND PIN 14 TO 15.
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TYPICAL PERFOR A CE CHARACTERISTICS
Gain Nonlinearity
Gain Error vs Temperature Gain, Phase vs Frequency vs Temperature
0.05 45 210 25
VS = ±8V VS = ±8V
RL = 50k 40 180 RL = 50k
0.04 20
GAIN NONLINEARITY (ppm)
GAIN
PHASE SHIFT (DEGREES)
DIFFERENTIAL GAIN (dB)
35 150
(G = 100)
GAIN ERROR (±%)
0.03 PHASE 15
30 120
0.02 25 90 10
20 60
0.01 GAIN 5
15 (G = 10) 30
0 0
10 0
–0.01 5 –30 –5
–50 –25 0 25 50 75 100 125 100 1k 10k 100k 1M –50 –25 0 25 50 75 100 125
TEMPERATURE (°C) TEMPERATURE (°C)
FREQUENCY (Hz)
LTC1100 • TPC01 LTC1100 • TPC02 LTC1100 • TPC03
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LTC1100
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Power Supply Rejection Ratio Common Mode Range
Supply Current vs Supply Voltage vs Frequency vs Supply Voltage
4 150 8
TA = –55°C TA = 25°C
POWER SUPPLY REJECTION RATIO (dB)

6
125
NGE
E RA
COMMON MODE RANGE (V)

3 4 OD
SUPPLY CURRENT (mA)
TA = 25°C ON M
MM
100 E CO
2 ITIV
POS
2 TA = 125°C 75 0
–2
50 NEG
1 –4 ATIV
E CO
MM
25 ON
MOD
–6 E RA
NGE
0 0 –8
2 4 6 8 10 12 14 16 18 0.1 1 10 100 1k 10k 100k ±2 ±3 ±4 ±5 ±6 ±7 ±8
TOTAL SUPPLY VOLTAGE V+ TO V – (V) FREQUENCY (Hz) SUPPLY VOLTAGE (V)
Undistorted Output Swing

CMRR vs Frequency Output Voltage Swing vs Load vs Frequency
120 ±10 10
VS = ±5V
G = 100, RC = 100k ±9 9
PEAK-TO-PEAK OUTPUT SWING (V)

CC = 10pF VS = ±8V, TA ≤ 85°C
100 ±8 NEGATIVE
G = 100, RC = ∞ 8
RL = 100k
CC = 0pF ±7 7
VOUT ± SWING (V)
80 POSITIVE RL = 2k
±6 6
CMRR (dB)
VS = ±5V, TA ≤ 85°C
60 RC
CC
±5 NEGATIVE 5
G = 10, RC = ∞
CC = 0pF ±4 POSITIVE 4
40 1
3 ±3 VS = ±2.5V, TA ≤ 85°C 3
– NEGATIVE
2
LTC1100 ±2 2
20 6 POSITIVE
+ ±1 1
0 0 0
0.1 1 10 100 1k 10k 100k 0 1 2 3 4 5 6 7 8 9 10 100 1k 10k 100k
FREQUENCY (Hz) LOAD RESISTANCE (kΩ) FREQUENCY (Hz)
Bias Current vs Internal Sampling Frequency

Common Mode Voltage Voltage Noise vs Frequency vs Supply Voltage
360 105 4
VS = ±5V TA = –55°C
300
VOLTAGE NOISE DENSITY (nV/ √ Hz)
90
240
SAMPLING FREQUENCY (kHz)
TA = 125°C 3
180 75
BIAS CURRENT (pA)
TA = 25°C
120
60
60 2
0 TA = 25°C 45
TA = 125°C
– 60 30
TA = –55°C 1
–120
15
–180
–200 0 0
–6 –5 –4 –3 –2 –1 0 1 2 3 4 10 100 1k 10k 100k 2 4 6 8 10 12 14 16 18
COMMON MODE VOLTAGE (V) FREQUENCY (Hz) TOTAL SUPPLY VOLTAGE V + TO V – (V)
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LTC1100
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Large-Signal Transient Response Small-Signal Transient Response Overload Recovery
G = 100, VS = ± 5V G = 100, VS = ± 5V G = 100, VS = ± 5V
1V/DIV
50mV/DIV
2V/DIV
2V/DIV
10µs/DIV 10µs/DIV 5µs/DIV

Large-Signal Transient Response Small-Signal Transient Response Overload Recovery

G = 10 (LTC1100CS Only), VS = ± 5V G = 10 (LTC1100CS Only), VS = ± 5V G = 10 (LTC1100CS Only), VS = ± 5V
1V/DIV
2V/DIV 50ms/DIV
2V/DIV
10µs/DIV 10µs/DIV 1µs/DIV

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PI FU CTIO S
8-Pin DIP (16-Pin SO)
Pin 1 (2) GND REF: Connect to system ground. This sets suppressed by using the COMP pin. The standard com-
the zero reference for the internal op amps. pensation circuit is a capacitor from COMP to VOUT, sized
to provide an RC pole with the internal 247k resistor
Pin 2 (4) CMRR: This pin tailors the gain of the internal
(22.5k for LTC1100CS in gain-of-10 mode). See the
amplifiers to maximize AC CMRR. For applications which
Applications section.
emphasize CMRR requirements, connect a 100k resistor
and a 10pF capacitor in series from CMRR to ground. See Pin 8 (15) VOUT: Signal Output.
the Applications section.
16-Pin SO Package Only
Pin 3 (6) –VIN: Inverting Input.
(3) G = 10: Short to pin (2) for gain of 10. Leave
Pin 4 (7) V – : Negative Supply. disconnected for gain of 100.
Pin 5 (10) V + : Positive Supply. (14) G = 10: Short to pin (15) for gain of 10. Leave
disconnected for gain of 100.
Pin 6 (11) VIN: Noninverting Input.
NOTE: Both pins must be shorted or open to provide
Pin 7 (13) COMP: This pin reduces the bandwidth of the
correct gain.
internal amplifiers for applications at or near DC. Clock
feedthrough from the internal sampling clock can also be (1),(5),(8),(9),(12),(16) NC: No Internal Connection.
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LTC1100
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APPLICATIO S I FOR ATIO
Common Mode Rejection Aliasing
Due to very precise matching of the internal resistors, no The LTC1100 is a chopper-stabilized instrumentation
trims are required to obtain a DC CMRR of better than amplifier; like all sampled systems it exhibits aliasing
100dB; however, things change as frequency rises. The behavior for input frequencies at or near the internal
inverting amplifier is in a gain of 1.01 (1.1 for gain of 10), sampling frequency. The LTC1100 incorporates special-
while the noninverting amplifier is in a gain of 99 (9 for gain ized anti-aliasing circuitry which typically attenuates
of 10). As frequency rises, the higher gain amplifier hits its aliasing products by ≥ 60dB; however, extremely sensi-
gain-bandwidth limit long before the low gain amplifier, tive systems may still have to take precautions to avoid
degrading CMRR. The solution is straightforward — slow aliasing errors. For more information, see the LTC1051/
down the inverting amplifier to match the noninverting LTC1053 data sheet.
amp. Figure 1 shows the recommended circuit. The prob-
Single Supply Operation
lem is less pronounced in the LTC1100CS in gain-of-10
mode; no CMRR trims are necessary. The LTC1100 will operate on a single 5V supply, and the
common mode range of the internal op amps includes
−
3
− ground; single supply operation is limited only by the
LTC1100
8 output swing of the op amps. The internal inverting
+
6
+ amplifier has a negative saturation limit of 5mV typically,
2
setting the minimum common mode limit at 5mV/1.01 (or
100k 1.1 for gain of 10). The inputs can be biased above ground,
10pF as shown in Figure 3. Low cost biasing components can be
LTC1100 • TA02 used since any errors appear as a common mode term and
are rejected.
Figure 1. Improving AC CMRR
The minimum differential input voltage is limited by the
Overcompensation swing of the output op amp. Lightly loaded, it will swing
down to 5mV, allowing differential input voltages as low as
Many instrumentation amplifier applications process DC 50µV (450µV for gain of 10). Single supply operation
or low frequency signals only; consequently, the 18kHz limits the LTC1100 to positive differential inputs only;
(180kHz for G = 10) bandwidth of the LTC1100 can be negative inputs will give a saturated zero output.
reduced to minimize system errors or reduce transmitted
clock noise by using the COMP pin. A feedback cap from 5V
COMP to VOUT will react with the 247k internal resistor 5V
RBIAS
(22.5k for G = 10) to limit the bandwidth, as in Figure 2.
6 5
CB +
8 OUTPUT
SENSOR LTC1100
3 0V TO 5V
−
7 4, 1
3
–
8
LTC1100 1N4148
6
+ f 3dB =
1 LTC1100 • TA04
2 π R INT × CB
R INT = 247k FOR G = 100
22.5k FOR G = 10
LTC1100 • TA03
Figure 3
Figure 2. Overcompensation to Reduce System Bandwidth

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7
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC1100
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PACKAGE DESCRIPTIO
J8 Package
8-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110) .405
(10.287)
.200 .005 MAX
.300 BSC CORNER LEADS OPTION (5.080) (0.127)
(7.62 BSC) (4 PLCS) MAX MIN
8 7 6 5
.015 – .060
.023 – .045 (0.381 – 1.524)
.025 .220 – .310
(0.584 – 1.143)
(0.635) (5.588 – 7.874)
HALF LEAD
RAD TYP
.008 – .018 OPTION
0° – 15°
(0.203 – 0.457) .045 – .068
(1.143 – 1.650) 1 2 3 4
FULL LEAD .045 – .065
OPTION .125
(1.143 – 1.651)
3.175
NOTE: LEAD DIMENSIONS APPLY TO SOLDER MIN
DIP/PLATE OR TIN PLATE LEADS .014 – .026 .100
(0.360 – 0.660) (2.54) J8 0801
BSC
OBSOLETE PACKAGE
N8 Package
8-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
.300 – .325 .045 – .065 .130 ± .005
.400*
(7.620 – 8.255) (1.143 – 1.651) (3.302 ± 0.127)
(10.160) NOTE:
MAX 1. DIMENSIONS
INCHES
.065 8 7 6 5 ARE
MILLIMETERS
(1.651) *THESE DIMENSIONS
.008 – .015 TYP DO NOT INCLUDE
(0.203 – 0.381) .120 .255 ± .015* MOLD FLASH OR
(3.048) .020 (6.477 ± 0.381)
PROTRUSIONS.
+.035 MIN (0.508) MOLD FLASH OR
.325 –.015 PROTRUSIONS
.100 .018 ± .003 MIN
( 8.255
+0.889
–0.381 ) (2.54)
BSC
(0.457 ± 0.076)
N8 1002
1 2 3 4
SHALL NOT EXCEED
.010 INCH (0.254mm)
SW Package
16-Lead Plastic Small Outline (Wide .300 Inch)
(Reference LTC DWG # 05-08-1620)
.030 ±.005 .050 BSC .045 ±.005 .398 – .413
TYP (10.109 – 10.490)
NOTE 4
N 16 15 14 13 12 11 10 9
.420 .325 ±.005

MIN
NOTE 3 .394 – .419
(10.007 – 10.643)
1 2 3 N/2 N/2
RECOMMENDED SOLDER PAD LAYOUT NOTE:

INCHES
1. DIMENSIONS IN
1 2 3 4 5 6 7 8 (MILLIMETERS)
2. DRAWING NOT TO SCALE
.291 – .299 3. PIN 1 IDENT, NOTCH ON
(7.391 – 7.595) TOP AND CAVITIES ON THE
NOTE 4 .037 – .045 BOTTOM OF PACKAGES
.093 – .104 ARE THE MANUFACTURING
.010 – .029 × 45° (0.940 – 1.143)
(2.362 – 2.642) OPTIONS. THE PART MAY BE
(0.254 – 0.737)
.005 SUPPLIED WITH OR WITHOUT
(0.127) ANY OF THE OPTIONS.
RAD MIN 0° – 8° TYP 4. THESE DIMENSIONS DO NOT
INCLUDE MOLD FLASH OR
PROTRUSIONS. MOLD FLASH
OR PROTRUSIONS SHALL NOT
.050 EXCEED .006" (0.15mm)
.009 – .013 (1.270) .004 – .012
(0.229 – 0.330) NOTE 3 BSC (0.102 – 0.305)
.014 – .019
.016 – .050
(0.356 – 0.482)
(0.406 – 1.270)
TYP S16 (WIDE) 0502 1100fc
LW/TP 1202 1K REV C • PRINTED IN USA

Linear Technology Corporation
8 1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ●
www.linear.com  LINEAR TECHNOLOGY CORPORATION 1994

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Descriptio: Features

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LTC1100

Single 5V Supply, DC Instrumentation Amplifier

OBSOLETE PACKAGE TJMAX = 110°C, θJA = 100°C/W

POWER SUPPLY REJECTION RATIO (dB)

COMMON MODE RANGE (V)

Undistorted Output Swing

PEAK-TO-PEAK OUTPUT SWING (V)

Bias Current vs Internal Sampling Frequency

10µs/DIV 10µs/DIV 5µs/DIV

Large-Signal Transient Response Small-Signal Transient Response Overload Recovery

10µs/DIV 10µs/DIV 1µs/DIV

Figure 2. Overcompensation to Reduce System Bandwidth

.420 .325 ±.005

RECOMMENDED SOLDER PAD LAYOUT NOTE:

LW/TP 1202 1K REV C • PRINTED IN USA

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