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ECE-452 Quiz#1 (Solution)

Author Dr. Saeed Qaisar –Assistant Professor, ECE Department

SQ Date 05/10/2020
Verified by Dr. Saeed Qaisar –Assistant Professor, ECE Department
SQ Date
Student Name
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Quiz conduct procedure

• Please download the Quiz, it is in MS word format
• Enter your name and Effat university ID and Date on the first page.
• Please precisely answer the asked questions.
• Submit your solution on BlackBoard by 15h30, 5th of October 2020.
• The Quiz conduct time is between 14h30 to 15h30, 5th of October 2020.
• Please note that copying solutions from other colleagues is not allowed. Any activity
of plagiarism will result in deduction of marks.

Q1. What HPC stands for? Cite and define two different HPC techniques. (0.5)

Soln.:

HPC stands for High Performance Computing.

Two HPC techniques are:

Parallel computing: single systems with many processors working on the same
problem

Distributed computing: many systems loosely coupled by a scheduler to work on

single problem

Q2. Draw the generic I/O module block diagram and describe its functionality. (0.5)

Soln.:

Block Diagram of (I/O module):

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I/O module functions:

Control & Timing

CPU (Processor) Communication
Device Communication
Data Buffering
Error Detection (e.g., extra parity bit)
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Q3. Mention the principle difference between programmed I/O, Interrupt driven I/O and
DMA (Direct Memory Access). Cite two different DMA configurations. Also briefly describe
the cited DMA configurations along with their block diagrams (1.5)

Soln.:

Programmed I/O.

CPU has direct control over I/O

CPU waits for I/O module to complete operation
CPU checks I/O module status bit periodically
I/O module does not inform CPU directly
Wastes CPU time

Interrupt Driven I/O.

CPU issues command. After the command issue, CPU completes other tasks.
I/O module completes the asked task
I/O module interrupts CPU
CPU entertains the interrupt after completing the ongoing instruction
It improves the CPU performance compared to the programmed I/O case.

DMA.

Interrupt driven and programmed I/O require active CPU intervention. It results in to a
limited data transfer rate and the CPU is tied up especially when a block of data is
required to be transferred between the Main memory and the external peripheral.

DMA is the solution for this problem. It is an additional hardware added to the system.

CPU tells DMA controller about the type of operation (Read/Write),

about the device address, the starting address of memory block for data
transfer and the amount of data to be transferred.
CPU carries on with other tasks
DMA controller deals with peripheral transfer
DMA controller sends interrupt to CPU when finished the transfer with
peripheral. It is in order to take charge of the system bus.
DMA controller takes over system bus and transfers the desired data
to/from main memory.

DMA Configurations.

Single Bus Configuration: DMA, CPU, Main Memory and I/O modules share the system
bus. The configuration block level diagram is shown below.
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Separate I/O Bus Configuration: DMA, CPU and Main Memory share the system bus. The
I/O modules share an I/O bus and are connected to the system bus via DMA module. The
configuration block level diagram is shown below.
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Q4. Briefly describe the utilization of I/O module in a computer. Identify the location of I/O
modules on the following system block diagram. Also count the number of I/O modules,
suggested to employ in this system (0.5)

Soln.:

The I/O module provides an interface between the CPU, main memory and the I/O devices
(peripherals). Its placement, in the system, is further illustrated with the help of following
block diagram.

Its employment is necessary in the system because of a wide variety of peripherals employed
in the modern computers. They have different data rates and information formats. The I/O
modules complete the transfer with these peripherals and transfer the information to/from
system bus at a fixed rate and format. Therefore it facilitates the design of remaining system
modules like CPU, main memory, etc.

Figure: The I/O Module generalized Model.

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The I/O modules location is marked on the following system block diagram. It shows that
logically 9 I/O interfaces are required in this system.

1
7
2

3 8
4

5 9