Computer Aided Design

DAE21502
Instruction Sheet

Lab No. 6
Lab Title Combinational Logic Simulation
Semester 01
Session 2020/2021
 Computer Aided Design ii
Lab 6

Table of Contents

1.0 Outcomes A

2.0 Guidelines A

3.0 Procedures B

Overview of Lab 6 B

4.0 Lab Activity C

Lab Activity 1 C

Lab Activity 2 C

Pre-Lab 2

Questions 3

Lab Activity 4

Observations 5

Conclusion 8

Grading Rubric for Written Reports 9

 Computer Aided Design A
Lab 6: Combinational Logic Simulation

1.0 Outcomes

After completing this module, students should be able to:

1. Construct the circuit design independently with refer to laboratory manual. (CLO1-C3, PLO10-
D)
2. Conduct electronic design simulation using appropriate CAE simulation tools. (CLO2-
P3,PLO2-PS)
3. Plan and develop innovative electronic products through laboratory experience and group
collaboration (CLO3-A2, PLO7-ES)

2.0 Guidelines

1. Grouping: Lab group is predetermine and consists with at most two team members.
2. Registration: Students are required to register the course before attending the class.
Students are also required to register in the Google Classroom according to the given class
appointed by the laboratory instructor in order to submit the report attachment at the end of
each lab sessions.
3. Lab Activities: All lab activities such as lab assignments, questions and analysis must be
held in the respective lab location and completed within the given times.
4. Demonstration: Student must demonstrate the complete lab assignments to the respective
instructor and submit the pdf copy to Google Classroom as the assignment of the day.
Verification only will be given upon completion of all lab activities and initialized by the
instructor on the respective page.
5. Report Organization: Report must be properly handwritten. Submit the lab report with
Arabic numerical reference only.
6. Conclusion: Must be measureable, term such as understand or learnt shall not be use as a
conclusion. Conclusion is a summary made from the observations and lab activities
which relate the theoretical aspect and implementations.
7. Report Submission: Report must be submitted at the end of each lab session to the
respective instructor.
8. Cover Page: Please fill in ALL the necessary information on the cover page. One (1) mark
will be deducted for the each incomplete information.
 Computer Aided Design B
Lab 6: Combinational Logic Simulation

3.0 Procedures

Overview of Lab 6

A logic gate is a simple circuit with one or two inputs and one output. The inputs and outputs can
be either ON or OFF, and the value of a gate's output is completely determined by the values of
its inputs (with the proviso that when one of the inputs is changed, it takes some small amount of
time for the output to change in response).

In order to simulate digital circuit using NI Design Suite, word generator is used to generate the
input pattern and logic analyser to analyse the outcome. The word generator is used to send digital
words or patterns of bits into circuits to provide stimulus to digital circuits:

The logic analyser is used for fast data acquisition of logic states and advanced timing analysis to
help design large systems and carry out troubleshooting. When a circuit is activated, the logic
analyser records the input values on its terminals. When the triggering signal is seen, the logic
analyser displays the pre- and post-trigger data. Data is displayed as square waves over time. The
top row displays values for channel 0 (generally the first bit in a digital word), the next row displays
values for channel 1, and so on. The binary value of each bit in the current word is displayed in the
terminals on the left side of the instrument face. The time axis is displayed as the top axis of the
signal display dialog box. The dialog box also displays the internal clock signal, external clock
signal, external clock qualify signal and trigger qualify signal.

The logic converter is able to perform several transformations of a circuit representation or digital
signal. This is a useful tool for digital circuit analysis, but has no real-world counterpart. It can be
attached to a circuit to derive the truth table or Boolean expression the circuit embodies, or to
produce a circuit from a truth table or Boolean expression.
 Computer Aided Design C
Lab 6: Combinational Logic Simulation

4.0 Lab Activity

Lab Activity 1

1. Construct circuit as in Figure 1 into Multisim equivalent circuitry.

2. Generate 2 bits word that represent A and B. By using logic analyzer, get the waveforms that
represent the circuit operations.

Figure 1

Lab Activity 2

1. Design an alarm circuit to be used in a process control system. Temperature (T), pressure
(P), flow (F) and level (L) of a fluid are each monitored by separate sensor circuits that
produce a low logic output when certain physical condition exists. The alarm circuit output
(A) should be LOW if any of the following conditions exists in the system:
i. The pressure is high when the flow is low
ii. The temperature is high when either the pressure is low or the level is low
2. By using logic converter, create the truth table for alarm circuit, get the simplified Boolean
expression and create the logic circuit using combinational gate ( ).
 DAE21502 COMPUTER AIDED DESIGN

About Students:
Name Matric No. Section: 1 / 2 / 3 / 4 / 5 / 6 / 7 / 8
Instructor’s Name:
MUHAMMAD HAIKAL HASHIM BIN ABDUL AA191375
WALIT TENGKU NADZLIN BIN TENGKU
IBRAHIM

About Experiment:
Title Venue
Combinational Logic Simulation MTMP / MRBK / MTPLT

Date
24/12/2020

FOR INSTRUCTORS ONLY

Domain Item Marks Total

Pre Lab /10
C /20
Questions /10
Lab Activities /10
P Observations /30 /50
Conclusion /10
Demonstration and Verifications /10
A Ethics /10 /30
Content /10

TOTAL MARKS Instructor’s Comment Submission Stamp

/100
 Computer Aided Design 2
Lab 6: Combinational Logic Simulation

Pre-Lab

AA191375 MUHAMMAD HAIKAL HASHIM BIN ABDUL WALIT

Matric No. Name

Matric No. Name

TENGKU NADZLIN BIN TEANGKU IBRAHIM

Marks Check by

1. With reference to Figure 1, simplified the function of C and D using K-map.

(5 marks)

2. From Lab Activity 2, rewrite the truth table according to input and output name assigned.

(5 marks)
INPUT OUTPUT
A B C D
0 0 0 0
0 1 1 0
1 0 1 0
1 1 1 X
 Computer Aided Design 3
Lab 6: Combinational Logic Simulation

Questions

1. Briefly explain the advantages and of designing logical circuitry using logic converter in
Multisim.
(5 marks)
The advantages and of designing logical circuitry using logic converter in Multisim is easy to make
logic circuit because Multisim can convert logic circuit to Boolean equation or vice versa. Next, in
this Multisim also has various logic gates as well as various tools used to produce output.

2. What is the drawback of designing a digital circuitry using such method in (1)
(5 marks)
The disadvantage of designing a digital circuit using such a method in (1) is that the logic circuit
does not use specific gate logic. Therefore, in Multisim is some error for output.
 Computer Aided Design 4
Lab 6: Combinational Logic Simulation

Lab Activity

1. Print out the circuit diagram and simulated output file of Lab Activity 1. Save it in pdf format
and send it to the Google Classroom as the assignment of the day.
(5 marks)

2. Print out the generated circuit diagram with the logical table of Lab Activity 2. Save it in pdf
format and send it to the Google Classroom as the assignment of the day.
(5 marks)

3. Verify your completed tasks of (1) until (2) to your respective instructor.
(10 marks)

Verified by:
 Computer Aided Design 5
Lab 6: Combinational Logic Simulation

Observations

1. From simulated output file of Lab Activity 1, create a truth table that reflect the input and
output.
(5 Marks)
INPUT OUTPUT
A B C D
0 0 0 0
0 1 0 0
1 0 0 0
1 1 0 0

2. Clarify the logic circuit simulation technique using graph and word stimulus as in Lab Activity
1.
(5 marks)
By using word generator can set the input in this simulation. Meanwhile, the logic analyser can find
the output in graphical form.
 Computer Aided Design 6
Lab 6: Combinational Logic Simulation

3. Generate the truth table for Lab Activity 2 of proposed design with respective input and
output.
(5 Marks)
INPUT OUTPUT
T P F L A
0 0 0 0 0
0 0 0 1 0
0 0 1 0 0
0 0 1 1 0
0 1 0 0 1
0 1 0 1 1
0 1 1 0 0
0 1 1 1 0
1 0 0 0 1
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 0 0 1
1 1 0 1 1
1 1 1 0 1
1 1 1 1 0

4. Discuss the difference between generated circuitry using and

.
(3 marks)
This generated circuitry can build logic circuit using get and, get or and get not.
Then, this can build logic circuit only using get nand.

5. Discuss which approach is the most effective in generating a minimal usage of logical gates.
(7 marks)
The most effective approach in producing the minimum use of logical gates is using logic converter
because it can be use to convert get logic into truth table and then can convert to simply get logic.
 Computer Aided Design 7
Lab 6: Combinational Logic Simulation

6. Conclude the procedures of analysing logical circuitry using logical converter, word stimulus
and logic analyser. Which approach is the best in analysing a typical logic circuitry?
(5 marks)
The best in analysing a special logic circuit is a logic converter because using this logic circuit, the
output or result has no error in this simulation. Not only that, it can also produce various outputs
such as and ..
 Computer Aided Design 8
Lab 6: Combinational Logic Simulation

Conclusion

Summarize the digital circuitry simulation in MultiSim. Differentiate the approach using word
stimulus, logic analyser and logic converter. Clarify which simulation technique is the most
effective.
(10 marks)
The conclusion, we can find how to build logic circuit using Multisim and can be attached to a circuit
to derive the truth table or Boolean expression the circuit embodies, or to produce a circuit from a
truth table or Boolean expression. By using the word stimulus or word generator, we can set the
input to the logic circuit. Next, we can find output through graph in the logic analyser. Then, the
logic converter can convert logic circuit to Boolean equation or instead of that. Also, it can set the
input or find the output in this simulation. So, the best simulation technique is the most effective is
logic converter
 Computer Aided Design 9
Lab 6: Combinational Logic Simulation

Grading Rubric for Written Reports

Scale
Criteria
5 4 3 2 1
Lab Activities Varies, depending on activity assigned

Observations Varies, depending on question assigned

Conclusion Accurate Accurate A statement of the A statement of the No conclusion was
statement of the statement of the results of the lab results is included or shows
results of lab results of the lab indicates whether incomplete with little effort and
indicates whether indicates whether results support the little reflection on reflection on the
results support results support the hypothesis the lab. lab.
hypothesis. hypothesis.

Possible sources of Possible sources of

error and what error identified.
was learned from
the lab is
discussed.
Demonstration Demonstrates with Exhibits limited Demonstration
and clear understanding or without
understanding of principle understanding the
Verifications principle or demonstrated; principle; cannot
concept involved; minor inaccuracies relate concept to
accurately relates in relating demonstration
concept to demonstration.
demonstration.
Ethics Self-generated Solution/ideas are Copied solution/
solution/ideas. adopted from ideas from others.
others.
Report is
submitted upon
completion of lab
session.

Cover page Information on

information is cover page is not
completely filled. completely filled.
Content Ideas are written Ideas are written Plagiarizes. Ideas
using own original with limited are directly copied
language and knowledge and from references.
clearly focused. understandability.
Ideas are snipped
from reference
without fully
understand the
concept.