IRF840

Data Sheet July 1999 File Number 2312.3

8A, 500V, 0.850 Ohm, N-Channel Power Features

MOSFET • 8A, 500V
This N-Channel enhancement mode silicon gate power field
• rDS(ON) = 0.850
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of • Single Pulse Avalanche Energy Rated
energy in the breakdown avalanche mode of operation. All of • SOA is Power Dissipation Limited
these power MOSFETs are designed for applications such
as switching regulators, switching converters, motor drivers, • Nanosecond Switching Speeds
relay drivers, and drivers for high power bipolar switching • Linear Transfer Characteristics
transistors requiring high speed and low gate drive power.
• High Input Impedance
These types can be operated directly from integrated
circuits. • Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Formerly developmental type TA17425.
Components to PC Boards”

Ordering Information Symbol

PART NUMBER PACKAGE BRAND D

IRF840 TO-220AB IRF840

NOTE: When ordering, include the entire part number. G

Packaging
JEDEC TO-220AB
TOP VIEW

SOURCE
DRAIN
GATE

DRAIN
(FLANGE)

4-257 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
 IRF840

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified

IRF840 UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS 500 V
Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 500 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 8.0 A
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 5.1 A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM 32 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS 20 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD 125 W
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0 W/oC
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS 510 mJ
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC
Maximum Temperature for Soldering
300 oC
Leads at 0.063in (1.6mm) from Case for 10s ....................................................................................... TL
260 oC
Package Body for 10s, See Techbrief 334.........................................................................................Tpkg
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:
1. TJ = 25oC to 125oC.

Electrical Specifications TC = 25oC, Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BVDSS VGS = 0V, ID = 250A (Figure 10) 500 - - V
Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = 250A 2.0 - 4.0 V
Zero-Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 25 A
VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC - - 250 A
On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON)MAX, VGS = 10V 8.0 - - A
Gate to Source Leakage Current IGSS VGS = 20V - - 100 nA
Drain to Source On Resistance (Note 2) rDS(ON) VGS = 10V, ID = 4.4A (Figures 8, 9) - 0.8 0.85 
Forward Transconductance (Note 2) gfs VDS  50V, ID = 4.4A (Figure 12) 4.9 7.4 - S
Turn-On Delay Time tD(ON) VDD = 250V, ID  8A, RG = 9.1, RL = 30 - 15 21 ns
Rise Time MOSFET Switching Times are Essentially - 21 35 ns
tr
Independent of Operating Temperature.
Turn-Off Delay Time tD(OFF) - 50 74 ns
Fall Time tf - 20 30 ns
Total Gate Charge Qg(TOT) VGS = 10V, ID = 8A, VDS = 0.8 x Rated BVDSS - 42 63 nC
(Gate to Source + Gate to Drain) Ig(REF) = 1.5mA (Figure 14) Gate Charge is
Gate to Source Charge Qgs Essentially Independent of Operating - 7.0 - nC
Temperature
Gate to Drain “Miller” Charge Qgd - 22 - nC
Input Capacitance CISS VGS = 0V, VDS = 25V, f = 1.0MHz (Figure 11) - 1225 - pF
Output Capacitance COSS - 200 - pF
Reverse-Transfer Capacitance CRSS - 85 - pF
Internal Drain Inductance LD Measured from the Modified MOSFET - 3.5 - nH
Contact Screw on Tab Symbol Showing the
to Center of Die Internal Devices
Measured from the Drain Inductances - 4.5 - nH
D
Lead, 6mm (0.25in) from
Package to Center of Die LD
Internal Source Inductance LS Measured from the - 7.5 - nH
Source Lead, 6mm G
(0.25in) from Header to LS
Source Bonding Pad
S

Thermal Resistance Junction to Case RJC - - 1.0 oC/W

RJA oC/W
Thermal Resistance Junction to Ambient Free Air Operation - - 62.5

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 IRF840

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current ISD Modified MOSFET - - 8.0 A
D
Pulse Source to Drain Current (Note 3) ISDM Symbol Showing the - - 32 A
Integral Reverse P-N
Junction Diode
G

Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = 8.0A, VGS = 100A/s (Figure 13) - - 2.0 V
Reverse Recovery Time trr TJ = 25oC, ISD = 8.0A, dISD/dt = 100A/s 210 475 970 ns
Reverse Recovered Charge QRR TJ = 25oC, ISD = 8.0A, dISD/dt = 100A/s 2.0 4.6 8.2 C
NOTES:
2. Pulse Test: Pulse width  300s, duty cycle  2%.
3. Repetitive Rating: Pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 50V, starting TJ = 25oC, L = 14mH, RG = 25, peak IAS = 8A.

Typical Performance Curves Unless Otherwise Specified

1.2 10
POWER DISSIPATION MULTIPLIER

1.0
8
ID, DRAIN CURRENT (A)

0.8
6

0.6
4
0.4

2
0.2

0 0
0 50 100 150 25 50 75 100 125 150
TC, CASE TEMPERATURE (oC) TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE CASE TEMPERATURE

1
0.5
TRANSIENT THERMAL

0.2
0.1 0.1
Z JC, NORMALIZED

0.05
IMPEDANCE

0.02 PDM
0.01
SINGLE PULSE
10-2 t1
t2 t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZJC x RJC + TC
10-3 -5
10 10-4 10-3 10-2 0.1 1 10
t1 , RECTANGULAR PULSE DURATION (s)

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

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 IRF840

Typical Performance Curves Unless Otherwise Specified (Continued)

102 15
VGS = 10V PULSE DURATION = 80s
DUTY CYCLE = 0.5% MAX
10s
12 VGS = 6.0V
ID, DRAIN CURRENT (A)

ID, DRAIN CURRENT (A)

10 100s
9

1ms
VGS = 5.5V
6
OPERATION IN THIS
1 REGION IS LIMITED 10ms
BY rDS(ON) VGS = 5.0V
3
TC = 25oC DC
TJ = MAX RATED VGS = 4.5V VGS = 4.0V
SINGLE PULSE
0.1 0
1 10 102 103 0 50 100 150 200 250
VDS, DRAIN TO SOURCE VOLTAGE (V) VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

15 100
PULSE DURATION = 80s VGS = 10V PULSE DURATION = 80s
DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX
ISD(ON), DRAIN TO SOURCE VDS  50V
12
ID, DRAIN CURRENT (A)

CURRENT (A) 10

VGS = 6.0V
9
1
VGS = 5.5V
6 TJ = 150oC TJ = 25oC

VGS = 5.0V 0.1

3
VGS = 4.0V
VGS = 4.5V
0 0.01
0 3 6 9 12 15 0 2 4 6 8 10
VDS, DRAIN TO SOURCE VOLTAGE (V) VSD, GATE TO SOURCE VOLTAGE (V)

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

10 3.0
PULSE DURATION = 80s PULSE DURATION = 80s
DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX
NORMALIZED DRAIN TO SOURCE

ID = 4.4A, VGS = 10V

ON RESISTANCE VOLTAGE
rDS(ON), DRAIN TO SOURCE

8 2.4
ON RESISTANCE ( )

6 1.8

VGS = 10V

4 1.2

2 0.6
VGS = 20V

0 0
0 8 16 24 32 40 -60 -40 -20 0 20 40 60 80 100 120 140 160
TC, CASE TEMPERATURE (oC) TJ, JUNCTION TEMPERATURE (oC)

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

VOLTAGE AND DRAIN CURRENT RESISTANCE vs JUNCTION TEMPERATURE

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 IRF840

Typical Performance Curves Unless Otherwise Specified (Continued)

1.25 3000
ID = 250A VGS = 0V, f = 1MHz
NORMALIZED DRAIN TO SOURCE

CISS = CGS + CGD

1.15 2400 CRSS = CGD
COSS  CDS + CGD
BREAKDOWN VOLTAGE

C, CAPACITANCE (pF)
1.05 1800
CISS

0.95 1200
COSS

0.85 600 CRSS

0.75 0
-60 -40 -20 0 20 40 60 80 100 120 140 160 1 2 5 10 2 5 102
o
TJ, JUNCTION TEMPERATURE ( C) VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
VOLTAGE vs JUNCTION TEMPERATURE

15 100
PULSE DURATION = 80s

ISD, SOURCE TO DRAIN CURRENT (A)

DUTY CYCLE = 0.5% MAX
VDS  50V PULSE DURATION = 80s
gfs, TRANSCONDUCTANCE (S)

12 DUTY CYCLE = 0.5% MAX

10
9 TJ = 25oC

TJ = 150oC
TJ = 150oC
6 TJ = 25oC
1.0

0 0.1
0 3 6 9 12 15 0 0.3 0.6 0.9 1.2 1.5
ID, DRAIN CURRENT (A) VSD, SOURCE TO DRAIN VOLTAGE (V)

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

20
ID = 8A
VGS, GATE TO SOURCE VOLTAGE (V)

16

VDS = 100V
12
VDS = 250V

VDS = 400V
8

0
0 12 24 36 48 60
Qg, GATE CHARGE (nC)

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

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 IRF840

Test Circuits and Waveforms

VDS

BVDSS

L tP
VDS

VARY tP TO OBTAIN IAS

+
VDD
REQUIRED PEAK IAS RG VDD
VGS -
DUT

tP
0V IAS
0
0.01
tAV

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

tON tOFF

td(ON) td(OFF)

tr tf
RL VDS
90% 90%

+
VDD
RG 10% 10%
- 0

DUT 90%

VGS
50% 50%
PULSE WIDTH
VGS 10%
0

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

VDS
CURRENT (ISOLATED
SUPPLY)
REGULATOR
VDD

SAME TYPE Qg(TOT)

AS DUT VGS
12V
0.2F 50k Qgd
BATTERY
0.3F
Qgs

D
VDS

G DUT
0

Ig(REF) S
0
VDS Ig(REF)
IG CURRENT ID CURRENT
SAMPLING SAMPLING
RESISTOR RESISTOR 0

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

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 IRF840

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