Student Name

Subject: ITNT202/LOGIC
DESIGN
INFORMATION TECHNOLOGY
DEPARTMENT
Semester 2

TEACHER NAME
Shinas College of
Technology

2019-2020
Table of Contents

Quetion1: 3
a) 3
b) 3
c) 3
d) 3
e) 3
Quetion2: 4
a) 4
b) 4
c) 4
d) 4
Quetion3: 4
a) 4
b) 5
c) 5
Quetion4: 6
a) 6
b) 6
c) 7
Quetion1:
a)
● To convert the binary code to the decimal code we will use the 2’s power formula.
● = 1x26 + 1x25 + 0x24 + 0x23 + 1x22 + 0x21 + 0x20
● = 64 + 32 + 0 + 0 + 4 + 0 + 0
● =100
● Hence, (1100100)2 = (100)10.

b)
● In conversion from decimal to hexadecimal first we will change from decimal toward binary &
the binary to hexadecimal.
● (510)10 = (?)2 = (?)16
● Decimal to binary. (using 2’s power rule)
● (256 + 128 + 64 + 32 + 16 + 8 + 4 + 2 + 1) the bits whose sum is equal to 510 those will be 1 and
the else will be 0.
● (111111110)2
● (111111110)2 = (?)16
● Create a set of bit of the binary.
● 0001 1111 1110.
● Now, write the number of each binary set.
● (1FE)16
● Hence, (510)10 = (1FE)16

c)
● Adding the two binary numbers.
110010110

+ 000001101

110100011

d)
● Convert (53)10 to (?)3.
● Add 3 to each decimal number.
● = 5+3 , 3+3
● = 86
● Put the binary of the each number.
● (1000) (0110)
● (10000110)2

e)
● Convert the binary code to gray code.
Binary code 10000101
● Using gray method.
Gray code 11000111
Quetion2:
a)
Excess 3 codes are also known as unweight code because it has no specific existence of itself. For
example, to convert a decimal code to excess 3 codes first we will add a number of 3 in each decimal
number and then covert each decimal number into binary code.

b)
J-K flip flop is better than any others like S-R flip flop. Because it is useable in every kind of conditions
and provides best and accurate possible result. On the other hand, S-R flip flop does not work well when
both the inputs have 1 as input.

c)
The integrated circuit 4011 is used in many machines to perform specific actions. It contains 4 NAND
gates having 2 inputs. It is basically used when we want to perform NAND gate operations. It can be
used as a NOT gate according to the requirements using reconfigure facility. The main reason of using
multiple NAND gates is that because without that the system requires more space and it increase the
power consumption of the system. This circuit can also be used to set turn off time for any electronic
device such as fan, TV, pump, light etc.

d)
An encoder is a circuit or machine. It is used to transform information from one form to another. On the
other hand, decoder is a circuit or machine that is used to convert the coded information into singles.

Encoder converts the data that is in the binary 2 N input line into a code of N bits on the sender end. On
the receiving side decoder converts the code of n bits into a 2 N lines. The purpose on using encoder and
decoder is to secure data from unauthorized persons and hackers. Now a days, everyone wants a high
level of privacy that’s why they use encode and decoder.

Although, we encoder can be used in many things but the main purpose of using the encoder in the
motor is to indicate the angle of its shaft in permanent magnet business motors. This kind of motors are
used commonly in robots and etc.

Quetion3:
a)
F (A, B, C) = ABC’+AB’C+A’BC+A’B’C’+AC+BC
 PUTTING COMMON THINGS OUT.

F (A, B, C) = (AB+A’B’) C’ + (AB’+A’B) C + (A + B)C

BY LAW, X+X’=1

F (A, B, C) = (1) C’ + (1) C + (A+B) C

F (A, B, C) = C’+C + (A+B) C

BY LAW, X+X’=1

F (A, B, C) = 1+ (A+B) C

F (A, B, C) = (A+B) C

b)
X = [ (ABC)’+ (A’BC)’]’

BY DE.MORGAN LAW,

X = ABC.A’BC

PUTTING COMMON.

X = (A.A’) BC

BY LAW, X.X’=0.

X = (0) BC

X=0

Hence, the output is zero after the simplification that’s why we cannot create a diagram.

c)
C’D+CD’E+CDE+C’D’E’

TRUTH TABLE:

C D E F
0 0 0 1
0 0 1 0
 0 1
0 1
1 0
1 0
1 1
1 1
SOP = C’D’E’ + C’DE’ + C’DE + CD’E + CDE
Quetion4:
a)
b)
(A+B+C+D’)(A+B’+C+D’)(A’+B’+C+D)(A’+B+C+D)(A+B’+C’+D’)(A’+B’+C’+D’) (A+B+C’+D)(A+B’+C’+D)
AB
CD 00 01
00 1 0
01 0 0
11 1 1
10 0 0
(A’+CD)(A+CD’)(A+C’D)(B’+C’D’)
0 1
1 1
0 0
1 1
0 0
1 1
11 10
0 1
1 1
0 0
1 1
c)

F(A,B,C,D) = A’B’C’D + A’B’CD’ + A’B’CD + A’BCD + AB’C’D’ + AB’CD

SIMPLIFYING. PUTTING COMMON POINTS.

F(A,B,C,D) = A’B’ (C’D + CD’) + A’B’CD + (A’B + AB’)CD + AB’C’D’

BY LAW, X+X’ = 1.

F(A,B,C,D) = A’B’ + A’B’CD + CD + AB’C’D’

PUTTING COMMON POINTS.

F(A,B,C,D) = A’B’ + A’B’(CD + CD) + AB’C’D’

BY LAW, X+X=X

F(A,B,C,D) = A’B’ + A’B’CD + AB’C’D’

F(A,B,C,D) = A’B’ (1 + CD) + AB’C’D’

BY LAW, 1+X= 1.

F(A,B,C,D) = A’B’(1) + AB’C’D’

F(A,B,C,D) = A’B’ + AB’C’D’

 Reference

1. A.P.Godse, D. (2009). Logic Design. Pune: Technical Publications.

2. Even, G. (2012). Digital Logic Design: A Rigorous Approach. Cambridge: Cambridge University
Press.

3. Hayes, J. P. (1993). Introduction to Digital Logic Design. Boston: Addison-Wesley Publishing.

4. HOLDSWORTH, B. (2003). Digital Logic Design. London: Elsevier Ltd.

5. Preston, D. J. (2019). Digital logic for soft devices. Proceedings of the National Academy of
Sciences of the USA.