energies

Article
Control for Three-Phase LCL-Filter PWM Rectifier
with BESS-Oriented Application
Dante Mora, Ciro Núñez *, Nancy Visairo , Juan Segundo and Eugenio Camargo
Faculty of Engineering, University of San Luis Potosí, San Luis Potosí 78290, Mexico;
dante.mora32@gmail.com (D.M.); nvisairoc@uaslp.mx (N.V.); juan.segundo@uaslp.mx (J.S.);
eugenio_camargo2000@yahoo.com.mx (E.C.)
* Correspondence: calberto@uaslp.mx; Tel.: +52-444-826-2300 (ext. 6264)




Received: 25 September 2019; Accepted: 22 October 2019; Published: 26 October 2019


Abstract: This paper deals with a battery energy storage system (BESS) in only one of its multiple
operating modes, that is when the BESS is charging the battery bank and with the focus on the control
scheme design for the BESS input stage, which is a three-phase LCL-filter PWM rectifier. The rectifier’s
main requirements comprise output voltage regulation, power factor control, and low input current
harmonic distortion, even in the presence of input voltage variations. Typically, these objectives are
modeled by using a dq model with its corresponding two-loop controller architecture, including an
outer voltage loop and a current internal loop. This paper outlines an alternative approach to tackle the
problem by using not only an input–output map linearization controller, with the aim of a single-loop
current control, but also by avoiding the dq modeling. In this case, the voltage is indirectly controlled
by computing the current references based on the converter power balance. The mathematical model
of the three-phase LCL-filter PWM rectifier is defined based on the delta connection of the filter,
which accomplishes the requirements of a 100 kW BESS module. Extensive simulation results are
included to confirm the performance of the proposed closed-loop control in practical applications.

Keywords: battery energy storage system (BESS); LCL filter; PWM rectifier; nonlinear control;
tracking problem

1. Introduction
The three-phase PWM voltage source rectifiers are broadly used in several industrial applications,
such as battery energy storage systems (BESSs), which have been firmly increasing in installed power
worldwide since 2015 [1–4]. Actually, as a starting background, a BESS must work in current and
voltage control modes either for discharging energy to the grid or charging the battery bank [2].
Until now, this implies the use of several control-loops for complying with the battery-tied and
the grid-tied requirements, which are typically carried out by two front-end converters (dc–dc and
dc–ac) [2]. Concerning the PWM rectifier, the converter is widely used due to its well-known technical
features: dc bus voltage regulation, near unity power factor, and sinusoidal currents with low total
harmonic distortion (THD) as well [5–8].
To reduce high-frequency harmonic contents, according to the international standards such as
IEEE519 and IEC 1000-3-2, the PWM rectifier is connected to the grid through an LCL filter for medium
power applications. This type of filter leads not only to better mitigation of switching harmonics with
lower inductances but also allows compliance with the voltage and current control modes when the
converter delivers energy to the grid [9–12].
Regarding the rectifier mode operation, the most common control architecture found in the
literature consists of two control loops (voltage and current) using PI or nonlinear controllers applying
abc–dq–abc transformations [13–17]. In contrast, there are other control techniques for three-phase

Energies 2019, 12, 4093; doi:10.3390/en12214093 www.mdpi.com/journal/energies

Energies 2019, 12, 4093 2 of 17

rectifiers, such as direct power control [18], which is similar to direct torque control [19]. In this control
scheme, the switching states are selected based on a table, which avoids the current regulation loop.
However, the control architecture relies on two power control loops. Additionally, the indirect power
control or voltage oriented control requires two control loops as well [20]: current regulation loop and
outer voltage loop [6]. The latter mentioned control algorithm requires Clark–Park transformations,
and the computational burden per sampling is high [19].
Additionally, the hysteresis current control is simpler than the previously mentioned
controllers [21]. This technique relies on variable switching frequency, which highly depends on
the correct choice of the hysteresis band for proper system operation. Once the current reference
is obtained, the hysteresis controller block generates the switching pattern, which results in more
semiconductor power losses when the frequency rises at the upper band, and the parameter sensitivity
is critical if an adaptive control technique is not used [19,21–23].
Up to now, several papers have reported the rectifier control design based on the dq transformation
to compute the compensation references [5,7,8,11–13,15,19,23,24]. In these methods, the outer voltage
loop generates a current command for the d-axis current and controls the dc bus voltage, while the inner
current loop generates a q-axis current to modify the power factor. The relevant reason for using such
a transformation is that the tracking problem is turned into a regulation problem in a dq synchronous
frame [25]. Although it implies a certain degree of delay due to the transformation itself, it is still
a common practice in this type of system [26]. According to the above methods, some controllers
have also been proposed in the literature to obtain the main rectifier control objectives with additional
features, such as voltage sag ride-through capabilities [27–29]. Additionally, when a controller is tuned
in the dq domain, the dq and its inverse conversions should be perfectly synchronized with the grid;
otherwise, these could work incorrectly, causing frequency variations.
Identified key features within much of the reviewed literature are the use of the dq transformations
on the one hand and the use of two control-loop schemes on the other hand. The hypothesis of this
paper is that even excluding these traditional control scheme characteristics, it is still possible to comply
with the rectifier requirements and obtain a reduced control concept within a BESS. Therefore, the aim
of this research is to analyze, design, and validate an alternative control scheme for a three-phase
LCL-filter PWM rectifier that fulfills the requirements of a BESS module.
Unlike the conventional approaches, this paper proposes a straightforward control scheme that
directly solves the tracking problem in the time domain, and consequently, it avoids the synchronous
dq stages. Additionally, the two-loop control architecture is avoided by using a single-loop current
control based on its input-output feedback linearization, where the current references are generated
with the power balance concept. In this research work, we considered the BESS requirements when
it works as a charger, and we focused the analysis in the control scheme design for the three-phase
LCL-filter PWM rectifier stage. We undertook this research to develop a reduced control scheme
concept that can be thought and adapted to other BESS power stages, and the traditional overall control
concept is reduced.
The methodology chosen for our research is mainly based on the analysis of the line-to-line model
to simplify the control design and the extension of it to the three-phase case. In summary, the problem
to address is organized in this paper as follows. The second section describes the PWM rectifier and
the filter stages within the BESS. The third section is dedicated to the development of the PWM rectifier
model with the delta-connected LCL filter. The fourth section analyzes the closed-loop system based
on the proposed nonlinear controller. The fifth section presents a set of simulations with the fulfillment
of the corresponding BESS requirements. Then, some conclusions are drawn in the final section.

2. PWM Rectifier Topology within the BESS

Among the BESS solutions, the modular options are the most popular in the market owing to the
characteristics of mobility and ease of increasing installed power [30]. Whereas the former is useful in
placing the BESS as needed in the grid, the latter refers to connecting parallel modules (in a container)
Energies 2019,
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12, 4093
x FOR PEER REVIEW 33 of 18
of 17

useful in placing the BESS as needed in the grid, the latter refers to connecting parallel modules (in a
to typicallytoreach
container) a rated
typically power
reach from
a rated 1 MW
power to 21 MW
from MW depending on the battery
to 2 MW depending on thetechnology [1,2,26].
battery technology
The modular topology presented in [26,31] (see Figure 1) is a suitable option for a medium
[1,2,26]. The modular topology presented in [26,31] (see Figure 1) is a suitable option for a medium power rating.
The
powerBESS comprises
rating. twocomprises
The BESS main power twostages: the dc-dc
main power stagethe
stages: fulfills
dc-dcthe battery
stage bank
fulfills therequirements,
battery bank
while the dc–acwhile
requirements, stagethe
accomplishes
dc–ac stagethe utility requirements
accomplishes the utilitythrough the LCL
requirements filter. the LCL filter.
through

Z load iload I DC

iC Q 1
Q3 Q5 i Lf 1 Lf 2 iA
a
va L vcAB vcCA L v i iCA
VDC ib f 1 Cf Cf f 2 i AB AB
vb B

i Lf 1 C vcBC L i vBC i vCA

vc c f
f 2
C BC

Q2 Q4 Q6

Figure 1. PWM rectifier with delta-LCL filter within the battery energy storage system (BESS) module.
Figure 1. PWM rectifier with delta-LCL filter within the battery energy storage system (BESS) module.
The LCL filter is mainly designed to comply with the harmonic requirements when the BESS
works as a load and as a power source, but it also allows the BESS to operate as a current source
The LCL filter is mainly designed to comply with the harmonic requirements when the BESS
or as a voltage source. Nonetheless, there are some filter design constraints to consider, such as
works as a load and as a power source, but it also allows the BESS to operate as a current source or
total impedance, current ripple through inductors, reactive power absorbed by filter capacitors, and
as a voltage source. Nonetheless, there are some filter design constraints to consider, such as total
resonance [10–12].
impedance, current ripple through inductors, reactive power absorbed by filter capacitors, and
Furthermore, when the BESS delivers energy to the grid, the LCL filter is in delta connection
resonance [10–12].
because the battery bank voltage reference imposes how the dc bus voltage feeds the dc–ac stage [26].
Furthermore, when the BESS delivers energy to the grid, the LCL filter is in delta connection
This power stage works as a three-phase PWM rectifier to feed the dc-dc stage for charging the battery
because the battery bank voltage reference imposes how the dc bus voltage feeds the dc–ac stage [26].
bank. For this purpose, the rectifier boosts the input voltages (vAB , vBC , and vCA ) to the dc bus voltage
This power stage works as a three-phase PWM rectifier to feed the dc-dc stage for charging the battery
VDC ; besides, the input currents (iAB , iBC , and iCA ) are indirectly controlled through the inductor
bank. For this purpose, the rectifier boosts the input voltages (𝑣 , 𝑣 , and 𝑣 ) to the dc bus voltage
currents (iA , iB , and iA ) of each L f 2 to fulfill the grid requirements. These grid-tied inductors are
𝑉 ; besides, the input currents (𝑖 , 𝑖 , and 𝑖 ) are indirectly controlled through the inductor
designed with a slight voltage drop so that the capacitor voltages (vcAB , vcBC , and vcCA ) are similar
currents (𝑖 , 𝑖 , and 𝑖 ) of each 𝐿 to fulfill the grid requirements. These grid-tied inductors are
to the input voltages [32]. Finally, the dc bus current IDC is the result of each rectifier-tied inductor
designed with a slight voltage drop so that the capacitor voltages (𝑣 , 𝑣 , and 𝑣 ) are similar
current (ia , ib , and ic ). As a result, the mentioned characteristics define the converter topology to model.
to the input voltages [32]. Finally, the dc bus current 𝐼 is the result of each rectifier-tied inductor
current
3. (𝑖 , 𝑖 , and
Phase-Phase PWM 𝑖 ). As a result,
Rectifier Model the mentioned characteristics define the converter topology to
model.
Two considerations are established to analyze the three-phase PWM rectifier of Figure 1:
•3. Phase-Phase
Assume that PWM
Zload Rectifier
represents Model
the combined battery bank and dc-dc converter dynamics. Hence,
Z load is
Two computed with
considerations theestablished
are sensed delivered
to analyze the ithree-phase
current load and the sensed
PWM output
rectifiervoltage, as specified
of Figure 1:
in Equation (1). This consideration is valid due to the decoupling capacitor CDC that allows the
• Assume that
modeling 𝑍 power
of each represents the combined battery bank and dc-dc converter dynamics. Hence,
stage separately.
• 𝑍
Full-bridge converter model, formeddelivered
is computed with the sensed current 𝑖 v ,and
by the line-to-line the sensed output voltage, as
AB is obtained. This consideration is
given for a considered three-phase balanced system where the converter and capacitor
specified in Equation (1). This consideration is valid due to the decoupling its voltage𝐶sensors
that
allows
are the modeling
naturally of each power stage separately.
delta-connected.
• Full-bridge converter model, formed by the line-to-line 𝑣 , is obtained. This consideration is
The
given corresponding
for a considered switching statesbalanced
three-phase that generate
system thewhere
output
thevoltage vab =
converter va its
and − vvoltage
b are shown in
sensors
Tableare
1. The switching
naturally states sw1 and sw2 , which are, respectively, associated with Q1 and Q3 , simplify
delta-connected.
the model analysis by stating: vAB = VDC (sw1 − sw2 ) and IDC(ab) = iab (sw1 − sw2 ), where sw1 , and
sw2 ∈The
{1, 0}corresponding
are the switchingswitching
functionsstates
andthat generate
the dc the output
bus current IDC(ab) voltage
is formed 𝑣 with
= 𝑣the−corresponding
𝑣 are shown
in Table 1. The switching
current phases (ia and ib ). states 𝑠𝑤 and 𝑠𝑤 , which are, respectively, associated with 𝑄 and 𝑄 ,
simplify the model analysis by stating: 𝑣 = 𝑉 (𝑠𝑤 − 𝑠𝑤 ) and 𝐼 ( ) = 𝑖 (𝑠𝑤 − 𝑠𝑤 ), where
𝑠𝑤 , and 𝑠𝑤 ∈ {1,0} are Table 1. Switching
the switching states forand
functions the dc busvAB
the line-to-line circuit.𝐼 ( ) is formed with the
current
corresponding current phases (𝑖 and 𝑖 ).
Mode Q1 Q2 Q3 Q4 sw1 sw2 vab IDC(ab)
I 0 1 0 1 = VDC
Zload 1 1 0 0
(1)
II 0 1 1 0 iload 0 1 −VDC −iab
III 1 0 0 1 1 0 VDC iab
IV 1 0 1 0 0 0 0 0
Energies 2019, 12, x FOR PEER REVIEW 4 of 18

Table 1. Switching states for the line-to-line 𝑣 circuit.

Mode Q1 Q2 Q3 Q4 𝒔𝒘𝟏 𝒔𝒘𝟐 𝒗𝒂𝒃 𝑰𝑫𝑪(𝒂𝒃)

Energies 2019, 12, 4093 I 0 1 0 1 1 1 0 0 4 of 17
II 0 1 1 0 0 1 −𝑉 −𝑖
III 1 0 0 1 1 0 𝑉 𝑖
IV 1 0 1 0 V0DC 0 0 0
Zload = (1)
iload
Besides, the input current 𝑖 in the delta connected source is computed with Equation (2),
Besides, the input current iAB in the delta connected source is computed with Equation (2), based
based on the sensed current at each inductor 𝐿 .
on the sensed current at each inductor L f 2 .
1
iAB =1 ( iA − iB ) (2)
iAB = 3(iA − iB ) (2)
3
The previous
The considerations lead
previous considerations lead to
to the
the equivalent
equivalent phase–phase circuit model
phase–phase circuit model ofof Figure
Figure 2,2, where
where
d𝑑1 ,, d𝑑2 ∈ ∈(0,1)
(0,1)
areare
thethe averaged
averaged functions
functions of 1𝑠𝑤
of sw andandsw2 , 𝑠𝑤 , respectively,
respectively, and dand
12 = 𝑑
d1 − =
d 2𝑑∈ − 𝑑
(−1, ∈
1). (−1, 1).
Current
Current 𝑖 = (𝑖 − 𝑖 )/3, and the dc bus current is given by the function 𝑑
iAB = (iA − iB )/3, and the dc bus current is given by the function d12 iab where iab = ia − ib . 𝑖 where 𝑖 = 𝑖 −
𝑖 .

iload I DC va i L L f 2 iA i vCA
iC a f1
Cf iAB CA
VDC CDC vcAB vAB
Z load

d12 iab d12VDC

vb ib L f 1 Lf 2 i
B
iBC
vBC

Figure 2.
Figure Equivalentline-to-line
2. Equivalent vAB PWM
line-to-line 𝑣 PWM rectifier
rectifier circuit.
circuit.

By analyzing the bold circuit with Kirchhoff’s voltage and current laws (KVL and KCL,
By analyzing the bold circuit with Kirchhoff's voltage and current laws (KVL and KCL,
respectively), the mathematical model is expressed in Equation (3). The first and the second expressions
respectively), the mathematical model is expressed in Equation (3). The first and the second
describe the KVL for loops one and two, where the source current iAB and the current through inductors
expressions describe the KVL for loops one and two, where the source current 𝑖 and the current
L f 2 are obtained as state variables, respectively. Similarly, the third and the fourth expressions describe
through inductors 𝐿 are obtained as state variables, respectively. Similarly, the third and the fourth
the KCL at nodes one and two, where the capacitor voltage vcAB and the dc bus voltage VDC are
expressions describe the KCL at nodes one and two, where the capacitor voltage 𝑣 and the dc bus
obtained as state variables, respectively.
voltage 𝑉 are obtained as state variables, respectively.
diAB vAB vcAB
diAB v v di v V dv= 3L − 3i 3iab dVDC i VDC
= AB − cAB ab = cAB − DC d12dt cAB f=
2 3LAB
f2 − = ab d12 − (3)
dt 3L f 2 3L f 2 dt 3L f 1 3L f 1 dt Cf C f dt CDC Zload CDC
diab vcAB VDC
= − d12
dt 3Lf 1 3Lf 1
Defining ex = (e x1 e
x2 e x4 )' as the state variables of (iAB iab vcAB VDC )', respectively and (3)
x3 e the
dvcAB 3iAB state-space
line-to-line control as d12 = uab ; then, the corresponding 3i system in matrix form is shown in
= − ab
Equation (4). dt Cf Cf
 .   dVDC i VDC 
= ab d12 −
−1   vAB 
 e x1   0 0 dt 3L
f
C2 DC 0Zload CDC e x1   3L f 2 
 .   −uab
 
1  
 e   0 0
      
Defining 𝑥 = (𝑥 𝑥 x𝑥. 2 𝑥 = 3L f 1 3L f 1 (𝑖  𝑖 x2𝑣  +𝑉 )',
0 respectively

)' as
 the state variables of and the line-
 e 
3 −3
 (4)
0 0 x 0

to-line control as 𝑑 = 𝑢x. 3 ; then,
   
3 system
 Cthe 
corresponding state-space in matrix form is shown in
 e     
C   e   
 f uab
f   
   
x

  0 −1 4 0
Equation (4).

x4
e CDC 0 Zload CDC
 e
.
 −1 
 0 0 in its input-affine
The state-space system can be expressed
3L f 2
0  x = f (e
nonlinear form e x) + g(e
x)uab ,
which is described in Equation (5).    v 
&
 x%   AB
 1  0 1 −uab  x%  
0   1   3L f 2 
 x&%2    −e 3 L 3 L  x%2
 
  0  x% +  0 
x + v f 1 f 1
  =   3 AB
   (4)
 x&
%3  3  −3ef 2 0 
3L
  0−ex4  x%  0 
3
 &  .  C  C x3

%
 x4  e
f
 3L f 1   3L f 1   4   0 
f 
x =  3u(ex −e
 
+ u (5)
 ab1 x2 )   −10   ab
 0  C C f 0  Z C  
  DC  load exDC 2 
−ex4
CDC
 
Zload CDC
The state-space system can be expressed in its input-affine nonlinear form 𝑥 = 𝑓(𝑥 ) + 𝑔(𝑥 )𝑢 ,
whichInisthis researchinpaper,
described all sensors
Equation (5). are considered available to obtain the physical variables for the
control loop, since these sensors are typically used in a power converter. Besides, the sinusoidal PWM
(SPWM) technique is considered due to its simplicity to prove the proposed control.
  3( x%
1 − x2 ) 
%  0 
 C   x% 
 f
  2 
 − x%4   CDC 
 
 Z load CDC 

In2019,
Energies this12,
research
4093 paper, all sensors are considered available to obtain the physical variables
5 offor
17
the control loop, since these sensors are typically used in a power converter. Besides, the sinusoidal
PWM (SPWM) technique is considered due to its simplicity to prove the proposed control.
4. Nonlinear Control Design Based on Input-Output Map Linearization
4. Nonlinear Control
The control Design
scheme Based on
is developed Input-Output
using Mapmodel.
the line-to-line Linearization
Its merit lies in the opportunity to
avoidThe
abc–dq–abc transformations
control scheme and
is developed double
using the control loops.
line-to-line Hence,
model. to pinpoint
Its merit lies in the
the control design,
opportunity to
the control
avoid objectives
abc–dq–abc should be considered:
transformations and double control loops. Hence, to pinpoint the control design,
the control objectives should be considered:
• To regulate the dc bus voltage for a given duty cycle, even with input voltage variations.
•• To produce
To regulate athe dc bus voltage
low-harmonic for a given
distortion duty
of the cycle,
input evensignal.
current with input
In thisvoltage variations.
case, the THD should be
• To produce
lower a low-harmonic distortion of the input current signal. In this case, the THD should
than 5%.
• be lower
To than 5%.
accomplish a near unity input power factor. For this task the current iAB must track the input
• vAB . a near unity input power factor. For this task the current 𝑖 must track the input
To accomplish
voltage
voltage 𝑣 .
The first objective, which is naturally the main function of the rectifier itself, is a sufficient task
The first objective, which is naturally the main function of the rectifier itself, is a sufficient task
because the converter acts as a voltage source for the dc-dc stage that should be designed to withstand
because the converter acts as a voltage source for the dc-dc stage that should be designed to withstand
input voltage disturbances. In contrast, the other two control objectives are needed to comply with
input voltage disturbances. In contrast, the other two control objectives are needed to comply with
the power quality requirements described in IEEE-519. These control objectives are achieved with the
the power quality requirements described in IEEE-519. These control objectives are achieved with the
proposed control scheme of Figure 3. It mainly consists of a single-loop nonlinear controller and a
proposed control scheme of Figure 3. It mainly consists of a single-loop nonlinear controller and a
current reference generator.
current reference generator.

iload VDC , v AB vcAB iab

iAB
V *
i AB
*
sw1
DC −e
+  uAB
− sw2
i AB

Figure 3. The proposed control scheme for the line-to-line vAB circuit.
Figure 3. The proposed control scheme for the line-to-line 𝑣 circuit.
To compute the current reference, the power balance between the ac side and the dc side is
To compute
considered. Then,the
by current
matching reference,
the inputthe power
power PACbalance
describedbetween the ac (6)
by Equation sidetoand the dc side
the output poweris
considered.
PDC described Then, by matching
by Equation thepeak
(7), the input powerIp 𝑃can be
current ∗ described byasEquation
obtained, shown in(6) to the output
Equation power
(8), where Vp
∗
𝑃 described by Equation ∗ (7), the peak current 𝐼 can be obtained,
∗ as shown in Equation
is the peak grid voltage, VDC is the desired dc bus voltage, and iload is the load current computed with (8), where
∗
𝑉 is from
Zload the peak grid voltage,
Equation 𝑉 ∗ = isVthe
(1) as i∗load ∗ /Z
load . dc bus voltage, and 𝑖
desired is the load current computed
DC
∗ ∗
with 𝑍 from Equation (1) as 𝑖 = 𝑉 /𝑍 .
3VP Ip∗
PAC = 3VP I *p (6)
PAC = 2 (6)
2

∗ ∗
PDCP ==VVDC
* *i
i load (7)
DC DC load (7)

2V ∗2
*2
2VDC
Ip∗ =I p = 3V ZDC
*
(8)(8)
3VppZload
load

Given Ip∗ , the instantaneous current reference i∗AB is computed with Equation (9), where the
reference must be in phase (φ) with the line-to-line voltage vAB to approach a unitary power factor.

i∗AB = rAB = Ip∗ sin(2π f t + φ) (9)

The tracking problem is solved with the control law uab by using the input-output map linearization
of Equation (4) to simplify the analysis. The bilinear system has a relative degree of ρ = 3 with h(e
x) = e
x1 ,
so that its diffeomorphism e x) is defined in Equation (10), where Lif h(e
TAB (e x) is the i-th derivative of
Lie and φ(e
x) satisfies Lφ g(e
x) = 0 and g(0) = 0. The normal form is given in Equation (11), which is
obtained with Equation (10), where η ∈ R and ξ ∈ R3 .
Energies 2019, 12, 4093 6 of 17

x24 +3L f 1e
CDCe x22
 
 η   φ(e
   
x)
 
  CDC 
 ξ1   h(e
  
x) x1
    
e
TAB (e
e x) =   =   = 
−ex3 vAB
 (10)
 ξ2   L f h(e
x)   +

3L f 2 3L f 2
   2   
ξ3

L f h(e
x)  
 −1
( x − x )

3L Cf2 f
e 1 e 2

2(L f 2 C f ξ3 +ξ1 )(vAB −3L f 2 ξ2 ) 2(ηCDC −3L f 1 (L f 2 C f ξ3 +ξ1 )2 )

 
 .   − 
 η CDC Zload C2DC 
  
 .
 ξ ξ2
  
  
 . 1
 =  ξ3 (11)
  
 ξ2
 
  r  
 .    ηCDC −3L f 1 (L f 2 C f ξ3 +ξ1 )2 
ξ3

−1
uAB − vAB + 3L f 1 L f 2 ξ2 
    
 
 3L f 1 L f 2 C f   CDC 
 
The internal dynamics is restricted to z∗ = e x ∈ R4 h(e x) = L2f h(e
x) = L f h(e x) = 0 =
n o
e 4
x∈R ex1 = 0, e
x3 = vAB , e
x2 = 0 . As a result, the zero dynamics is described by Equation (12),
which is asymptotically stable for Zload > 0 and CDC > 0.
. −2
η = f0 (e
e η, 0) = η
e (12)
CDC Zload
By defining e = h(x) − rAB and assuming that:
... ...
• The current reference rAB and its derivatives up to r AB are bounded for all t ≥ 0 and r AB is a
piecewise continuous function of t, and
...
• The signals rAB , . . . , r AB are available online,

the external dynamics can be linearized by using the control law (Equation (13)).
n h ρ
eAB + ...
i o
αAB (e
uAB = e
e β(e
x) + e x ) −K
eeTAB (e
x) − R r AB (13)

where
−L3f h(e
x) Lf1 e
"
x3 x v
#
αAB (e + 3 − AB
e
e x) = =
L g L2f h(e
x) x4 L f 1
e Lf2 Lf2

1 Lf1 −3L f 1 L f 2 C f
β(e
e x) = = =
γ(e
x) 2
L g L f h(e
x) ex4
h . .. i0
e = [k1 k2 k3 ], R
K eAB = rAB rAB rAB
ρ
TAB the last ρ components of the diffeomorphism.
e

5. Modeling and Control for Three-Phase PWM Rectifier

The strategy of using the line-to-line model to tune the nonlinear control gains leads to computing
vector K
e1X3 , for solving the tracking problem, instead of computing a matrix K3X9 for the three-phase
model. For analyzing the three-phase rectifier, the following model based on the extension of (4)
is considered:
 .      vAB 
 x1   03x3 03x3 M1 03x1  x1   3L f 2 
 .     v
 x2   0 M3  x2   3LBCf 2 
 
  3x3 03x3 M2
 .  =  + (14)

03x1  ...   vCA 
  
 ..   M4 −M4 03x3

3L f2 
−1
    
 .  01x3 M5 01x3 Z C

   
 
x10 x10
  
07x1

load DC
Energies 2019, 12, 4093 7 of 17

where (x1 x2 x3 x4 x5 x6 x7 x8 x9 x10 )' are defined as the state variables of (iAB iBC iCA iab ibc ica vcAB
vcBC vcCA VDC )' respectively, and:
    
−uAB
  
−1 −1 3 0 0

 3L f 2 0 0 


 3L f 1 0 0 


 3L f 1



 Cf


        " #
       
−1 −1 −uBC 3 uAB uBC uCA
M1 =  , M2 =  , M3 =  , M4 =  , M5 =
       
0 3L f 2 0 0 3L f 1 0 3L f 1 0 Cf 0 .
 
  
    
 CDC CDC CDC
    
 −1
  −1
  −uCA   3

 0 0 3L f 2
  0 0 3L f 1
 
3L f 1
  0 0 Cf


For the three-phase rectifier control, consider (h1 (x) h2 (x) h3 (x))' = (x1 x2 x3 )' and its relative grade
ρ ρ ρ
vector as ρ = (3 3 3), let TAB , TBC , and TCA be the last ρ components of the diffeomorphism for each
line-to-line voltage sub-circuit described as:

x1
 
x2
 
x3

     
ρ −x7  ρ vAB −x8 vBC  ρ −x9 vCA
+ 3L f 2 + 3L f 2 3L f 2 + 3L f 2
    
TAB (x) =  3L f 2  T
 BC ( x )
3L f 2 = 

,T (x) = 
 CA 


−1 −1 −1
( x − x ) 3L f 2 C f (x2 − x5 ) 3L f 2 C f (x3 − x6 )
 
    
3L C f2
1
f
4

Then, the diffeomorphism of the three-phase PWM rectifier is described in Equation (15).

CDC x210 +3L f 1 (x24 +x25 +x26 )

 
 
 CDC 
 ρ 
T(x) = 
 TAB (x) 
(15)
ρ

TBC (x)
 

ρ
 
TCA (x)

n
The internal dynamics is restricted to z∗ = x ∈ R10 x1 , x2 , x3 = 0; x4 , x5 , x6 = 0; x7 = vAB ; x8 =
vBC ; x9 = vCA }. As a result, the zero dynamics is described by Equation (16), which is asymptotically
stable for Zload > 0 and CDC > 0.

. −2
η = f0 (η, 0) = η (16)
CDC Zload
Therefore, the line-to-line control can be computed with Equations (17)–(19) for the three-phase
rectifier by considering the corresponding voltages and current references.

L f 1 x7
" #
x − vAB n h ρ i ... o
uAB = + 7 + β(x) −K TAB (x) − RAB + r AB (17)
x10 L f 1 Lf2

L f 1 x8
" #
x8 − vBC n h ρ i ... o
uBC = + + β(x) −K TBC (x) − RBC + r BC (18)
x10 L f 1 Lf2
L f 1 x9
" #
x9 − vCA n h ρ i ... o
uCA = + + β(x) −K TCA (x) − RCA + r CA (19)
x10 L f 1 Lf2
where
−3L f 1 L f 2 C f h . .. i0 h . .. i0 h . .. i0
β(x) = ,K = [k1 k2 k3 ], RAB = rAB rAB rAB ,RBC = rBC rBC rBC ,RCA = rCA rCA rCA
x10

An integral controller is included, in the nonlinear control block of Figure 3, to provide robustness
to the system concerning constant parametric uncertainties that could be in the converter itself, such as
parasitics and disturbances in the grid, such as voltage variations. Then, the control laws result in:

L f 1 x7
" # ( Z )
x7 − vAB ...
uAB = + + β(x) −KeAB − ki (x1 − rAB )dt + r AB (20)
x10 L f 1 Lf2
robustness to the system concerning constant parametric uncertainties that could be in the converter
itself, such as parasitics and disturbances in the grid, such as voltage variations. Then, the control
laws result in:

L f 1  x7 x7 − vAB 

 
Energies 2019, 12, 4093 u AB =  +  + β (x) - Ke AB − ki (x1 − rAB )dt + &
r&
&
AB  8(20)
of 17
x10  L f 1 L f 2   

L f 1  x8 x8 −#vBC 

"
 + β (x) - KeBC − ki (x2 − rBC ) dt + &&
r&
L f 1 uxBC8 = x8 − +v BC  (21)
" Z #
x L L   ...
uBC = +10  f 1 BC
 (x) −KeBC − ki
f 2+ β (x2 − rBC )dt + r BC (21)
x10 L f 1 Lf2

L f 1 ux9 = L f 1x9 x−9 v+CA

x9 − vCA 

 &
" # " Z #
CA +   (+xβ)(x−Ke
) - KeCA −−
ki k (x3 −(rCA ) dt +r&
r&
CA 
... (22)
uCA = + β x − ) dt + r (22)
x10 L f 1 x10  LLf 1f 2 L f 2   CA i 3 CA CA

The control objective can be met by the design design of thethe gain values (𝑲
gain values (K k𝑘i )) =
=𝓚 for the
K for the extended
extended
system, such
system, suchthat
thatthethe
matrix A −𝓐
matrix BK− is
𝓑𝓚 is Hurwitz
Hurwitz (or where
(or stable) stable)Awhere
and B are 𝓐 defined
and 𝓑 in areEquation
defined(23)
in
Equation
with Ac and(23) as the𝑨canonical
Bc with 𝒄 and 𝑩𝒄representation
as the canonical ρ integrators.of
representation
of the The 𝜌 integrators.
thetracking The tracking
control problem, now
control problem,
converted now converted
into a stabilization one,into a stabilization
is reduced one, is of
to a problem reduced to a the
designing problem
K valuesof designing
to assignthe 𝒦
every
values to assign every eigenvalue with a strictly negative real part and place them
eigenvalue with a strictly negative real part and place them in the open left-half complex plane [33]. in the open left-
half complex plane [33]. " # " #
Ac 0 Bc
A𝓐== 𝑨𝒄 0 , 𝓑 ,= B𝑩𝒄= (23)
(23)
00 0 0 0 0
For the
For thegain
gainselection,
selection,the
thetopology
topology physical
physical limitations
limitations should
should be considered
be considered givengiven
that, that,
even even
with
with nonlinear
nonlinear controllers,
controllers, the established
the established objectives
objectives cannot be cannot be achieved
achieved if these limitations
if these limitations are exceeded.are
exceeded. In summary, the procedure of the control design is described
In summary, the procedure of the control design is described in Figures 4 and 5. in Figures 4 and 5.

K
1x 3

Ki

Energies 2019, 12, x FOR PEER REVIEW 9 of 18

Figure 4. Procedure flowchart for the control scheme design.
Figure 4. Procedure flowchart for the control scheme design.
x= f ( x) + g ( x)u
η= f0 (η , e + R)
y = h( x)
η  e= Ac e + Bc v
T ( x) =   σ= y − r
u = α ( x) + β ( x) v + r ρ 

ξ 
η= f0 (η ,ξ ) v = − Ke − ki r
ηis minimum phase
ξ= Acξ + Bcγ ( x) u − α ( x)
η= f0 (η , e + R)
y = C cξ
e= ( Ac − Bc K ) e
Tracking problem:
e=ξ −R σ= y − r
η= f0 (η , e + R) Hurwitz
{
e= Ac e + Bc γ ( x) u − α ( x) − 
r
 }

 
u = α ( x) + β ( x) - Ke − ki ( x − r) dt + 
r

 

Figure 5. Procedure flowchart for the control law design.

Figure 5. Procedure flowchart for the control law design.
6. Simulation Results
6. Simulation Results
In this section, the main simulation results are presented to point out the control effectiveness in
In thiswith
complying section, the mainrequirements,
the rectifier simulation results
whichare arepresented
shown into point2 out
Table [34].the control effectiveness
Additionally, in
the passive
complying
devices are with
sizedtheforrectifier
a 100 kW requirements, which
module, which is aare shown in
common Tablerating
power 2 [34].for
Additionally, the passive
BESS applications [1].
devices
The are sized
simulated systemfor is
a 100 kWinmodule,
shown Figure 6which
whereisthe a common power signals,
required sensed rating for BESS applications
according to variables[1].
of
The simulated system is shown in Figure 6 where the required sensed signals, according to variables
of Figure 1, are pointed out for computing the current references and the nonlinear control. According
to Figure 4, a parameterization with respect to the highest value of 𝒦 is considered, as described in
Equation (23), for 𝑢 , and a similar consideration is done for the other control laws.
 
Energies 2019, 12, x FOR PEER REVIEW 9 of 18

Energies 2019, 12, 4093 x= f ( x) + g ( x)u 9 of 17

η= f0 (η , e + R)
y = h( x)
η  e= Ac e + Bc v
T ( x) =   σ= y − r

u = α ( x) + β ( x) v + r ρ 
Figure 1, are pointed out for computing the ξcurrent  references and the nonlinear control. According to
η= f0 (η ,with
Figure 4, a parameterization ξ) respect to the highest value v of= −K − kiconsidered,
Ke is r as described in
= A ξ + B γ ( x) u − α ( x)
η is minimum phase
ξ
Equation (24), for uAB , and ac similar consideration is doneηfor
c  = f 0 (the
η , e +other
R) control laws.
y = C cξ
e= ( AcZ− Bc K ) e
L f 1 x7 Tracking
x − v problem: ...
" # ( )
uAB = + 7 e = ξAB − R + β(x) −KeABσ −= yki− r (x1 − rAB )dt + r AB (24)
ηx=10f (ηL, ef 1+ R) Lf2
0 Hurwitz

where
{
e= Ac e + Bc γ ( x) u − α ( x) − 
r }
u = α ( x) + β ( x) - KeK− ki ( x − r) dt + 


 r

17
β(x) = 1 × 10 β(x), K = 
17
, 
1 × 10
Figure 5. Procedure flowchart for the control law design.
Table 2. Three-phase PWM rectifier requirements and parameters [34].
6. Simulation Results
Parameter Value
In this section, the main
Grid voltage simulation
(ac: L–L, RMS) results are presented to point out 480the
V control effectiveness in
complying with Grid
thevoltage regulation
rectifier requirements, which are shown in Table 2 [34]. ±10% Additionally, the passive
Rated power 100 kW
devices are sized for a 100 kW module, which is a common power rating for BESS applications [1].
Power factor Near to unity
The simulated system
Output is shown
voltage in Figure 6 where the required sensed920
(dc bus voltage) signals,
V (±3%)according to variables
of Figure 1, are
THD pointed out(iAB
of current for, icomputing
BC , iCA ) <5%
the current references and the nonlinear control. According
to Figure 4,THD of voltage (vAB , vBC
a parameterization , vCArespect
with ) to the highest value of 𝒦 is<5% considered, as described in
dc bus capacitor 6 mF
Equation (23), for 𝑢 Duty, and a similar consideration 1.1
class
is done for the other control laws.
p.u. for 1 h, 1.25 p.u. for 2 min, and 1.5 p.u. for 10 s
Response time in transient load <40 ms
L x x −v 
Delta − LCL filter : uLABf 1=, Lff12, C7f + 7 AB  + β (x) - Ke AB − ki (x1387
x L
Parasitic resistances of L f 1 , 10L f2 , f C
1
f
L f2  
− rABµH, &
r&&  µH, 9.8 µF
)dt +231.5
AB 
1.9 mΩ, 2.6 mΩ, and3.8 mΩ, respectively
 (23)
Switching frequency (it is chosen as a prime number
where 12,060 Hz
multiple of three to eliminate triplen harmonics)
Battery model parameters (equivalent values for a R0 = 0.45 Ω, R1 = 0.13 Ω, R2 = 0.15 Ω,
&F, C & r&
&
vented lead-acid battery ( )
×1017 β (x), K =
β (x) = 1bank)
K
1 × 1017
, k i = C ki 765
1 = 17
,&
r&
AB = 2
= 4081
AB
, F, and voc = 816 V
1× 10×17 10−8 , 8.93 × 10−12 , 5.2)
× 10 × 10−2 , 270
1(5.1
Parameterized gain values: (k1 k2 k3 ki )

Three-phase
PWM rectifier Delta
Zload

LCL Grid
filter voltage

PWM ia , ib , ic
Nonlinear vcAB , vcBC , vcCA
current i A , iB , iC
controller
+
integrator
Current reference
*
V DC generator

Figure 6. Simulation diagram of three-phase PWM rectifier.

Figure 6. Simulation diagram of three-phase PWM rectifier.
For designing the control law, the three-phase LCL PWM rectifier model (Equation (14)) was
For designing the control law, the three-phase LCL PWM rectifier model (Equation (14)) was
validated with the specialized simulators: PSCAD® and SimPowerSystems-Simulink® . Figure 7 shows
validated with the specialized simulators: PSCAD® and SimPowerSystems-Simulink®. Figure 7
the validation with Simulink in open-loop mode showing currents iA , iB , iC , voltages vcAB , vcBC , vcCA ,
shows the validation with Simulink in open-loop mode showing currents 𝑖 , 𝑖 , 𝑖 , voltages
and the dc voltage VDC . However, for the simulation, the defined libraries with semiconductors were
𝑣 , 𝑣 , 𝑣 , and the dc voltage 𝑉 . However, for the simulation, the defined libraries with
used for the power converter stage. Concerning the battery model, the equivalent electrical circuit
semiconductors were used for the power converter stage. Concerning the battery model, the
(EEC) of Figure 8, was used. The elements of the EEC model represent the internal battery dynamics
equivalent electrical circuit (EEC) of Figure 8, was used. The elements of the EEC model represent
where R0 is the internal/ohmic resistance, C1 and R1 represent capacitor and resistor for the distribution
the internal battery dynamics where 𝑅 is the internal/ohmic resistance, 𝐶 and 𝑅 represent
of reactivity and the local property of electrodes, C2 and R2 represent the interfacial impedance of the
capacitor and resistor for the distribution of reactivity and the local property of electrodes, 𝐶 and
cell, voc represents the battery open circuit voltage, and vbat is the battery voltage [35–37].
Energies 2019, 12, x FOR PEER REVIEW 10 of 18
Energies 2019, 12, x FOR PEER REVIEW 10 of 18
𝑅 represent the interfacial impedance of the cell, 𝑣 represents the battery open circuit voltage,
𝑣 2019,is12,
𝑅 represent
Energies
and the4093
battery
the voltage
interfacial [35–37]. of the cell, 𝑣
impedance 10 of 17
represents the battery open circuit voltage,
and 𝑣 is the battery voltage [35–37].

Figure 7. The contrast of the three-phase rectifier model and converter signals in open-loop mode.
Figure 7. The contrast of the three-phase rectifier model and converter signals in open-loop mode.
From
Figureleft
7. to right:
The 𝑖 , 𝑖 ,of
contrast 𝑖 ,the
𝑣 three-phase
, 𝑣 , 𝑣 , rectifier
and 𝑉 .model and converter signals in open-loop mode.
From left to right: iA , iB , iC , vcAB , vcBC , vcCA , and VDC .
From left to right: 𝑖 , 𝑖 , 𝑖 , 𝑣 , 𝑣 , 𝑣 , and 𝑉 .
R0 R1 R2
R0 R1 R2 +
voc vbat+
C1 C2
voc vbat
C1 C2 -
-
Figure 8. Equivalent electrical circuit (EEC) model of the battery. The parameter values, which represent
Figure 8. Equivalent electrical circuit (EEC) model of the battery. The parameter values, which
Energies
the2019, 12, xbank,
battery FOR PEER
wereREVIEW
obtained for the vented Lead-acid technology. 11 of 18
represent
Figure 8. the battery bank,
Equivalent were circuit
electrical obtained for the
(EEC) vented
model of Lead-acid technology.
the battery. The parameter values, which
represent
To
To assessthe
assess thebattery
the bank, were
three-phase
three-phase PWM
PWM obtained forperformance
rectifier
rectifier the vented Lead-acid
performance with thetechnology.
proposed control scheme, a load
Table 2. Three-phase PWM rectifier requirements and parameters [34].
current iload𝑖 depicted
depicted in in Figure
Figure 9 was 9 was used.
used. It represents
It represents the current
the current withwith load load
stepssteps
of theofdc-dcthe dc-dc
stage
Table 2. Three-phase PWM rectifier requirements and parameters [34].
stage
for for charging
charging the
the battery battery
bank in
Parameter bank in accordance
accordance with thewith theclass.
duty duty class. Value
Grid voltage (ac: L–L, RMS)
Parameter 480
ValueV
Grid
Grid voltage
voltage (ac:regulation
L–L, RMS) 480 V
±10%
Grid Rated
voltage power
regulation 100 kW
±10%
Power
Rated powerfactor Near 100tokWunity
Output voltage
Power(dc bus voltage)
factor 920 Vto(±3%)
Near unity
THD of current (𝑖
Output voltage (dc bus voltage), 𝑖 , 𝑖 ) <5%
920 V (±3%)
THD current(𝑣(𝑖 ,,𝑣𝑖 , 𝑣
THDofofvoltage 𝑖 )) <5%
<5%
THD of dcvoltage (𝑣 , 𝑣 , 𝑣 )
bus capacitor 6<5%
mF
dc bus capacitor 1.1 p.u. for 1 hour, 1.25 p.u. for 2 minutes, and
6 mF
Duty class
1.1 p.u. for 11.5 p.u.1.25
hour, for 10 seconds
p.u. for 2 minutes, and
Duty class
Response time in transient load 1.5 p.u.<40 for ms
10 seconds
Figure 9. Loadcurrentcurrent𝑖 iload demanded by ZµH,
by 𝑍load . 231.5
Delta-LCL
Response timefilter: 𝐿 , 𝐿 9., Load
Figure
in transient 𝐶
load demanded387 .<40 msµH, 9.8 µF
6.1. Performance Delta-LCL
with filter:
the Duty Class𝐿 , 𝐿 , 𝐶 1.9 mΩ,
387 µH,2.6 mΩ,
231.5 and 9.8
µH, 3.8 µF
mΩ,
Parasiticwith
6.1. Performance resistances
the Dutyof 𝐿 ,𝐿 ,𝐶
Class 1.9 mΩ, respectively
2.6 mΩ, and 3.8 mΩ,
The Parasitic resistances
tracking problem of 𝐿 , 𝐿 as, 𝐶it is depicted in Figure 10, with the corresponding duty class,
is achieved
The tracking Switching
problem frequency
is achieved as it is depicted in Figure 10,respectively with the corresponding duty
where the input currents iAB , iBC , and iCA track their corresponding references and are in phase with
class, where the input currents 𝑖 , 𝑖 , and 𝑖 track their correspondingHz
(it is chosen as a prime
Switching number
frequency multiple of 12,060 references and are in
the voltages vAB , vBC , and vCA with a power factor of 0.99. It can be observed in Figure 11 that the error
phase three
(it with
is to eliminate
chosen
the as a prime
voltages 𝑣 , 𝑣 harmonics)
triplen
number , and 𝑣 with
multiple of a power factor of 0.99.12,060 It canHzbe observed in Figure
is kept close to zero, even at the highest load condition.
11 Battery themodel
that three isparameters
to eliminate
error kept close (equivalent
triplen evenvalues
harmonics)
to zero, at the highest𝑅 = 0.45condition.
load Ω, 𝑅 = 0.13 Ω, 𝑅 = 0.15 Ω, 𝐶 =
Concerning the THD of current, the requirement is achieved with the proposed control along
for a vented lead-acid battery
Battery model parameters (equivalent values bank) 765 F,
𝑅 = 0.45 Ω, 𝐶 = 𝑅 4081
= 0.13 F, Ω,
and𝑅 𝑣= 0.15
= 816 Ω,V𝐶 =
with the inductor L f 1 and L f 2 values of the LCL filter. The criteria−2for selecting the filter−12values were
Parameterized gain values:
for a vented lead-acid (𝑘 𝑘bank)
battery 𝑘 𝑘) 765×F,10𝐶 ,=270
(5.1 4081 × 10F, ,and
−8 8.93𝑣× 10= 816 V
, 5.2)
considering the converter operation as an inverter. Nevertheless, this paper only addresses the process
Parameterized gain values: (𝑘 𝑘 𝑘 𝑘 ) (5.1 × 10−2, 270 × 10−8, 8.93 × 10−12, 5.2)
of working as a PWM rectifier; hence, the THD = 0.95% for 110 kW as shown in Figure 12.
Current (A)

Voltage (V)
6.1. Performance with the Duty Class
The tracking problem is achieved as it is depicted in Figure 10, with the corresponding duty
The
class, tracking
where problem
the input is achieved
currents 𝑖 , 𝑖 as, itand
is depicted
𝑖 trackintheir
Figure 10, with thereferences
corresponding corresponding duty
and are in
class, where the input currents 𝑖 , 𝑖 , and 𝑖 track their corresponding references
phase with the voltages 𝑣 , 𝑣 , and 𝑣 with a power factor of 0.99. It can be observed in Figure and are in
phase
11 thatwith
the the
errorvoltages 𝑣 , 𝑣to zero,
is kept close 𝑣 at
, andeven with
theahighest
power load
factorcondition.
of 0.99. It can be observed in Figure
Energies 2019, 12, 4093 11 of 17
11 that the error is kept close to zero, even at the highest load condition.

(A) (A)

(V) (V)
Current

Voltage
Current

Voltage
Figure 10. Input currents (𝑖 , 𝑖 , 𝑖 ) and input voltages (𝑣 , 𝑣 , 𝑣 ).
Figure10.
Figure Inputcurrents
10.Input , ,𝑖 iBC, ,𝑖iCA) )and
currents(𝑖(iAB andinput
inputvoltages (vAB, , 𝑣vBC,, 𝑣
voltages(𝑣 vCA).).

Energies 2019, 12, x FOR PEER REVIEW 12 of 18

Energies 2019, 12, x FOR PEER REVIEW 12 of 18
Figure 11. Current error (x1 − rAB ).
Figure 11. Current error (𝑥 − 𝑟 ).
Figure 11. Current error (𝑥 − 𝑟 ).
Concerning the THD of current, the requirement is achieved with the proposed control along
withConcerning
the inductorthe
𝐿 THDandof𝐿 current,
valuesthe requirement
of the LCL filter.isThe
achieved
criteria with the proposed
for selecting control
the filter valuesalong
were
with the inductor 𝐿 and 𝐿 values of the LCL filter. The criteria for selecting the filter
considering the converter operation as an inverter. Nevertheless, this paper only addresses the values were
considering the converter
process of working operation
as a PWM ashence,
rectifier; an inverter.
the THD Nevertheless,
= 0.95% for 110thiskWpaper only in
as shown addresses
Figure 12.the
process of working as a PWM rectifier; hence, the THD = 0.95% for 110 kW as shown in Figure 12.

Figure
Figure 12.
12. THD
THDof currents i𝑖 ,, i𝑖 ,, and
ofcurrents and i 𝑖 ..
Figure 12. THD of currents 𝑖AB , 𝑖BC , and CA𝑖 .
The dc bus voltage regulation, which is indirectly controlled by the input current, as shown in
FigureThe
13.dc
Anbus voltage
error regulation, which is indirectly controlled by the input current, as
theshown in
Figure 13. An error ofof0.5%
0.5% canbebe
can observed
observed byby using
using thethe integral
integral action
action in contrast
in contrast to theto2.9% 2.9% of
of error
Figure
error 13. Anusing
without error it.
of 0.5% can be observed by using the integral action in contrast to the 2.9% of
without using it.
error without using it.

Figure
Figure 13.
13. Output voltage V
Output voltage during the
𝑉DC during the duty
duty class.
class.
Figure 13. Output voltage 𝑉 during the duty class.
6.2. Performance with Input Voltage Variations and Uncertainties
6.2. Performance with Input Voltage Variations and Uncertainties
Additionally, to reveal the effectiveness of the integral action, the control robustness is tested for
inputAdditionally, to reveal
voltage variations; thethe effectiveness
indirectly of the
regulated integral
output action,𝑉theremains
voltage control robustness is tested for
within the established
input voltage variations; the indirectly regulated output voltage 𝑉 remains within
3% requirement despite the grid voltage varies ±10% based on rated power, as it can be seen the established
in Figure
3%
14. requirement despite the grid voltage varies ±10% based on rated power, as it can be seen in Figure
14.
Energies 2019, 12, 4093 12 of 17
Figure 13. Output voltage 𝑉 during the duty class.

6.2. Performance
6.2. Performance with
with Input
Input Voltage
Voltage Variations and Uncertainties
Variations and Uncertainties
Additionally, to
Additionally, to reveal
reveal the
the effectiveness
effectiveness of
of the
the integral
integral action,
action, the
the control
control robustness
robustness isis tested
tested for
for
input voltage
input voltagevariations;
variations;the
theindirectly
indirectlyregulated
regulated output
output voltage
voltage 𝑉 remains
VDC remains within
within thethe established
established 3%
3% requirement despite the grid voltage varies ±10% based on rated power, as it can be seen in
requirement despite the grid voltage varies ±10% based on rated power, as it can be seen in Figure 14. Figure
14.

Figure
Figure 14.
14. Output voltage V
Output voltage 𝑉DC during
during aa grid
grid voltage
voltage variation
variation (±10%).
(±10%).

Concerning the parametric variation, the tolerance values of ±10% in each passive device, the
Concerning the parametric variation, the tolerance values of ±10% in each passive device, the
increase of 100% in its parasitic series resistance, and a 100% increase in the on-resistance of power
increase of 100% in its parasitic series resistance, and a 100% increase in the on-resistance of power
semiconductors are evaluated. For the 10% case, the currents iAB , iBC , and iCA track the corresponding
semiconductors are evaluated. For the 10% case, the currents 𝑖 , 𝑖 , and 𝑖 track the
references (with an error near to zero) and are in phase with the voltages vAB , vBC , and vCA , respectively
corresponding references (with an error near to zero) and are in phase with the voltages 𝑣 , 𝑣 ,
Energies 2019, 12,
(see Figure x FOR
15). As PEER REVIEW
a consequence, the indirectly regulated voltage behaves as shown in Figure 13 of 16,
18
and 𝑣2019,
Energies , respectively
12, x FOR PEER(see Figure 15). As a consequence, the indirectly regulated voltage behaves
REVIEW as
13 of 18
where the highest voltage error is 1.4% when the converter delivers 150 kW.
shown in Figure 16, where the highest voltage error is 1.4% when the converter delivers 150 kW.
(A) (A)

(V) (V)
Current

Voltage
Current

Voltage

Figure 15. Currents (𝑖 , 𝑖 , 𝑖 ) and voltages (𝑣 , 𝑣 , 𝑣 ) for 10% of tolerance in passive devices
Figure 15.Currents
Figure
and an15. , ,𝑖 iBC,resistances.
Currents(𝑖(iAB
increase of parasitic
,𝑖iCA) )and voltages(𝑣(vAB, ,𝑣vBC, , 𝑣vCA))for
andvoltages for10%
10%of
oftolerance
toleranceininpassive
passivedevices
devices
and an increase of parasitic resistances.
and an increase of parasitic resistances.

Figure 16. Output voltage V with 10% of tolerance value in passive devices and an increase of
Figure 16. Output voltage 𝑉 DC with 10% of tolerance value in passive devices and an increase of
resistance
Figure in passive
16. Output and
voltageactive devices.
𝑉 with 10% of tolerance value in passive devices and an increase of
resistance in passive and active devices.
resistance in passive and active devices.
Similarly, the control performance for the −10% tolerance in passive devices is shown next.
Similarly, the control performance for the −10% tolerance in passive devices is shown next. The
The Similarly,
current tracking problem
theproblem
control is solved as
performance forwell,
the as cantolerance
be seen ininFigure 17, devices
where the currentsnext.
track the
current tracking is solved as well, as −10%
can be seen in Figure passive
17, where is currents
the shown trackThe
the
references
current with an
tracking error near
problem is to zero.
solved as In thisas
well, case,
can the
be indirectly
seen in controlled
Figure 17, voltage
where the has an error
currents of 1.2%
track the
references with an error near to zero. In this case, the indirectly controlled voltage has an error of
references withkW
1.2% for 150 an (Figure
error near18),towhich
zero. In
is this case,less
slightly the indirectly controlled
than the +10% voltage
tolerance. has an error
However, of
in both
1.2% for 150 kW
circumstances, the(Figure
voltage18), whichthe
is within is defined
slightlytolerance
less thanofthe
3%.+10% tolerance. However, in both
circumstances, the voltage is within the defined tolerance of 3%.
 Figure 16. Output voltage 𝑉 with 10% of tolerance value in passive devices and an increase of
resistance in passive and active devices.

Similarly,
Energies the control performance for the −10% tolerance in passive devices is shown next.13The
2019, 12, 4093 of 17
current tracking problem is solved as well, as can be seen in Figure 17, where the currents track the
references with an error near to zero. In this case, the indirectly controlled voltage has an error of
for 150
1.2% forkW 150(Figure 18), which
kW (Figure 18),iswhich
slightlyisless
slightly less+10%
than the thantolerance.
the +10%However, in However,
tolerance. both circumstances,
in both
the voltage is within the defined tolerance of 3%.
circumstances, the voltage is within the defined tolerance of 3%.

Current (A)

Voltage (V)
Figure 17. Currents (iAB , iBC , iCA ) and voltages (vAB , vBC , vCA ) for −10% of tolerance in passive devices
Figure
Energies
Energies 2019,17.
2019, 12, xxCurrents
12, FOR
FOR PEER
PEER , 𝑖 , 𝑖 ) and voltages (𝑣 , 𝑣 , 𝑣 ) for −10% of tolerance in passive
(𝑖REVIEW
REVIEW 14
14 of
of 18
18
and an increase in parasitic resistances.
devices and an increase in parasitic resistances.

Figure 18. Output voltage VDC with −10% of tolerance value in passive devices and an increase of
Figure
Figure 18.
18. Output voltage 𝑉𝑉 with
Output voltage with −10%
−10% of
of tolerance
tolerance value
value in
in passive
passive devices
devices and
and an
an increase
increase of
of
resistance in passive and active devices.
resistance
resistance in
in passive
passive and
and active
active devices.
devices.
For the duty class shown in previous figures, the control signal uAB is shown in Figure 19. It can
For
For the
the duty
duty class
class shown
shown inin previous
previous figures,
figures, the
the control signal 𝑢𝑢 is
control signal is shown
shown in
in Figure
Figure 19.
19. It
It can
can
be seen the saturated control is not presented in steady-state even in the 150 kW case, which shows the
be
be seen
seen the
the saturated
saturated control
control is
is not
not presented
presented in
in steady-state
steady-state even
even in
in the
the 150
150 kW
kW case,
case, which
which shows
shows
suitability of the proposed control scheme in achieving the requirements.
the
the suitability
suitability of
of the
the proposed
proposed control
control scheme
scheme in
in achieving
achieving the
the requirements.
requirements.
AB
u AB

Figure 19. Control signal uAB and a portion of the generated PWM.
Figure
Figure 19.
19. Control signal 𝑢𝑢 and
Control signal and aa portion
portion of
of the
the generated
generated PWM.
PWM.
7. Discussion: Proposed Alternative Control Scheme vs. Traditional Control Scheme
7.
7. Discussion:
Discussion: Proposed
Proposed Alternative
Alternative Control
Control Scheme
Scheme vs. vs. Traditional
Traditional Control
Control Scheme
Scheme
To evaluate the effectiveness of the proposed alternative control scheme, load step changes, input
To
voltage evaluate
evaluate the
To variations, the
and effectiveness
effectiveness of
of the
the proposed
parametric uncertainties proposed alternative
the control
alternative
considering control scheme,
specified scheme, load
load
duty class step changes,
stepaddressed.
were changes,
input
input voltage
Besides,voltage variations,
variations,
the three and
and parametric
main objectives parametric uncertainties
uncertainties
dc bus voltage considering
considering
regulation, THD current the
the specified
specified duty class
duty and
requirement, were
classpower
were
addressed.
factor wereBesides,
addressed. Besides, the
the three
accomplished. three main
main objectives
objectives
Remarkably, the dc dc bus
dcbus voltage
busvoltage regulation,
voltageregulation THD
THD current
regulation,objective current requirement,
requirement,
is within the ±3%
and
and power
power factor
requirement factor were
despitewere accomplished.
accomplished.
having Remarkably,
Remarkably,
only indirect current-loop the
the dc
dc bus voltage
busThe
control. voltage regulation
regulation
proposed controlobjective
objective
techniqueis
is within
within
shows
the ±3%
the ±3%
similar requirement
requirement
performance despite
despite
to the having only
only indirect
havingcontrol
traditional indirect current-loop
scheme. current-loop control.
control. The
The proposed
proposed control
control
technique
technique shows
Concerning similar
shows the THDperformance
similar performance
and the power to
to the
the traditional
traditional
factor control
controlthe
requirements, scheme.
scheme.
findings confirm the usefulness of
Concerning
Concerning
the tracking the
control THD
thelaw.
THDThe and the
the power
andresults showfactor
power factor
the THDrequirements,
and powerthe
requirements, the findings
levelsconfirm
findings
factor confirm the
the usefulness
are always usefulness of
of
satisfactorily
the
the tracking
tracking control
control law.
law. The
The results
results show
show thethe THD
THD and and power
power factor
factor levels
levels are
are always
always satisfactorily
satisfactorily
accomplished;
accomplished; however,
however, itit isis fundamental
fundamental to to notice
notice that
that these
these requirements
requirements are are not
not only
only fulfilled
fulfilled with
with
the
the control
control law
law but
but also
also with
with aa correct
correct LCL
LCL filter
filter design
design (which
(which is is not
not the
the purpose
purpose ofof this
this paper).
paper).
In
In our
our view,
view, the
the simulation
simulation results
results emphasize
emphasize the the validation
validation of of the
the proposed
proposed controller
controller whose
whose
signal evolves in the −1 to 1 interval, which reveals the feasibility of considering
signal evolves in the −1 to 1 interval, which reveals the feasibility of considering the proposed control the proposed control
Energies 2019, 12, 4093 14 of 17

accomplished; however, it is fundamental to notice that these requirements are not only fulfilled with
the control law but also with a correct LCL filter design (which is not the purpose of this paper).
In our view, the simulation results emphasize the validation of the proposed controller whose
signal evolves in the −1 to 1 interval, which reveals the feasibility of considering the proposed control
scheme for a PWM rectifier used into a BESS application.
Additionally, in Table 3, a contrast of the main control characteristics for the proposed control
scheme and the reviewed control techniques are summarized. The evaluated items reveal that the Park
transformation is avoided in three control approaches including the proposed approach. Nonetheless,
the direct power control requires a computing power stage instead. Besides, all the controllers required
the internal current control loop, since the system is minimum phase when the current is the output.
In contrast to the voltage loop that is included in the reported approaches, it is substituted by the online
power balance in the proposed scheme. Also, the delays due to the Park transformations and its inverse
are avoided. However, the nonlinear controller requires three derivatives, which adds complexity.

Table 3. The contrast of the proposed control scheme and other reported approaches [6,16,20,23,38–43].

Proposed
Voltage Hysteresis
Items/Control Traditional Direct Power Schemewith
Oriented Current
Scheme Approach Control Input-Output
Control Control
Map Linearization
Required/Not
Park required
Required Required Not required Not required
transformation (computing
power stage)
Internal current
Required (two Required (two Hysteresis
control loop Required Required
power loops) power loops) command
(CCL)
Outer voltage Not required
control loop Required Required Required Required (power balance is
(VCL) used instead)
√ √ √ √ √
Robustness
Analysis
Medium Medium Medium Medium High
complexity
PI (CCL) + PI
(VCL) or PI
Control law PI PI + PI PI Nonlinear control
(CCL) + PI
(VCL)
Derivatives None None None None 3

8. Conclusions
In this paper, we have proposed the use of a single current loop to solve the input current tracking
problem and a current reference generator based on the ac–dc power balance to indirectly regulate the
dc bus voltage of a three-phase LCL PWM rectifier, avoiding the abc–dq–abc transformations.
Unlike most reported papers where a single-phase L-filter or an LCL-filter wye-connected model
is used for control purposes, this work has considered a line-to-line LCL-filter model, since the rectifier
is always delta-connected. Due to the fact of considering the delta-connected LCL filter for control
purposes, the first three reference derivatives must be included, and this means that the control must
be parametrized. It is convenient to mention that the gain tuning process is carried out by using the
line-to-line model and then the same gains are used for the other phases. Doing this, the process
implies the tuning of three gains instead of twenty-seven gains.
Taking into consideration a BESS application, simulations were performed using a typical current
demanded by a dc–dc converter charging a battery bank as the load. Owing to the integral action,
the system was provided with robustness and evaluations with load step changes, input voltage
Energies 2019, 12, 4093 15 of 17

variations, and parametric uncertainties considering the specified duty class has been addressed.
Simulation results have shown robustness against simultaneous variations in series parasitic resistance,
passive storage devices, and input voltage disturbances of ±100%, ±20%, and ±10%, respectively.
Under these stress conditions, the control signals remained within the –1 to 1 interval without saturation.
In addition, the system still operated with a power factor of 0.99% and THD around 1% in a steady state.
This research might evolve to tackle unbalanced voltage conditions, or even fault conditions by
taking advantage of the decoupled controllers designed for each phase of the system, which could be
feasible to implement in a droop control scheme.

Author Contributions: Conceptualization, D.M. and C.N.; Formal analysis, D.M. and N.V.; Investigation, D.M.;
Methodology, D.M., N.V., C.N., and J.S.; Project administration, C.N.; Supervision, C.N.; Visualization, D.M. and
E.C.; Writing—original draft, D.M.; Writing—review and editing, N.V., C.N., J.S. and E.C.
Funding: This research was founded by Schweitzer Engineering Laboratories (SEL) and Consejo Nacional de
Ciencia y Tecnología (207164).
Acknowledgments: The authors acknowledge the technical and financial support of Schweitzer Engineering
Laboratories (SEL) for the development of this work.
Conflicts of Interest: The authors declare no conflict of interest. The funders had no role in the design of the
study; in the collection, analyses, or interpretation of data; in the writing of the manuscript; or in the decision to
publish the results.

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