Download as pdf or txt
Download as pdf or txt
You are on page 1of 69

ĐH Bách Khoa TP.

HCM Lê Chí Thông

The 8051 Microcontroller


Chapter 3
Instruction Set
How to write a program
Lê Chí Thông
chithong@hcmut.edu.vn
sites.google.com/site/chithong
Ho Chi Minh City University of Technology
Lê Chí Thông 1

Instruction Set

• 255 instructions
1-byte instructions: 139
2-byte instructions: 92
3-byte instructions: 24
• Instruction set summary (pdf)
• Full instruction set (pdf)

Lê Chí Thông 2

sites.google.com/site/chithong 1
ĐH Bách Khoa TP.HCM Lê Chí Thông

The First Program


First_program.asm First_program.lst
ORG 0000H LOC OBJ LINE SOURCE
MOV P1,#0FH 0000 1 ORG 0000H
SETB P1.7 0000 75900F 2 MOV P1,#0FH
CLR P1.0 0003 D297 3 SETB P1.7
END 0005 C290 4 CLR P1.0
5 END
First_program.hex 0000H 75H Code
Checksum =
Byte count 2’s complement 0001H 90H Memory
Load address of all data
0002H 0FH
Opcode
Type 0003H D2H
0004H 97H
:0700000075900FD297C2902A
0005H C2H
:00000001FF Lê Chí Thông 3
end of record type 0006H 90H

Registers and Data Transfer Instructions


• Register
o Register A = accumulator
o Register B
o Register R0 – R7
• Data Transfer Instruction
o MOV destination, source
Ex:
A R0
MOV A,R0

R1 B
MOV R1,B
MOV R1,R3 Lê Chí Thông 4

sites.google.com/site/chithong 2
ĐH Bách Khoa TP.HCM Lê Chí Thông

Internal RAM
• 128 locations from address 00H to 7FH (256 locations for 8052)
• The content of one location is 8 bit.
• Register banks: address 00H to 1FH
• Bit Addressable RAM: address 20H to 2FH
• General purpose RAM: address from 30H to 7FH

Lê Chí Thông 5

General
purpose
RAM
(30H-7FH)
Special
function
Bit-
registers
addressable
(SFRs)
RAM
(80H-FFH)
(20H-2FH)

Register
banks
(00H-1FH)

Lê Chí Thông 6

sites.google.com/site/chithong 3
ĐH Bách Khoa TP.HCM Lê Chí Thông

General Purpose RAM


• Address from 30H to 7FH
• The content of one location is 8 bit.
Ex: MOV A,30H
This instruction moves (reads) the content of location 30H
(NOT data 30H) to register A.

A 30H

Ex: MOV 31H,R4


This instruction moves (writes) the content of register R4
to location 31H.
31H R4

Lê Chí Thông 7

General
purpose
RAM
(30H-7FH)
Special
function
Bit-
registers
addressable
(SFRs)
RAM
(80H-FFH)
(20H-2FH)

Register
banks
(00H-1FH)

Lê Chí Thông 8

sites.google.com/site/chithong 4
ĐH Bách Khoa TP.HCM Lê Chí Thông

Bit Addressable RAM


• Address from 20H to 2FH
• The content of one location is 8 bit.
• Can read/write a byte or a bit
Ex: MOV 20H, A ; writes the content of register A to location 20H.

20H A

Ex: SETB 20H.0 20H 1


or SETB 00H
Not affected

Ex: MOV C,31H


CY 26H
or MOV C, 26H.1
Lê Chí Thông 9

General
purpose
RAM
(30H-7FH)
Special
function
Bit-
registers
addressable
(SFRs)
RAM
(80H-FFH)
(20H-2FH)

Register
banks
(00H-1FH)

Lê Chí Thông 10

sites.google.com/site/chithong 5
ĐH Bách Khoa TP.HCM Lê Chí Thông

Register Banks
• 4 banks: Bank 0 (default), Bank 1, Bank 2, and Bank 3
• Change register bank by selecting bits RS1 and RS0 (in register PSW)
• One bank includes 8 registers: R0 through R7
o R0 of Bank 0 is location 00H
o …
o R7 of Bank 0 is location 07H
o R0 of Bank 1 is location 08H
o …
o R7 of Bank 1 is location 0FH
o R0 of Bank 2 is location 10H
o …
o R7 of Bank 2 is location 17H
o R0 of Bank 3 is location 18H
o …
o R7 of Bank 3 is location 1FH Lê Chí Thông 11

Register Banks – Your Turn!


o R1 of Bank 0 is location ………
o R5 of Bank 0 is location ………
o R5 of Bank 1 is location ………
o R1 of Bank 2 is location ………
o R2 of Bank 3 is location ………
o R6 of Bank 3 is location ………

Lê Chí Thông 12

sites.google.com/site/chithong 6
ĐH Bách Khoa TP.HCM Lê Chí Thông

Register Banks
Ex: use default bank (Bank 0)

R5 ≡ 05H

MOV A, R5 = MOV A, 05H


Read the contents of register R5 Read the contents of location 05H
into the accumulator into the accumulator

MOV R0, A = MOV 00H, A


Read the contents of register A Read the contents of register A
into register R0 into location 00H

Lê Chí Thông 13

Register PSW (Program Status Word)

Lê Chí Thông 14

sites.google.com/site/chithong 7
ĐH Bách Khoa TP.HCM Lê Chí Thông

Selecting Register Bank


The active bank is selected by bit RS1 (PSW.4) & RS0 (PSW.3)
RS1 RS0 Bank
0 0 0
0 1 1
1 0 2
1 1 3

Ex: MOV PSW, #00010000B ; select bank 2


or SETB RS1
CLR RS0
Try it: Select bank 1
……………………..
…………………….. Lê Chí Thông 15

General
purpose
RAM
(30H-7FH)
Special
function
Bit-
registers
addressable
(SFRs)
RAM
(80H-FFH)
(20H-2FH)

Register
banks
(00H-1FH)

Lê Chí Thông 16

sites.google.com/site/chithong 8
ĐH Bách Khoa TP.HCM Lê Chí Thông

Special Function Registers (SFRs)


• SFRs include register A, B, PSW, P0, P1, P2, P3, DPTR,
TMOD, SCON …
• All SFRs are accessible by name and direct address.
• Both of them must be coded as direct address
Ex: MOV P1, A ; Output register A to Port 1
MOV 90H, A ; same
 Same opcode: F5 90
Ex: MOV R1, ACC
MOV R1, 0E0H
 Same opcode: A9 E0
Ex: MOV R1, ACC
MOV R1, A
 Same function BUT different opcodes (A9 E0 vs. F9)
Try it: Input Port 2 to register ALê ……………………………
Chí Thông 17

Addressing Modes
• Immediate Addressing

• Register Addressing

• Direct Addressing

• Indirect Addressing

• Relative Addressing

• Absolute Addressing

• Long Addressing

• Indexed Addressing

Lê Chí Thông 18

sites.google.com/site/chithong 9
ĐH Bách Khoa TP.HCM Lê Chí Thông

Coding format- Addressing modes

Lê Chí Thông 19

Immediate Addressing
- Source operand is constant
- Use # sign
(Source)
MOV A,#12 A 0 0 0 0 1 1 0 0

MOV A,#0C4H A 1 1 0 0 0 1 0 0

MOV R1,#1110B R1 0 0 0 0 1 1 1 0

ADD A,#11110001B CY 1 A 1 0 1 1 0 1 0 1

MOV DPTR,#2000H
DPH 0 0 1 0 0 0 0 0 DPL 0 0 0 0 0 0 0 0

Lê Chí Thông 20

sites.google.com/site/chithong 10
ĐH Bách Khoa TP.HCM Lê Chí Thông

Register Addressing
Ex: MOV R1,#36H R1 0 0 1 1 0 1 1 0

MOV A,R1 A 0 0 1 1 0 1 1 0

MOV R7,#0FH R7 0 0 0 0 1 1 1 1

ANL A,R7 A 0 0 0 0 0 1 1 0

INC A A 0 0 0 0 0 1 1 1

DEC A A 0 0 0 0 0 1 1 0

MOV DPTR,#2000

INC DPTR (source)


DPH 0 0 1 0 0 0 0 0 DPL 0 0 0 0 0 0 0 1
Lê Chí Thông 21

Direct Addressing
• Access internal RAM and SFRs
MOV A,70H ; copy contents of RAM at 70H to A

MOV R0,40H ; copy contents of RAM at 40H to A

MOV 56H,A ; put contents of A into RAM at 56H

MOV 0D0H,A ; put contents of A into PSW

MOV PSW,A ; same

Lê Chí Thông 22

sites.google.com/site/chithong 11
ĐH Bách Khoa TP.HCM Lê Chí Thông

Direct Addressing vs. Immediate Addressing

MOV A,30H ≠ MOV A,#30H

A 30H A 0 0 1 1 0 0 0 0

Direct addressing Immediate addressing

Lê Chí Thông 23

Play with R0-R7 (bank 0) by Direct Addressing


MOV A,4 ≡ MOV A,R4
MOV A,7 ≡ MOV A,R7
MOV 7,6 ≡ MOV R7,R6
MOV R2,#05 ; Put 5 in R2
MOV R2,5 ; Put content of RAM at address 5 in R2

MOV R2,5 ≠ MOV R2,#5

R2 05H R2 0 0 0 0 0 1 0 1

Lê Chí Thông 24

sites.google.com/site/chithong 12
ĐH Bách Khoa TP.HCM Lê Chí Thông

Addressing Modes
• Immediate Addressing

• Register Addressing

• Direct Addressing

• Indirect Addressing

• Relative Addressing

• Absolute Addressing

• Long Addressing

• Indexed Addressing

Lê Chí Thông 25

Indirect Addressing
• The address of the source or destination is specified in registers.
• Use registers R0 or R1 for 8-bit address (internal or external
RAM)
• Use @ sign to access the content of the memory location: @R0,
@R1
Ex: MOV R0,#30H ;R0  30H
MOV A,@R0 ;A(R0): read content of internal RAM at
; address specified by R0 to A
Internal RAM
R0 0 0 1 1 0 0 0 0
7FH

A 30H

Lê Chí Thông 00H 26

sites.google.com/site/chithong 13
ĐH Bách Khoa TP.HCM Lê Chí Thông

Ex: Write Data to Internal RAM (1)


Ex: Write a program to move (write) the content of A to location
32H in internal RAM using 2 methods of addressing: direct
addressing and indirect addressing.
Method 1: Direct addressing
ORG 0000H
MOV 32H,A
END
Method 2: Indirect addressing
ORG 0000H
MOV R0,#32H
MOV @R0,A
END

Lê Chí Thông 27

Ex: Write Data to Internal RAM (2)


Write a program to move (write) 40H to location 30H in internal
RAM using 2 methods of addressing: direct addressing and indirect
addressing.
Method 1: Direct addressing
ORG 0000H
MOV 30H,#40H
END
Method 2: Indirect addressing
ORG 0000H
MOV R0,#30H
MOV @R0,#40H
END

Lê Chí Thông 28

sites.google.com/site/chithong 14
ĐH Bách Khoa TP.HCM Lê Chí Thông

Ex: Clear Internal RAM


Ex: Write a program to clear location 31H in internal RAM using 2
methods of addressing: direct addressing and indirect addressing.
Hint: to clear means to reset the data to zero.
Method 1: Direct addressing
ORG 0000H
MOV 31H,#0
END
Method 2: Indirect addressing
ORG 0000H
MOV R0,#31H
MOV @R0,#0
END

Lê Chí Thông 29

Ex: Read Data from Internal RAM


Ex: Write a program to move (read) the content of location 33H in
internal RAM to register A using 2 methods of addressing: direct
addressing and indirect addressing.
Method 1: Direct addressing
ORG 0000H
MOV A,33H
END
Method 2: Indirect addressing
ORG 0000H
MOV R0,#33H
MOV A,@R0
END

Lê Chí Thông 30

sites.google.com/site/chithong 15
ĐH Bách Khoa TP.HCM Lê Chí Thông

Ex: Data Transfer (Read/Write)


Ex: Write a program to move (transfer) the content of internal RAM
from address 34H to address 35H, using 2 methods of addressing:
direct addressing and indirect addressing.
Method 1: Direct addressing
ORG 0000H
MOV 35H,34H
END
Method 2: Indirect addressing
ORG 0000H
MOV R0,#34H
MOV A,@R0
INC R0
MOV @R0,A
END

Lê Chí Thông 31

Indirect Addressing – External 8-bit address RAM

Ex: MOV R0,#30H ;R0  30H


MOVX A,@R0 ;A(R0): read content of eXternal RAM at
; address specified by R0 to A

External RAM
R0 0 0 1 1 0 0 0 0

A 30H

Lê Chí Thông 00H 32

sites.google.com/site/chithong 16
ĐH Bách Khoa TP.HCM Lê Chí Thông

Indirect Addressing – External 16-bit address RAM


• Uses DPTR register for 16-bit addresses (external memory)
• Use @ sign to access the content of the memory location:@DPTR

Ex: MOV DPTR,#4000H ; DPTR  Address


MOVX A,@DPTR ; read content of external RAM at
; address 4000H to A

External RAM
DPTR 40H 00H

A 4000H

Lê Chí Thông 00H 33

Indirect Addressing – External 16-bit address RAM

Ex: MOV DPTR,#31FFH ; DPTR  Address


MOVX @DPTR,A ; write content of A to external RAM
; at address 31FFH

External RAM
DPTR 31H FFH

A 31FFH

Lê Chí Thông 00H 34

sites.google.com/site/chithong 17
ĐH Bách Khoa TP.HCM Lê Chí Thông

Write Data to External RAM (1)


Ex: Write a program to move the content of register A to location
0033H in external RAM.
ORG 0000H
MOV DPTR,#0033H
MOVX @DPTTR,A
END

Lê Chí Thông 35

Write Data to External RAM (2)


Ex: Write a program to write 40H to location 0030H in external
RAM.
ORG 0000H
MOV A,#40H
MOV DPTR,#0030H
MOVX @DPTR,A
END

Lê Chí Thông 36

sites.google.com/site/chithong 18
ĐH Bách Khoa TP.HCM Lê Chí Thông

Clear External RAM


Ex: Write a program to clear location 0031H in external RAM.
ORG 0000H
CLR A
MOV DPTR,#0031H
MOVX @DPTTR,A
END

Lê Chí Thông 37

Read Data from External RAM


Ex: Write a program to read data from external RAM at address
0032 to register A.
ORG 0000H
MOV DPTR,#0032H
MOVX A,@DPTTR
END

Lê Chí Thông 38

sites.google.com/site/chithong 19
ĐH Bách Khoa TP.HCM Lê Chí Thông

Read/Write External RAM


Ex: Write a program to move the content of location 0034H in
external RAM to location 0035H in external RAM.
ORG 0000H
MOV DPTR,#0034H
MOVX A,@DPTTR
INC DPTR
MOVX @DPTR,A
END

Lê Chí Thông 39

Your Turn!
Write a program to move data from internal RAM at address 56H
to external RAM at address 4123H.

Lê Chí Thông 40

sites.google.com/site/chithong 20
ĐH Bách Khoa TP.HCM Lê Chí Thông

Register Addressing vs. Indirect Addressing

MOV A,R1 ≠ MOV A,@R1

A R1

Register addressing
Internal RAM
R1
7FH

00H
Indirect addressing

Lê Chí Thông 41

Example of Indirect Addressing


Ex: (Implementation of array) R0  60H
Clear internal RAM from address
60H to 7FH
(R0)  0
MOV R0, #60H
LOOP: MOV @R0, #0 R0  R0+1
INC R0
CJNE R0, #80H, LOOP N
R0= 80h?

Lê Chí Thông 42

sites.google.com/site/chithong 21
ĐH Bách Khoa TP.HCM Lê Chí Thông

Your Turn!
Write a program to output (send) the content of internal RAM,
from address 20H to 45H, to Port 1

Lê Chí Thông 43

Addressing Modes
• Immediate Addressing

• Register Addressing

• Direct Addressing

• Indirect Addressing

• Relative Addressing

• Absolute Addressing

• Long Addressing

• Indexed Addressing

Lê Chí Thông 44

sites.google.com/site/chithong 22
ĐH Bách Khoa TP.HCM Lê Chí Thông

Relative Addressing
• Used in SJMP instruction
• A relative address (or offset) is an 8-bit signed value.
• It is added to PC to form a new value for PC.
• Range: -128 ~ +127
• Usually used with label ☺

Ex: SJMP LABEL1 is in memory


at locations 0100H and 0101H
 PC = 0102H
If LABEL1 is the label representing
an instruction at location 0107H
 Relative offset is
0107H – 0102H = 5
 Opcode of SJMP LABEL1 is 80 05
Lê Chí Thông 45

Relative Addressing
Ex: SJMP LABEL2 is in memory
at locations 2040H and 2041H
 PC = 2042H
If LABEL2 is the label representing
an instruction at location 2038H
 Relative offset is
2038H – 2042H = -10 = F6H
 Opcode of SJMP LABEL1 is 80 F6

Lê Chí Thông 46

sites.google.com/site/chithong 23
ĐH Bách Khoa TP.HCM Lê Chí Thông

Your Turn!
Ex: ORG 0000H
AGAIN: SETB P1.0
NOP
NOP
CLR P1.0
NOP
SJMP AGAIN
END
a. Find the opcode of SJMP AGAIN instruction?
b. Find the duration of P1.0=1? P1.0=0?
c. What is the result of this program?

Lê Chí Thông 47

Absolute Addressing
• Used in AJMP, ACALL instruction
• Usually used with label ☺
Within any 2K page, the upper five address
bits are the same for the source and
destination addresses.
The lower 11 bits of the destination are
supplied in the instruction

Memory map showing 2K pages

Lê Chí Thông 48

sites.google.com/site/chithong 24
ĐH Bách Khoa TP.HCM Lê Chí Thông

Long Addressing
• Used in LCALL and LJMP instruction
• Use full 16-bit address
• Usually used with label ☺
Ex: LCALL SUBPROGRAM1
LJMP LABEL2

Lê Chí Thông 49

Indexed Addressing
• Base address (PC or DPTR) + Offset (A)  Effective Address
• Used with JMP or MOVC
Ex: MOVC A, @A+DPTR
MOVC A, @A+PC
JMP @A+DPTR

Lê Chí Thông 50

sites.google.com/site/chithong 25
ĐH Bách Khoa TP.HCM Lê Chí Thông

Indexed Addressing
Ex: An even number from 0 to 6 is in the Accumulator. The following
sequence of instructions branches to one of four AJMP
instructions in a jump table starting at JMP_TBL.
MOV DPTR, # JMP_TBL
JMP @A + DPTR
JMP_TBL: AJMP LABEL0
AJMP LABEL1
AJMP LABEL2
AJMP LABEL3
• If the Accumulator equals 04H when starting this sequence,
execution jumps to label LABEL2. Because AJMP is a 2-byte
instruction, the jump instructions start at every other address.

Lê Chí Thông 51

Instruction Types
• Data transfer

• Arithmetic

• Logical

• Boolean variable

• Program branching

Lê Chí Thông 52

sites.google.com/site/chithong 26
ĐH Bách Khoa TP.HCM Lê Chí Thông

8051 Instruction Set Summary


Legend

Lê Chí Thông 53

8051 Instruction Set Summary


Data Transfer

Lê Chí Thông 54

sites.google.com/site/chithong 27
ĐH Bách Khoa TP.HCM Lê Chí Thông

8051 Instruction Set Summary


Data Transfer

Lê Chí Thông 55

Data Transfer
MOV dest, source ; dest  source
MOV A,#72H ;A=72H
MOV R4,#62H ;R4=62H
MOV B,0F9H ;B=the content of address F9H of RAM
MOV DPTR,#7634H
MOV DPL,#34H
MOV DPH,#76H
MOV P1,A ;move (out) A to Port 1
Note 1:
MOV A,#72H ≠ MOV A,72H
Note 2:
MOV A,R3 ≡ MOV A,3 ;R3 of bank 0 is location 3

Lê Chí Thông 56

sites.google.com/site/chithong 28
ĐH Bách Khoa TP.HCM Lê Chí Thông

Creating a Loop (1)


Ex: Write a program to write 40H to internal RAM from location
30H to location 36H.

ORG 0000H
MOV 30H,#40H
MOV 31H,#40H
MOV 32H,#40H
MOV 33H,#40H
MOV 34H,#40H
MOV 35H,#40H
MOV 36H,#40H
END

Lê Chí Thông 57

Creating a Loop (2)


Ex: Write a program to write 40H to internal RAM Loop  7
from location 30H to location 36H.
(source) Addr  30H
ORG 0000H
MOV R5,#7 ;Loop=7
MOV R1,#30H;Address=30H (Addr)  40H
Again: MOV @R1,#40H
INC R1 AddrAddr+1
DEC R5
CJNE R5,#0,Again LoopLoop-1
END
N
Loop=0?

Lê Chí Thông Y 58

sites.google.com/site/chithong 29
ĐH Bách Khoa TP.HCM Lê Chí Thông

Creating a Loop (3)


Ex: Write a program to write 40H to internal RAM Loop  7
from location 30H to location 36H.
(source) Addr  30H
ORG 0000H
MOV R5,#7;Loop=7
MOV R1,#30H;Address=30H (Addr)  40H
Again: MOV @R1,#40H
INC R1 AddrAddr+1
DJNZ R5,Again
END LoopLoop-1

N
Loop=0?

Lê Chí Thông Y 59

Creating a Loop (4)


Ex: Write a program to write 40H to internal RAM
from location 30H to location 36H.
(source)
ORG 0000H Addr  30H
MOV R1,#30H;Address=30H
Again: MOV @R1,#40H
INC R1 (Addr)  40H
CJNE R1,#37H,Again
END AddrAddr+1

N
Addr=37H?

Y
Lê Chí Thông 60

sites.google.com/site/chithong 30
ĐH Bách Khoa TP.HCM Lê Chí Thông

Your Turn! 
Write a program to read data from internal RAM from
location 20H to location 29H and output to Port 1

Lê Chí Thông 61

Solutions (1)
Write a program to read data from internal RAM from location 20H
to location 29H and output to Port 1
Method 1: using DJNZ
ORG 0000H
MOV R7,#10
MOV R0,#20H
Loop:MOV P1,@R0 ;Output to Port1
INC R0
DJNZ R7,loop
END

Lê Chí Thông 62

sites.google.com/site/chithong 31
ĐH Bách Khoa TP.HCM Lê Chí Thông

Solutions (2)
Write a program to read data from internal RAM from location 20H
to location 29H and output to Port 1
Method 2: using CJNE
ORG 0000H
MOV R0,#20H
Loop:MOV P1,@R0 ;Output to Port1
INC R0
CJNE R0,#2AH,loop
END

Lê Chí Thông 63

Look-up Table
MOV A,#ENTRY_NUMBER
MOV DPTR,#TABLE
MOVC A,@A+DPTR
TABLE: DB data1, data2, data3, …

Lê Chí Thông 64

sites.google.com/site/chithong 32
ĐH Bách Khoa TP.HCM Lê Chí Thông

Look-up Table - Example


Given a packed-BCD number in location 33H of internal RAM. Write
a program that calculate the square of high decade of this number,
and store the result in internal RAM at address 34H
ORG 0
MOV A,33H
SWAP A
ANL A,#0FH
MOV DPTR,#TABLE
MOVC A,@A+DPTR
TABLE:
DB 0,1,4,9,16,25,36,49,64,81
END

Lê Chí Thông 65

Your Turn!
Given a packed-BCD number in location 34H of internal RAM. Write
a program that displays the low decade of this number on the
common-anode 7-seg LED connected to Port 2 (schematic).

Lê Chí Thông 66

sites.google.com/site/chithong 33
ĐH Bách Khoa TP.HCM Lê Chí Thông

Create the Table


D7 D6 D5 D4 D3 D2 D1 D0
g f e d c b a
0 0 1 0 0 0 0 0 0 40H
1 0 1 1 1 1 0 0 1 79H
2 0 0 1 0 0 1 0 0 24H
3 0 0 1 1 0 0 0 0 30H
4 0 0 0 1 1 0 0 1 19H
5 0 0 0 1 0 0 1 0 12H
6 0 0 0 0 0 0 1 0 02H
7 0 1 1 1 1 0 0 0 78H
8 0 0 0 0 0 0 0 0 00H
9 0 0 0 1 0 0 0 0 10H

TABLE: DB 40h,79h,24h,30h,19h, 12h,02h,78h,00h,10h

Lê Chí Thông 67

Solutions
ORG 0000H
MOV 34H,#25H
MOV A,34H
ANL A,#0FH
MOV DPTR,#TABLE
MOVC A,@A+DPTR
MOV P2,A
SJMP DONE
TABLE: DB 40h,79h,24h,30h,19h
DB 12h,02h,78h,00h,10h
DONE: NOP
END
(source)

Lê Chí Thông 68

sites.google.com/site/chithong 34
ĐH Bách Khoa TP.HCM Lê Chí Thông

Look-up Table
MOV A, #ENTRY_NUMBER
CALL LOOK_UP

LOOK_UP:
INC A
MOVC A, @A+PC
RET
TABLE:
DB data1, data2, data3, …

Lê Chí Thông 69

Jump Table
MOV DPTR,#JUMP_TABLE
MOV A,INDEX_NUMBER
RL A
JMP @A+DPTR

JUMP_TABLE: AJMP CASE0
AJMP CASE1
AJMP CASE2

Lê Chí Thông 70

sites.google.com/site/chithong 35
ĐH Bách Khoa TP.HCM Lê Chí Thông

8051 Instruction Set Summary


Arithmetic Operations

Lê Chí Thông 71

8051 Instruction Set Summary


Arithmetic Operations

Lê Chí Thông 72

sites.google.com/site/chithong 36
ĐH Bách Khoa TP.HCM Lê Chí Thông

8051 Instruction Set Summary


Arithmetic Operations

Lê Chí Thông 73

8051 Instruction Set Summary


Flag Effect

Lê Chí Thông 74

sites.google.com/site/chithong 37
ĐH Bách Khoa TP.HCM Lê Chí Thông

Arithmetic Operations (1)


ADD A,#34H ; Immediate addressing A  A + 34H
ADD A,34H ;Direct addressing A  A + (34H)
ADD A,R1 ;Register addressing A  A + R1
ADD A,@R1 ;Indirect addressing A  A + (R1)

Lê Chí Thông 75

Arithmetic Operations (2)


MOV A,#23H ; A = 23H, CY = 0, P = 1, OV = 0
ADD A,#22 ; A = 39H, CY = 0, P = 0, OV = 0
ADD A,#11100111B ; A = 20H, CY = 1, P = 1, OV = 0
ADDC A,#09H ; A = 2AH, CY = 0, P = 1, OV = 0
SUBB A,#00100111B ; A = 03H, CY = 0, P = 0, OV = 0
SUBB A,#3 ; A = 00H, CY = 0, P = 0, OV = 0
SUBB A,#0F2H ; A = 0EH, CY = 1, P = 1, OV = 0

Lê Chí Thông 76

sites.google.com/site/chithong 38
ĐH Bách Khoa TP.HCM Lê Chí Thông

Arithmetic Operations (3)


MOV A,#45 ; A = 2DH, CY = 1, P = 0, OV = 0
MOV B,#12H ; B = 12H
MUL AB ; A = 2AH, B = 03H
MOV B,#10 ; B = 10
DIV AB ; A = 04H, B = 02H
MOV A,#-100 ; A = 9CH, CY = 0, P = 0, OV = 0
ADD A,#-50 ; A = 6AH, CY = 1, P = 0, OV = 1
MOV A,#120 ; A = 78H, CY = 1, P = 0, OV = 1
ADD A,#30 ; A = 44H, CY = 0, P = 0, OV = 1

Lê Chí Thông 77

Your Turn!
Given 10 8-bit unsigned numbers in internal RAM at starting
address 30H. Write a program to calculate the sum of these
numbers and store the result in internal RAM at address 2FH.
Assume that the result is less than or equal 255.

Lê Chí Thông 78

sites.google.com/site/chithong 39
ĐH Bách Khoa TP.HCM Lê Chí Thông

Solutions
Given 10 8-bit unsigned numbers in internal RAM at starting
address 30H. Write a program to calculate the sum of these
numbers and store the result in internal RAM at address 2FH.
Assume that the result is less than or equal 255.
ORG 0
MOV R0,#30H
CLR A
MOV R2,#10
loop: ADD A,@R0
INC R0
DJNZ R2,loop
MOV 2FH,A
END

Lê Chí Thông 79

Rotate
• Rotate instructions operate only on A

RL A
MOV A,#0F0H ; A 11110000
RR A ; A 11100001

RR A
MOV A,#0F0H ; A 11110000
RR A ; A 01111000
Lê Chí Thông 80

sites.google.com/site/chithong 40
ĐH Bách Khoa TP.HCM Lê Chí Thông

Rotate through Carry


C
RRC A

MOV A, #0A9H ; A  A9H


ADD A, #14H ; A  BDH (10111101), C0
RRC A ; A  01011110, C1
C
RLC A

MOV A, #3CH ; A  3CH(00111100)


SETB C ; C  1
RLC A ; A  01111001, C1
Lê Chí Thông 81

Rotate and Multiplication/Division

• Note that a shift left is the same as


multiplying by 2, shift right is divide by 2

MOV A, #3 ; A 00000011 (3)


CLR C ; C 0
RLC A ; A 00000110 (6)
RLC A ; A 00001100 (12)
RRC A ; A 00000110 (6)

Lê Chí Thông 82

sites.google.com/site/chithong 41
ĐH Bách Khoa TP.HCM Lê Chí Thông

Swap

SWAP A

MOV A, #72H ; A  72H


SWAP A ; A = 27H

Lê Chí Thông 83

8051 Instruction Set Summary


Logic Operations

Lê Chí Thông 84

sites.google.com/site/chithong 42
ĐH Bách Khoa TP.HCM Lê Chí Thông

Logic Operations (1)


MOV A,#46H
MOV R3,A
ANL A,#0FH
MOV R7,A
MOV A,R3
ANL A,#0F0H
SWAP A
MOV R6,A
R6 = ………………………….; R7 = …………………………….

Lê Chí Thông 85

Logic Operations (2)


MOV R2,#05H
MOV R3,#07H
MOV A,R2
SWAP A
ORL A,R3
 A = ………………………….

Lê Chí Thông 86

sites.google.com/site/chithong 43
ĐH Bách Khoa TP.HCM Lê Chí Thông

8051 Instruction Set Summary


Boolean Variable

Lê Chí Thông 87

Boolean Variable
ORG 0
LOOP: MOV C,P1.0
ANL C,P1.1
MOV P1.2,C
SJMP LOOP
END

Lê Chí Thông 88

sites.google.com/site/chithong 44
ĐH Bách Khoa TP.HCM Lê Chí Thông

Your Turn!

Lê Chí Thông 89

Solutions

ORG 0
LOOP: MOV C,P1.4
CPL C
ANL C,P1.5
CPL C
ORL C,P1.6
MOV P1.7,C
SJMP LOOP
END
Lê Chí Thông 90

sites.google.com/site/chithong 45
ĐH Bách Khoa TP.HCM Lê Chí Thông

8051 Instruction Set Summary


Program Branching

Lê Chí Thông 91

8051 Instruction Set Summary


Program Branching

Lê Chí Thông 92

sites.google.com/site/chithong 46
ĐH Bách Khoa TP.HCM Lê Chí Thông

Program Branching
LJMP(long jump)
LJMP is an unconditional jump. It is a 3-byte instruction. It allows a
jump to any memory location from 0000 to FFFFH.

AJMP(absolute jump)
In this 2-byte instruction, It allows a jump to any memory location
within the 2k block of program memory.

SJMP(short jump)
In this 2-byte instruction. The relative address range of 00-FFH is
divided into forward and backward jumps, that is , within -128 to
+127 bytes of memory relative to the address of the current PC.

Unconditional SJMP : 8-bit offset


LJMP : 11-bit address (2KB segment)
jumps AJMP : 16-bit
Lê Chí Thông 93

Conditional Jumps
JZ Jump if A=0
JNZ Jump if A ≠ 0
DJNZ Decrement and jump if ≠ 0
CJNE A,byte Jump if A ≠ byte
CJNE reg,#data Jump if byte ≠ #data
JC Jump if CY=1
JNC Jump if CY=0
JB Jump if bit=1
JNB Jump if bit=0
JBC Jump if bit=1 and clear bit
Lê Chí Thông 94

sites.google.com/site/chithong 47
ĐH Bách Khoa TP.HCM Lê Chí Thông

CALL Instruction
LCALL(long call)
This 3-byte instruction can be used to call subroutines
located anywhere within the 64K byte address space of
the 8051.

ACALL (absolute call)


ACALL is 2-byte instruction. the target address of the
subroutine must be within 2K byte range.

Lê Chí Thông 95

Call and Return

• Call is similar to a jump, but


– Call pushes PC on stack before branching

ACALL <address ll> ; stack  PC


; PC  address 11 bit

LCALL <address 16> ; stack  PC


; PC  address 16 bit

Lê Chí Thông 96

sites.google.com/site/chithong 48
ĐH Bách Khoa TP.HCM Lê Chí Thông

Call and Return

• Return is also similar to a jump, but


– Return instruction pops PC from stack to get
address to jump to

RET ; PC  stack

Lê Chí Thông 97

Subroutines

call to the subroutine

MAIN: ...
ACALL SUBLABEL
...
...
SUBLABEL: ...
... the subroutine
RET

Lê Chí Thông 98

sites.google.com/site/chithong 49
ĐH Bách Khoa TP.HCM Lê Chí Thông

DJNZ – a For loop


Use DJNZ to create a for loop control

Ex: a 10-time loop


MOV R7,#10
LOOP: (begin loop)


(end loop)
DJNZ R7,LOOP
(continue)

Lê Chí Thông 99

DJNZ – a For loop


Use DJNZ to create a 1000-time loop?

Lê Chí Thông 100

sites.google.com/site/chithong 50
ĐH Bách Khoa TP.HCM Lê Chí Thông

DJNZ – an example
Ex: Write a program to write 40H to internal Loop  7
RAM from location 30H to location 36H.
(source)
Addr  30H
ORG 0000H
MOV R5,#7;Loop=7
MOV R1,#30H;Address=30H (Addr)  40H
Again: MOV @R1,#40H
INC R1 AddrAddr+1
DJNZ R5,Again
END LoopLoop-1

N
Loop=0?

Lê Chí Thông 101


Y

DJNZ – another example

Write a program to clear ACC, then add 3 to the


accumulator ten times.

Solution:
MOV A,#0
MOV R2,#10
AGAIN: ADD A,#03
DJNZ R2,AGAIN ;repeat until R2=0 (10 times)
MOV R5,A

Lê Chí Thông 102

sites.google.com/site/chithong 51
ĐH Bách Khoa TP.HCM Lê Chí Thông

DJNZ – Your Turn!


Write a program to copy a block of 10 bytes from RAM
location starting at 37h to RAM location starting at 59h.

Lê Chí Thông 103

Solutions
Write a program to copy a block of 10 bytes from RAM
location starting at 37h to RAM location starting at 59h.

Solution:
MOV R0,#37h ; source pointer
MOV R1,#59h ; dest pointer
MOV R2,#10 ; counter
L1: MOV A,@R0
MOV @R1,A
INC R0
INC R1
DJNZ R2,L1

Lê Chí Thông 104

sites.google.com/site/chithong 52
ĐH Bách Khoa TP.HCM Lê Chí Thông

Blinky Program

P1.0  1

Delay

P1.0  0

Delay

schematic

Lê Chí Thông 105

Blinky Program
ORG 0
LOOP: SETB P1.0
ACALL DELAY P1.0  1
CLR P1.0
ACALL DELAY
SJMP LOOP Delay
DELAY: MOV R6,#200
DL1: MOV R7,#250
DJNZ R7,$ P1.0  0
DJNZ R6,DL1
RET Delay
END
(source)

 Waveform? Period? Frequency?


Lê Chí Thông 106

sites.google.com/site/chithong 53
ĐH Bách Khoa TP.HCM Lê Chí Thông

Blinky Program
ORG 0
LOOP: SETB P1.0
ACALL DELAY
CLR P1.0
ACALL DELAY
SJMP LOOP
DELAY: MOV R6,#200
DL1: MOV R7,#250 1MC x 1
501 MC
DJNZ R7,$ 2 MC x 250
DJNZ R6,DL1
RET
END

Lê Chí Thông 107

Blinky Program
ORG 0
LOOP: SETB P1.0
ACALL DELAY
CLR P1.0
ACALL DELAY
SJMP LOOP
DELAY: MOV R6,#200 1 MC x 1
DL1: MOV R7,#250 501 MC x 200 100,601 MC
DJNZ R7,$
DJNZ R6,DL1 2 MC x 200
RET
END

Lê Chí Thông 108

sites.google.com/site/chithong 54
ĐH Bách Khoa TP.HCM Lê Chí Thông

Blinky Program
ORG 0
LOOP: SETB P1.0
ACALL DELAY
CLR P1.0
ACALL DELAY
SJMP LOOP
DELAY: MOV R6,#200
DL1: MOV R7,#250 100,601 MC
DJNZ R7,$ 100,603 MC
DJNZ R6,DL1
RET 2 MC
END

Lê Chí Thông 109

Blinky Program
ORG 0
LOOP: SETB P1.0 1 MC
ACALL DELAY 100,063 + 2 MC
CLR P1.0 1 MC
ACALL DELAY 100,063 + 2 MC
SJMP LOOP 2 MC
DELAY: MOV R6,#200
DL1: MOV R7,#250
DJNZ R7,$
DJNZ R6,DL1
RET
END

tH = 100,063 + 2 + 1 = 100,066 MC


tL = 100,063 + 2 + 2 + 1 = 100,068 MC

Lê Chí Thông 110

sites.google.com/site/chithong 55
ĐH Bách Khoa TP.HCM Lê Chí Thông

Blinky Program
If using 12 MHz crystal, 1 MC = 1 μs
 tH = 100,066 MC = 100,066 μs P1.0  1
tL = 100,068 MC = 100,068 μs
Delay tH
 T = tH + tL = 200,134 μs
 f = 1/T = 4.99 Hz P1.0  0

Delay tL

tH tL

Lê Chí Thông 111

Blinky Program - Estimating


ORG 0
LOOP: SETB P1.0
ACALL DELAY P1.0  1
CLR P1.0
ACALL DELAY
SJMP LOOP Delay tH
DELAY: MOV R6,#200
DL1: MOV R7,#250
DJNZ R7,$ P1.0  0
DJNZ R6,DL1
RET Delay tL
END

tH = tL ≈ tDELAY ≈ 200 x 250 x 2 MC = 100,000 MC = 100,000 μs


 T ≈ 200,000 μs
 f ≈ 5 Hz
Lê Chí Thông 112

sites.google.com/site/chithong 56
ĐH Bách Khoa TP.HCM Lê Chí Thông

Blinky Program – Alternative Method


ORG 0
LOOP: CPL P1.0
ACALL DELAY P1.0  NOT (P1.0)
SJMP LOOP
DELAY: MOV R6,#200
DL1: MOV R7,#250 Delay
DJNZ R7,$
DJNZ R6,DL1
RET
END P1.0  1

Delay

P1.0  0

Delay

Lê Chí Thông 113

10-kHz square wave


Write a program that creates a 10-KHz square wave at pin P1.3.
Assume that crystal is 24 MHz.

Lê Chí Thông 114

sites.google.com/site/chithong 57
ĐH Bách Khoa TP.HCM Lê Chí Thông

10-kHz square wave


Write a program that creates a 10-KHz square wave at pin P1.3.
Assume that crystal is 24 MHz.

If tH = tL
P1.3  1
tH tL
Delay tH P1.3  NOT (P1.3)
T

P1.3  0 Delay

Delay tL

Lê Chí Thông 115

10-kHz square wave


Write a program that creates a 10-KHz square wave at pin P1.3.
Assume that crystal is 24 MHz.

ORG 0000H
lap: CPL P1.3
ACALL delay
SJMP lap P1.3  NOT (P1.3)
delay:
MOV R4,#50
DJNZ R4,$ Delay
RET
END

Lê Chí Thông 116

sites.google.com/site/chithong 58
ĐH Bách Khoa TP.HCM Lê Chí Thông

10-kHz square wave, duty cycle 30%


Write a program that creates a 10-KHz square wave with duty cycle
30% at pin P1.3. Assume that crystal is 24 MHz.

P1.3  1
tH tL

T
Delay tH

P1.3  0

Delay tL

Lê Chí Thông 117

10-kHz square wave, duty cycle 30%


Write a program that creates a 10-KHz square wave with duty cycle
30% at pin P1.3. Assume that crystal is 24 MHz.
ORG 0000H
lap: SETB P1.3
ACALL delay1 P1.3  1
CLR P1.3
ACALL delay2
SJMP lap Delay tH
Delay1: MOV R4,#30
DJNZ R4,$ P1.3  0
RET
Delay2: MOV R4,#70
DJNZ R4,$ Delay tL
RET
END
Lê Chí Thông 118

sites.google.com/site/chithong 59
ĐH Bách Khoa TP.HCM Lê Chí Thông

100-kHz square wave


Write a program that creates a 100-kHz square wave at pin P1.1.
Assume that crystal is 12 MHz.

Lê Chí Thông 119

100-kHz square wave


Write a program that creates a 100-kHz square wave at pin P1.1.
Assume that crystal is 12 MHz.

ORG 0000H
lap: CPL P1.1
NOP
NOP
SJMP lap
END

Lê Chí Thông 120

sites.google.com/site/chithong 60
ĐH Bách Khoa TP.HCM Lê Chí Thông

100-kHz square wave, duty cycle 40%


Write a program that creates a 100-kHz square wave with duty cycle
40% at pin P1.2. Assume that crystal is 12 MHz.

Lê Chí Thông 121

100-kHz square wave, duty cycle 40%


Write a program that creates a 100-kHz square wave with duty cycle
40% at pin P1.2. Assume that crystal is 12 MHz.

ORG 0000H
lap: SETB P1.2
NOP
NOP
NOP
CLR P1.2
NOP
NOP
NOP
SJMP lap
END

Lê Chí Thông 122

sites.google.com/site/chithong 61
ĐH Bách Khoa TP.HCM Lê Chí Thông

CJNE – Equal/Not Equal (1)

N CJNE A,#05H,Skip
A = 05H?
(Statement 1)
Skip: (Continue)
Y
Statement 1

Lê Chí Thông 123

An Example
Ex: Write a program to write 40H to internal RAM from location
30H to location 36H.
(source)
ORG 0000H
Addr  30H
MOV R1,#30H;Address=30H
Again: MOV @R1,#40H
INC R1 (Addr)  40H
CJNE R1,#37H,Again
END AddrAddr+1

N
Addr=37H?

Y
Lê Chí Thông 124

sites.google.com/site/chithong 62
ĐH Bách Khoa TP.HCM Lê Chí Thông

CJNE – Equal/Not Equal (2)


CJNE A,#05H,Not_Eq
N
A = 05H? (Statement 1)
SJMP Next
Y Not_Eq: (Statement 2)
Statement 2 Statement 1 Next: (Continue)

Lê Chí Thông 125

CJNE – Greater Than or Equal/Less Than (1)


CJNE A,#05H,Next
N
A ≥ 05H? Next: JC LessThan
(Statement 1)
Y LessThan: (Continue)
Statement 1

CJNE A,#05H,$+3
JC LessThan
(Statement 1)
LessThan: (Continue)

Lê Chí Thông 126

sites.google.com/site/chithong 63
ĐH Bách Khoa TP.HCM Lê Chí Thông

CJNE – Greater Than or Equal/Less Than (1)


CJNE A,#05H,Next
N
A ≥ 05H? Next: JNC GT_Eq
SJMP Continue
Y GT_Eq: (Statement 1)
Statement 1 Continue: (Continue)

CJNE A,#05H,$+3
JNC GT_Eq
SJMP Continue
GT_Eq: (Statement 1)
Continue: (Continue)

Lê Chí Thông 127

An Example
Examine the content of A, if 5 ≤ A ≤ 10 then output A to Port 1;
if not, output A to Port 2.
ORG 0
CJNE A,#5,$+3
JC PORT2
CJNE A,#11,$+3
JNC PORT2
MOV P1,A
SJMP DONE
PORT2:MOV P2,A
DONE: NOP
END
Lê Chí Thông 128

sites.google.com/site/chithong 64
ĐH Bách Khoa TP.HCM Lê Chí Thông

CJNE – Greater Than or Equal/Less Than (2)

N
CJNE A,#05H,$+3
A ≥ 05H? JNC GT_Eq
(Statement 2)
Y
SJMP Next
Statement 2 Statement 1 GT_Eq: (Statement 1)
Next: (Continue)

Lê Chí Thông 129

Bit Testing
Given a 20-byte string in internal RAM, starting at address 40H.
Write a program that output even numbers to Port 2.

Lê Chí Thông 130

sites.google.com/site/chithong 65
ĐH Bách Khoa TP.HCM Lê Chí Thông

Bit Testing
Given a 20-byte string in internal RAM, starting at address 40H.
Write a program that output even numbers to Port 2.
ORG 0
MOV R4,#20 ; Number of loops
MOV R0,#40H ; Address pointer
LOOP:
MOV A,@R0 ; Read data from internal RAM to A
JB ACC.0,NEXT ; skip if odd number
MOV P2,A ; Output to Port 2 if even number
NEXT:
INC R0
DJNZ R4,LOOP
END Lê Chí Thông 131

Your Turn!
Given a 20-byte string in external RAM, starting at address
4000H. Write a program that output odd numbers to Port 2.

Lê Chí Thông 132

sites.google.com/site/chithong 66
ĐH Bách Khoa TP.HCM Lê Chí Thông

Solutions
Given a 20-byte string in external RAM, starting at address
4000H. Write a program that output odd numbers to Port 2.
ORG 0
MOV R4,#20 ; Number of loops
MOV DPTR,#4000H ; Address of external RAM
LOOP:
MOVX A,@DPTR ; Read data from external RAM to A
JNB ACC.0,NEXT; skip if even number
MOV P2,A ; Output to Port 2 if odd number
NEXT:
INC DPTR
DJNZ R4,LOOP
END Lê Chí Thông 133

Bit Testing
Given a 100-byte unsigned number string in external RAM at
address starting from 0100H. Write a program that sends positive
numbers to Port 1 and negative numbers to Port 2.

Hint:
- A positive number has MSB = 0.
- A negative number has MSB = 1.
- Use JB / JNB instruction
--

Lê Chí Thông 134

sites.google.com/site/chithong 67
ĐH Bách Khoa TP.HCM Lê Chí Thông

Bit Testing
Given a 100-byte unsigned number string in external RAM at
address starting from 0100H. Write a program that sends positive
numbers to Port 1 and negative numbers to Port 2.
ORG 0000H
MOV DPTR,#0100H
MOV R4,#100
loop: MOVX A,@DPTR
JNB ACC.7,positive
MOV P2,A
SJMP next
positive: MOV P1,A
next: INC DPTR
DJNZ R4,loop
END
Lê Chí Thông 135

Bit Testing
P1.0
P1.2
P1.1
XOR

LOOP: MOV C,P1.0


JNB P1.1,SKIP
CPL C
SKIP: MOV P1.2,C
SJMP LOOP

Lê Chí Thông 136

sites.google.com/site/chithong 68
ĐH Bách Khoa TP.HCM Lê Chí Thông

Example Problem
A 4-bit DIP switch and a common-anode 7-segment LED are
connected to an 8051 as shown in the following figure. Write a
program that continually reads a 4-bit code from the DIP switch and
updates the LEDs to display the appropriate hexadecimal character.
For example, if the code 1100B is read, the hexadecimal character
“C” should appear, thus, segments a through g respectively should
be ON, OFF, OFF, ON, ON, ON, and OFF. Note that setting an 8051
port pin to “1” turns the corresponding segment “ON”.

Lê Chí Thông 137

References

• I. Scott MacKenzie , The 8051 Microcontroller, 2nd


Edition, Prentice-Hall, 1995
• Kenneth J. Ayala, The 8051 Microcontroller:
Architecture, Programming, and Applications, West
Publishing Company
• hsabaghianb@kashanu.ac.jr , Lecture notes

Lê Chí Thông 138

sites.google.com/site/chithong 69

You might also like