SCHOOL of INFORMATION

YUNNAN UNIVERSITY

Subject Name: Digital Circuit Experiment Exp No: 02

Teacher Name :官铮（Zheng GUAN)

Name: DEB SHOTABDI(艾比)

Student ID: 20193290667 Major: CST
Experiment Name: Combinational logic circuit Of Half Adder

Defination - Half adder is used to add two single-digit binary numbers and results
into a two-digit output. It is named as such because putting two half adders together with
the use of an OR gate results in a full adder. In other words, it only does half the work of
a full adder.

Half Adder-

Half Adder is a combinational logic circuit.

It is used for the purpose of adding two single bit numbers.
It contains 2 inputs and 2 outputs (sum and carry).
Half Adder Designing-

• Step 1- Define the logical state of the input and output variables according to
the causality of actual logical problems.

• Step 2- According to the design requirement, list the truth table according to
the logic function and fill in the Karnaugh map.

• Step 3- Get the logical expression by Karnaugh map or truth table.

Sometimes logic exchange is carried out according to given logic

gates or other practical requirements. The logical expression of the
required form is obtained.

Step 4-Draw the diagram according to the logical equitation. Carry out the function
test

Test the logic function of the half adder

According to the logical expression of the half adder, the sum of the adders is the
XOR of A and B, and the carry Z is the AND of A and B. Therefore, the half adder
can be composed of an integrated XOR gate and two NAND gates, as shown in

Figure 2.2.
 Software simulation is shown in the figure below

In the experiment, the XOR gate and the NAND gate are connected to the above
circuit. A, B are connected to the level switch, Y, Z connected to the level display
LED.

Software simulation is used to generate the waveform as follows

 Truth Table This Circuit
Input
Input Output
A B Y Z
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1

Working Procedure:
Connect the trainer kit to ac power supply.
Connect logic sources to the inputs of the adder.
Connect output from SUM and CARRY to logic indicators.
Apply various input combinations to the adder.
Observe the SUM and CARRY outputs, verify the tructh table for each
input/ output combination.
Switch off the ac power supply

Remarks: After studying this section, I should be able to

Half Adder Design Method.

Defination of Half Adder.

Test Logic Function Of Half Adder.
Software simulation is used to generate the waveform.