IEEE Transactions on Power Delivery, Vol. 13, No.
4, October 1998
UPFC - Unified Power Flow Controller:
Theory, Modeling, and Applications
Kalyan K. Sen, Member, IEEE
Westinghouse Electric Corporation
1310 Beulah Road
Pittsburgh, PA 15235, USA
Abstract - This paper describes the theory and the modeling
technique of a Flexible Alternating Current Transmission Systems
(FACTS) device, namely, Unified Power Flow Controller (UPFC)
using an Electromagnetic Transients Program (EMTP) simulation
package. The UPFC, in this paper, consists of two solid-state
voltage source inverters which are connected through a common
DC link capacitor. Each inverter is coupled with a transformer at
its output. The first voltage source inverter, known as STATic
Synchronous COMpensator (STATCOM), injects an almost
sinusoidal current, of variable magnitude, at the point of
connection. The second voltage source inverter, known as Static
Synchronous Series Compensator (SSSC) injects an almost
sinusoidal voltage, of variable magnitude, in series with the
transmission line. This injected voltage can be at any angle with
respect to the line current. The exchanged real power at the
terminals of one inverter with the line flows to the terminals of the
other inverter through the common DC link capacitor. In addition,
each inverter can exchange reactive power at its terminals
independently. The functionalities of the models have been
verified.
Keywords - AC transmission, FACTS, power flow controller,
power converter, inverter, thyristor, GTO, etc.
I. INTRODUCTION
Electric power flow through an alternating current transmission
line is a function of the line impedance, the magnitudes of the
sending-end and receiving-end voltages, and the phase angle
between these voltages. Essentially, the power flow is dependent
on the voltage across the line impedance. Fig. l a shows a single
line diagram of a simple transmission line with an inductive
reactance, &, and a series insertion voltage, v d q , connecting a
sending-end voltage source
-
vs and a receiving-endvoltage source,
V,. , respectively. The voltage across the transmission line
where 7 is the current in the transmission line
The voltage, vx,across the transmission line can be changed
by changing the insertion voltage, v d q , in series with the
transmission line and, consequently, the line current and the power
flow in the line will change. Consider the case where vdq = 0
PE-282-PWRD-0-12-1997 A paper recommended and approved by
the IEEE Transmission and Distribution Committee of the IEEE Power
Engineering Society for publication in the IEEE Transactions on Power
Delivery. Manuscript submitted July 31, 1997; made available for
printing December 12, 1997.
0885-8977/98/$10,00 0 1997 IEEE
1453
Eric J. Stacey
(Fig. Ib). The transmission line’s sending-end voltage, vs , leads
the receiving-end voltage, v,, by an angle 6 . The resulting
current in the line is 1 and the real and reactive power flow at the
receiving end are P, and Q,, respectively. With an injection of
-
vdq in series with the transmission line, the transmission line’s
sending-end voltage, Vo ,still leads the receiving-endvoltage, 7,. ,
but by a different angle 6 (Fig. IC). The resulting line current
and
- the amount of power flow change. With a larger amount of
vdq injected in series with the transmission h e , the transmission
line’s sending-end voltage, To, now lags the receiving-end
voltage, F,. ,by an angle 6 (Fig. Id). The resulting line current
and the power flow now reverse. With this background, a set of
power flow controllers will be described. The objective in this
paper is to describe the fundamentals of a UPFC and its modeling
technique using an Electromagnetic Transients Program (EMTP)
simulation package.
(4
Fig. 1 A Unified Power Flow Controller Operating in a Voltage Injection
Mode and the Related Phasor Diagrams
Flexible Alternating Current Transmission Systems (FACTS)
devices, namely STATic Synchronous COMpensator (STATCOM),
Static Synchronous Series Compensator (SSSC) and Unified
Power Flow Controller (UPFC), are used to control the power flow
through an electrical transrnission line connecting various
generators and loads at its sending and receiving ends. The UPFC,
in this paper and existing references, consists of two solid-state
voltage source inverters which are connected through a common
DC link capacitor. Each inverter is coupled with a transformer at
its output. The first inverter, known as STATic Synchronous
COMpensator (STATCOM), irijects an almost sinusoidal current,
of variable magnitude, at the point of connection. The second
inverter, known as Static Synchronous Series Compensator (SSSC)
injects an almost sinusoidal voltage, of variable magnitude, in
series with the transmission h e . When the STATCOM and the
SSSC operate as stand-alone: devices, they exchange almost
exclusivelyreactive power at their terminals. While operating both
the inverters together as a UPFC, the exchanged power at the
terminals of each inverter can be reactive as well as real. The
exchanged real power at the terminals of one inverter with the line
flows to the terminals of the other inverter through the common DC
link capacitor.
1454
Fig. 2 shows a basic W F C model which consists of a
STATCOM and an SSSC. The SSSC injects a voltage, Vdq, in
series with the transmission line which, in turn, changes the
voltage, &, across the transmission line and hence the current and
the power flow through the transmission line change. The phase
angle, 4, (Fig. IC, d) between the injected voltage, T d q , and the
line current, f , can be between 0 and 2n. The component of the
injected voltage which is in or out of phase with the line current
emulates a positive or negative resistance in series with the
transmission line. The remaining component which is in
quadrature with the line current emulates an inductive or a
capacitive reactance in series with the transmission line. The
exchanged real power, P,,,,and reactive power, Qlnv, by the SSSC
with the line are
en,, -
= vdq 0 ?= v I C O S e
d9 (W
- a series of capacitors which are charged with a total DC voltage of
Qjnv = vdq X I = Vd9 Z S h 4 (2b)
The real power is absorbed kom or delivered to the line through
the STATCOM which injects a current at the point of connection.
The current injected by the STATCOM has a real or direct
component, Id, which is in phase or in opposite phase with the line
voltage. The current injected by the STATCOM also has a reactive
or quadrature component, I,, which is in quadrature with the line
voltage, thereby emulating an inductive or a capacitive reactance at
the point of connection with the transmission line. This reactive
current can independently be controlled which, in turn, will
regulate the line voltage.
sssc
Fig. 2 A Basic Unified Power Flow Controller Model
Each of the STATCOM and the SSSC consists of a solid-state
voltage source inverter with several Gate Turn Off (GTO) thyristor
switch-based valves and a DC link capacitor, a magnetic circuit,
and a controller. The number of valves and the various
configurations of the magnetic circuit depend on the desired quality
of AC waveforms generated by the FACTS devices. The inverter
configuration described in this paper is one of many different
possible configurations that can be used to build a voltage source
inverter. The configurations of the two inverters used in this paper
are identical.
IPFC
U I!
//rel lorCtno-[
Fig. 3 A Unified Power Flow Controller Model in EMTP
The UPFC model in EMTP is shown in Fig. 3 . The UPFC is
connected in series with the transmission line which has an
inductive reactance, X,, and a voltage source, vs,at the sending
end and an inductive reactance, X,, and a voltage source, y, , at the
receiving end, respectively. Since, the emphasis of modeling is
purely on UPFC, the power system in which the UPFC is
connected to has been modeled in a simplistic way. The UPFC
model in EMTP consists of two harmonic neutralized voltage
source inverters, VSZl and VSI2, two magnetic circuits, MC1 and
MC2, two coupling transformers, TI and T2, four mechanical
switches, MSl, MS2, MS3, and MS4, two electronic switches, ES2
and ES22, current and voltage sensors, and a controller. The
voltage source inverters are connected through a common DC link
capacitor. The STATCOM is operated by regulating the reactive
current flow through it. The SSSC is operated by injecting a
voltage in series with the transmission line.
II. DESCRIPTION OF THE INVERTER
Fig. 4 shows a single phase inverter circuit, referred to as a 3-
level “pole,” which consists of a positive valve, A+, a negative
valve, A-, and an AC valve, AAc. when a pole is connected across
v w and the valves are closed and opened alternately, the pole
output voltage, vA0, at the midpoint of the pole A with respect to
the midpoint, 0, of the capacitor is a quasi square wave containing
a positive sequence fundamental component and all the odd
harmonic components, such as the zero sequence third, the negative
sequence fifth,and the positive sequence seventh, etc.
OFF
ON I
AAcOq OFF b- OFF E N
Fig. 4 A 3-Level Inverter “Pole” and its Output Voltage
The amplitude of any odd multiple of fundamental component is
2
yAo,n = -vDC cos (3)
n7t
where y is the “dead” period during which the AC valve operates in
each quarter cycle and the pole output voltage is zero and n = 2k +
1 for k = 0, 1,2,3, etc.
VAN
0.5v,-”Pa, 2s
i
N
Fig. 5 A 6-Pulse Inverter with 3-Level poles and its Output Voltages
Fig. 5 shows three poles A, B, and C which are connected
across the same DC link capacitor and the pole outputs are
connected to a 3-phase load whose neutral point, N, is not
connected to the midpoint of the capacitor. The poles A, B, and C
which form a 6-pulse inverter are operated in such a way that the
pole voltages, vA,, v,,, and vco, are time shifted fiom one another
by one third of the time period of the pole voltage. Therefore, the
fundamental phasors, vB,l
, and vC,,
are 120” apart. Since,
the zero sequence components of each pole current have no return
path to the midpoint of the DC link capacitor, the zero sequence
components of each pole voltage, VNO = (VAO + VBO + vc0)/3, appear
between the neutral point and the midpoint of the DC llnk
capacitor. Therefore, each phase of the load voltages, VAN = VAO -
vNO, vBN = vBO - vNO, and vCN = VC- - VNO, consists of only a
fundamental component and odd harmonic components (n) given
by the equation (3) where n = 6k f 1 for k = 1 , 2 , 3 , etc.
For a vw = 7d2 per unit, the amplitudes of fundamental and
harmonic components, VAN,^, are shown in Fig. 6 as a function of y
for possible values of y between 0 and 90’. It is shown that for y =
 1455
0, the fundamental as well as all the harmonic components have the time shifted by an angle of -8, the fundamental and all the
highest possible amplitudes. At y = 0, a 3-level pole acts as a 2- harmonic components of the pole voltage get a phase shift by an
level pole which switches from +vm/2 to -vm/2 and offers the angle of +e in the positive direction, irrespective of their sequence.
maximum possible DC to AC utilization. However, at y > 0, a 3- n timeshift phase find timeshift phase final
level pole which switches from +v&2 to 0 to -vm/2 produces shift phase shift phase
improved output waveform quality at the expense of reduction in
the fundamental voltage. This is just what is needed if the SSSC pole A angle pole D angle
has to operate from the common DC link capacitor which is the 5 -5*(0) 0 0 -5*(-d6) M6 x
case in this paper. For y > 0, the fundamental amplitude decreases 7 +7*(0) 0 0 +7*(-d6) +d6 x
monotonically. However, the harmonic amplitudes vary 11 -ll*(O) 0 0 -11*(-d6) +d6 0
sinusoidally. A measure of the harmonic content defined as 13 +13*(0) 0 0 +13*(-~/6) M6 0

GNh = 7 n
where n = 6k f 1 for k = 1, 2, 3, etc. is also shown in Fig. 6. A
(4)
17 -17*(0)
19 +19*(0)
23 -23*(0)
0
0
0
0
0
0
-17*(-d6) +d6 x
+19*(-d6) M 6
-23*(-d6) +d6
x
0
25 +25*(0) 0 0 +25*(-./6) M6 0
measure of the total harmonic distortion of the voltage defined as
Table 1 Phase Angles of a 12-PulseInverter Phasors
THD, = v,, 1 v,,, (5)
Table 1 shows the time shifted A and D pole voltages' first
is also shown in Fig. 6. At rowm = 15.35", the fundamental
twenty five harmonic components' final phase angles after
amplitude decreases by 3.57% compared to what is obtained from a appropriate phase shift. The pole voltages from the ABC inverter
2-level operation of the poles. But, the harmonic content is exhibits a 6-pulse harmonic neutralized waveform with harmonic
reduced to 16% from 31%, obtained from a 2-level operation of the components n = 6k f 1 for k = 1, 2, 3, etc. Similarly, the pole
poles in a 6-pulse inverter, resulting in the smallest THDv. voltages from the DEF inverter exhibits a 6-pulse harmonic
'AN5 VANJ neutralized waveform whose harmonic components (n = 6k f 1 for
k = 1, 2, 3, etc.) have the same magnitudes as the corresponding
harmonic components of the ABC inverter's 6-pulse harmonic
neutralized waveform. However, the harmonic components (n = 6k
f 1 for k = 1, 3, 5, etc.) are in opposite phases while the harmonic
components (n = 6k f 1 for k ==2,4, 6, etc.) are in phases with the
corresponding harmonic components of the ABC inverter's 6-pulse
harmonic neutralized waveform. Therefore, if all the outputs from
each 6-pulse inverter are combined by connecting the
corresponding phases in series, a 12-pulse harmonic neutralized
waveform is obtained. The resulting output voltage exhibits a
fundamental component and odd harmonic components (n) given
THDV
*
by the equation (3) where n = 12k 1 for k = 1,2,3, etc. Note that
the output voltage of a 12-pulse inverter with 3-level poles is
'ANh
referred to as a 12-pulse waveform when the poles are operated
0.31 with dead angle y = 0.
MAGNETIC CIRCUIT
0
15.35' 30' y 60' 90'
Fig. 6 Variations of Amplitudes of Fundamental and Harmonic
Components, Harmonic Content and Total Harmonic Distortion Factor as a
Function of y I. ,z VF

InverterDEF, -30'
I
VA

\?b % VB
.cm VC

- Inverter ABC, 0'

Fig. 7 A 12-PulseHarmonic Neutralized Inverter Configuration with 3-
Level Poles
Fig. 7 shows two 6-pulse inverters (ABC and DEF) which are
operated from the same DC link capacitor. On the AC side, they
are connected to a 3-phase load (XYZ) through a magnetic circuit.
The poles D, E, and F are operated in such a way that the pole
voltage fundamental phasors, vD,l, ~ E , I and
, vF,~
are 120' apart
and the fundamental voltage phasor set of the DEE; inverter lags the
fundamental voltage phasor set of the ABC inverter by 30". The
displacement angle between two consecutive 6-pulse inverters in a
multipulse inverter arrangement is 2d6m, where m is the total
number of 6-pulse inverters used. The configuration of the
magnetic circuit in Fig. 7 is such that if an inverter pole voltage is
Fig. 8 A Magnetic Circuit for a 12-PulseHarmonic Neutralized Inverter
Fig. 8 shows a possible configuration of the magnetic circuit
which can be used to generate a 12-pulse harmonic neutralized
voltage. The ABC 6-pulse inverter voltage is fed to a Y-Y
transformer and the DEF 6-pulse inverter voltage is fed to a A-Y
transformer. The inverter side A winding and DE winding will
have per turn fundamental component voltages which are of same
magnitude and in phase and the fifth and the seventh harmonic
components each of which are: of same magnitude but in opposite
phase. Therefore, if the line riide of the transformer windings are
connected in series, the phase-X voltage will exhibit only a
fundamental component and 12-pdse harmonic components. The
line side inverter windings can have any turns ratio other than 0.5
to increase or decrease the output voltage.
The presence of 12-pulse Iiarmonic components in the inverter
output voltage may not be acceptable in many applications.
Therefore, an inverter with a higher pulse output voltage should be
considered. Fig. 9 shows a 24-pulse Quasi Harmonic Neutralized
 N

12-Pulse Inverter# 2

Fig. 9 A 24-PulseQuasi Harmonic Neutralized Inverter Configuration

( Q W inverter configuration which consists of four 6-pulse
inverters (AlBlCl, A2B2C2, DlElF1, and D2E2F2) operated
from a common DC link capacitor charged with a total DC voltage
of vK. On the AC side, the outputs from four inverters are
connected to a 3-phase load (XYZ) through a magnetic circuit. The
poles Al, B1, C1, A2, B2, C2, D1, E l , F1, D2, E2, and F2 are
operated in such a way that the pole voltage fundamental phasors in
a group, for example, vAi,lvH,l
, , andva,l of AlBlCl inverter,
- - -
VAz1, VBz 1, and
-
vc2 of A2B2C2 inverter, FDl,l, VEl,l, and
-
Vn,l of DlElFl inverter, and F D A , , V E T 1 ,and TF,, of Fig. 10 A Magnetic Circuit for a 24-Pulse Quasi Harmonic Neutralized
Inverter
D2E2F2 inverter, are 120" apart. The displacement angle between
two consecutive 6-pulse inverters in a multipulse inverter
configuration is 2n16m (= 15") where m (= 4) is the total number of
6-pulse inverters used. The fundamental voltage phasor set of the
AlBIC1, A2B2C2, DlElF1, and D2E2F2 inverters are time
shifted by angles of +7.5', -7.5', -22.5', and -37.5', respectively. If
the pole voltages from the inverters AlBlCl and DlElFl are
magnetically combined as described before, the output voltage
exhibits a 12-pulse harmonic neutralized waveform with harmonic
components n = 12k k 1 for k = 1, 2, 3, etc. Similarly, if the pole
voltages from the inverters A2B2C2 and D2E2F2 are magnetically
- 1 1.08% /
combined, the output voltage exhibits a 12-pulse harmonic (C)
neutralized waveform whose harmonic components (n = 12k rt 1 for 0.0391
k = 1, 2, 3, etc.) have the same magnitudes as the corresponding 0.07:
harmonic components of the first 12-pulse harmonic neutralized 3.82' 30' 60' 90
waveform. However, the fundamental phasors of the output Fig 11 Normalized Harmonic Componentsof Output Voltages from (a) a
voltages from the two 12-pdse inverters are at +7.5" and -7.5", 24-Pulse QHN Inverter and @) a 48-Pulse QHN Inverter as a Function of
respectively. Therefore, if all the outputs from each 6-pulse Harmonic Order and (c) Variations of Amplitude of Fundamental
inverter are combined by connecting the corresponding phases in Component, Harmonic Content and THD as a Function of y
series, as shown in Fig. 10, a 24-pulse QHN waveform is obtained. Fig. lla, b show the normalized harmonic components of the
Note that the output voltage of a 24-pulse QHN inverter with 3- output voltages from a 24-pulse QHN inverter and a 48-pulse QHN
level poles is referred to as a 24-pulse QHN waveform when the inverter as a function of harmonic order (n) as given by the
poles are operated with dead angle y = 0. The resulting output equation (7). The variations of fundamental component, harmonic
voltage exhibits a fundamental component and odd harmonic content and total harmonic distortion factor of a 24-pulse QHN
components each of which has an amplitude of inverter with 3-level poles as a function of y is shown in Fig. llc.
At yOpm,,,,, = 3.82", the fundamental amplitude decreases by 1.08%
compared to what is obtained from a 2-level operation of the poles.
But, the harmonic content is reduced to 3.91% from 7.7%, obtamed
where n'z-1 and 12k 1' for k = 1, 2, 3, etc. and y is the period from a 2-level operation of the poles in a 24-pulse inverter,
during which each AC valve operates in each quarter cycle. The resulting in the smallest THD,. The configuration of each inverter
amplitude of any odd harmonic component (n) normalized to the in this paper is of 24-pulse QHN type and each pole is 3-level type.
fundamental component is The inverter in the STATCOM has been operated with a fixed dead
angle of n/48 to obtain 48-pulse output voltage waveform. The
'x,- cos (nn 124) cos ny inverter in SSSC has been operated with a variable dead angle, y, to
-- (7)
vx,-
where n
n COS (X 124) COS y
= 12k f 1 for k = 1,2, 3, etc. Note that if a 24-pulse QHN
v a q the amplitude of the injected voltage.
III. CONTROL OF UPFC
inverter with 3-level poles is operated with y = d48, the resulting The control of a UPFC can be divided into two parts - the
output voltage is the same as that is obtained from a 48-pulse QHN control of the STATCOM and the control of the SSSC. When the
inverter. STATCOM and the SSSC operate as stand-alone devices, they
exchange almost exclusively reactive power at their terminals.
 1457
During the stand alone operations, the SSSC injects a voltage in The inverter voltage and current show the presence of 48-pulse quasi
quadraturewith the line current thereby emulating an inductive or a harmonic components.
capacitive reactance in series with the line and the STATCOM
injects a reactive current at the point of connection thereby also
v, A
(PU)
emulating a reactance at the point of connection with the
transmission line. While operating both the inverters together as a
UPFC, the injected voltage in series with the transmission line can
be at any angle with respect to the line current. The exchanged real
power at the terminals of one inverter with the line flows to the
terminals of the other inverter through the common DC link
capacitor [4, 51. The STATCOM can still be used to control the
reactive current flow through it independently.
A. STATCOM
The controller of a STATCOM is used to operate the inverter in
such a way that the phase angle between the inverter voltage and
the line voltage is dynamically adjusted so that the STATCOM
generates or absorbs desired VAR at the point of connection [2].
Controller
r____________________________________

* I

Ilq I
! I
I
I
I
I
i Rotating I

, -
Fig. 13 Performance of a Static Synchronous Compensator with a 48-Pulse
Quasi Harmonic Neutralized Inverter Operating in Capacitive and Inductive
Modes
I I
L___________________-------------____J

Fig. 12 Control Block Diagram of a Static Synchronous Compensator "1a

Fig. 12 shows the control block diagram of the STATCOM.
An instantaneous 3-phase set of line voltages, vl, at BUS 1 is used
to calculate the reference angle, 0,which is phase-locked to the
phase a of the line voltage, via. An instantaneous 3-phase set of
measured inverter currents, il, is decomposed into its real or direct
component, I,, and reactive or quadrature component, Zlq,
respectively. The quadrature component is compared with the
desired reference value, Zlq*, and the error is passed through an error
amplifter which produces a relative angle, a,of the inverter voltage
with respect to the l i e voltage. The phase angle, 01,of the inverter
voltage is calculated by adding the relative angle, a,of the inverter
voltage and th: phaselock-loop angle, 0.The reference quadrature
component, Zl ,of the inverter current is defined to be either positive
if the STATC6M is emulating an inductivereactance or negative if it
is emulating a capacitive reactance. The DC link capacitor voltage,
vm,is dynamically adjusted in relationship with the inverter voltage.
Fig. 13 shows the digital simulation results from the reactive time
current control operation of a STATCOM while the SSSC is
bypassed by the mechanical switch, MS2. Between 0 and 50 ms, the -1
mechanical switch, MSI, stays open, disconnecting the STATCOM Fig. 14 Waveforms fiom a Static Synchronous Compensator with a 48-
fiom the transmission line. The DC link capacitor is precharged. The Pulse Quasi Harmonic Neutralized Inverter Operating in Capacitive and
inverter output 48-pulse voltage of phase a, el=,and the line voltage Inductive Modes
of phase a, vln, are in phas? At 50 ms, MSl closes and the B. SSSC
quadrature current demand, Zlq , of the inverter is set to zero. Since
the inverter current is zero, the inverter voltage of phase a, el,, and The SSSC can be operated in many different modes, such as
the line voltage of phase a, v,,, haye equal amplitudes. At 125 ms, voltage injection, phase angle shifter emulation, line impedance
the quadrature current demand, Zl , of the inverter is set to one per emulation, automatic power flow control, etc. In each mode of
unit capacitive, which means the S?ATCOM should "see" the system operation, the final outcome is such that the SSSC injects a voltage
as q inductive reactance and the inverter current of phase a, ita, lags in series with the transmissiori line [3, 6, 71. In this paper, the
the line voltage of phase a, vlo, by almost 90". The inverter voltage SSSC is operated in a voltage injection mode. The control block
set, el, is greater than the l k e voltage set, vl. At 175 ms, the diagram for the SSSC is shown in Fig. 15.
Controller
quadrature current demand, Z, ,of the inverter is set to one per unit ~----------------.----------.------

inductive, which means the S'fATCOM should "see" the system as a

capacitive reactance and the inverter current in phase a, ilo, leads the
line voltage at phase a, via, by almost 90". The inverter voltage set, I

el, is less than the,line voltage set, vl. At 250 ms, the quadrature I

current demand, Ilq , of the inverter is set to one per unit capacitive p-1
and the transition takes place in a subcycle time. The phase angle, a,
between the inverter voltage and the line voltage is dynamically
adjusted so that the inverter maintains proper DC link capacitor
voltage. Fig. 14 shows the expanded view of two sections of Fig. 13. Fig. 15 Control Block Diagam of a Static Synchronous Series
Compensator
1458
The desired peak fundamental voltage, Vdq*, at the output of the
inverter and its relative angle, p, with respect to the reference
phase-lock-loop angle are specified. The phase angle, 02,of the
inverter voltage is calculated by adding the relative angle, p, of the
inverter voltage and the phase-lock-loop angle, 0.The dead angle of
each pole is calculated according to the equation (6) with n = 1.
V, A, P, Q
real power flow, P,, at the receiving end reverses. The series
inverter output voltage, e,, of phase a lags the line current, i,, by an
angle $. The reactive power exchanged at the terminals of the
coupling transformer, T2, becomes capacitive. Fig. 17 shows the
expanded view of two sections of Fig. 16. The inverter voltage and
current show the presence of harmonic comDonents.
0.5- e2a

0.25
0
4 -
Fig. 16 Performance of a Unified Power Flow Controller, with a 24-Pulse
Quasi Harmonic Neutralized Inverter with 3-Level Poles, Operatmg in a
Voltage Injection Mode
Fig. 16 shows the digital simulation results from the voltage
injection mode of operation of an SSSC while the STATCOM is
operated to deliver no reactive current. At the beginning of the
operation, the mechanical switch, MS2, and the electronic switch,
ES22, are open and the electronic switch, ES2, is closed. The
inverter, VSZ2, injects no voltage. The voltage, vi,, at the terminals
of the coupling transformer, T2, is the voltage across its leakage
reactance. The power exchanged at the terminals of the coupling
transformer, T2, is mostly reactive due to the inductance of the
transformer. The mechanical switch, MSl, is open, disconnecting the
STATCOM from the transmission line. The DC link capacitor is
precharged.* At 50 ms, MSl closes and the quadrature current
demand, Ziy ,of the inverter is set to zero. At 100 ms, a series voltage
Fig. 17 Waveforms fiom a Unified Power Flow Controller, wth a 24-&lse
Quasi Harmonic Neutralized Inverter wth 3-Level Poles, Operatmg m a
Voltage Injection Mode
IV. CONCLUSION
A UPFC has been modeled using an EMTP simulation
package. The UPFC consists of two voltage source inverters - one
injects an almost sinusoidal voltage in series with the transmission
line and the other injects an almost sinusoidal current at the point
of connection. The injected voltage can be at any angle with the
line current. The injected current has two parts. First, the real part,
which is in phase with the line voltage, delivers or absorbs real
power to the line that is negotiated by the injected voltage source
plus losses in UPFC. Second, the reactive part, which is in
quadrature with the line voltage, emulates an inductive reactance or
a capacitive reactance at the point of connection. The SSSC model
has been operated injecting a voltage in series with the transmission
line. The STATCOM model has been operated regulating the
reactive current flow through it and the transition between different
modes of operation takes place in a subcycle time. The operation
of the model is verified with the model connected to a simple
transmission line which can easily be replaced by the utility's
existing more complex power system network.
V. APPENDIX
BEGIN NEW DATA CASE
C FILE: 24PQUPFC.DAT (24-Pulse Quasi harmonic neutralized
C UPFC). This UPFC Power Flow Controller was implemented
C by K. K. Sen at Westmghouse, STC, Pittsburgh, PA 15235.
16.666-6450.00-3
30 10
TACS HYBRID
99CRD = 180 / PI
99CDR = 1 / CRD
99TWOPI = 2 . 0 * PI
99KpshI = .45
99KishI = 40
99Kinv = (2 / PI) * COS(PI/24)
99KPLLp = 100000.0

injection of 0.2 per unit, at the inverter side, at an angle p = 120" 99KPLLi
99MS1
= 250000.0
= TIMEX .GE. 0.05
leading the reference phase-lock-loop angle is requested. The series 99MS2 = 0
C Inverter base
inverter output voltage, e,, of phase a leads the line current, i,, by an 99Vbasei = 112676.528
angle $. Since $ > 90", the SSSC emulates a negative resistance in 99Ibasei = 946.662704
C Inputs from the measiiring switches
addition to an inductive reactance in series with the transmission line. 90BUSOlA
The real power that is delivered to the line by the series inverter flows YOBUSOlB
SOBUBOlC
from BUS 1 through the STATCOM. The shunt lnverter output 90BUS02A
voltage, ela,of phase a is almost 180" out of phase with the current, 90BUS02B
90BUS02C
ila, flowing through it. The voltage, v, of phase a at BUS 2 leads 9o m
the voltage, v,,, of phase a. The real power, Pr, delivered at the 9 OVRB
9 OVRC
receiving end decreases. The reactive power, Q,, delivered at the 90POS
receiving end becomes inductive. At 200 ms, the injected voltage 90NEG
91INVOlA
request is kept at 0.2 per unit while the angle p is changed to 60'. 91INVOlB
The real power that is absorbed f?om the line by the series inverter 91INVOlC
91INV02A
flows to BUS 1 through the STATCOM. The shunt inverter output 91INV02B
voltage, el,, of phase a is in phase with the current, ila, flowing 91INVO2C
91BUS03A
through it. The reactive power, Qr, delivered at the receiving end 91BUS03B
becomes capacitive. At 300 ms, the injected voltage request is 9lBUSO 3C
C BUS1 voltage computation
increased to 0.4 per unit while maintaining the same angle. The 99vlapu = BUSOlA / Vbasei
voltage, v, of phase a at BUS 2 lags the voltage, v,,, of phase a. The 99vlbpu = BUSOlB / Vbasei
 1459
99vlcpu = BUSOlC / Vbasei 99vlE1 = vDC / 2 poslEl - vDC / 2 * neglEl
99vlds = vlapu 99anlF1 = thetal + (-270.0 + 7.5) * CDR
99vlqs = -(vlapu t 2.0 * vlcpu) / SORT (3) 99anglF1 = anlFltTWOPI*(anlF1.LT.O.O)-TWOPI*(anlF1.GE.TWOPI)
C Phase-Lock-Loop (locked to phase a voltage of BUS1) 99poslF1 = ( (anglF1-gamnal).C;E.O) .AND. ( (anglF1-PItgammal).LT.O)
99PLLerr = vlqs * COS(PLLi) -
vlds '' SIN(PLLi) 99neglF1 = ((anglF1 - PI-gammal) .GE. 0) .AND. ((anglF1 -
99PLLint = PLLini t PLLerr * DELTA? TWOPItgammal) .LT. O!
99PLLdot = KPLLi * PLLint + KPLLp PLLerr 99vlF1 = VDC / 2 pOSlFl - vDC / 2 * neglFl
PLLini tPLLint 99anlD2 = thetal t (-30.0 .. 7.5) * CDR
99PLL = PLLi t PLLdqt DELTAT 99anglD2 = anlD2+TWOPI*(anlI)2.LT.O.O)-TWOPI*(anlD2.GE.TWOPI)
PLLi tPLL 99poslD2 = ( (anglD2-gammal).GE.O) .AND. ( (anglD2-PItgammal).LT.O)
99theta = PLL - TWOPI * TRUNC(PLL/'TWOPI) 99neglD2 = ((anglD2 -
PI-gammal) .GE. 0 ) .AND. ((anglD2 -
99COSPLL = COS (theta) TWOPItgammal) .LT. 0)
99SINPLL = SIN(theta) 99vlD2 = vDC / 2 * poslD2 - vDC / 2 * neglD2
99anlE2 = thetal + (-150.0 - 7.5) * CDR
C BUS2 voltage computation
99v2apu = BUSOZA / Vbasei 99anglE2 = anlE2tTWOPI*(anlEZ.LT.O.O)-TWOPI*(anlE2.GE.TWOPI)
99vZbpu = BUSOZB / Vbasei 99poslE2 =((anglE2-gammal).GE.O).AND.((anglE2-PI+garmnal).LT.O)
99v2cpu = BUS02C / Vbasei
C Injected voltage computation
-
99neglE2 = ((anglE2 PI-gammal) .GE. 0) .AND. ((anglE2
TWOPI+gamal) .LT. 0)
-
99v12apu = vlapu - v2apu 99vlE2 = VDC / 2 * pOslE2 - VDC / 2 neglE2
99v12bpu = vlbpu -vlbpu 99anlF2 = thetal t (-270.0 - 7.5) CDR
99v12cpu = vlcpu - v2cpu 99anglF2 = anlFZ+TWOPI* (anlF2.LT.O.O)-TWOPI* (anlFZ.GE.TWOP1)
C Receiving-end voltage computation 99poslF2 =((anglF2-gammal).GE.O).AND.((anglF2-PI+gammal).LT.O)
99vrapu = VRA / Vbasei 99neglF2 = ((anglF2 - PI-gammal) .GE. 0) .AND. ((anglF2 -
99vrbpu = VRB / Vbasei TWOPI+gammal) .LT. O!
99vrcpu = VRC / Vbasei 99vlF2 = vDC / 2 poslF2 - vDC / 2 * neglF2
C Line current computation C Magnetic Circuit
99iapu = BUS03A / Ibasei C Note: The signals vX, VY and VZ in Fig. 10 are renamed
99ib~u = BUS03B / Ibasei C as ela, elb and elc, respectively. The signals vX1, vY1 and
99icpu = BUS03C / Ibasei C vZ1 are renamed as elal, elbl and elc1,respectively.
C Shunt inverter current computation 99vlN1 = (VlAl + vlBl t vlC1) / 3
99ila = INVOlA 99vlAlN = vlAl - vlNl
99ilb = INVOlB 99vlBlN = vlBl - vlNl
99ilc = INVOlC 99vlClN = vlCl - vlNl
99ilapu = ila / Ibasei 99vlDlE1 = vlDl - vlEl
99ilbpu = ilb / Ibasei 99vlElF1 = vlEl - vlFl
99ilcpu = ilc / Ibasei 99vlFlD1 = vlFl - vlDl
99ilds = ilapu 99elal = (vlA1N + vlDlEl / SQRT(3)) / 2
99ilqs = -(ilapu + 2.0 * ilcpu) / SQRT(3) 99elbl = (VlBlN + VlElFl / SQRT(3)) / 2
99ild = ilds COSPLL + ilqs * SINPLL 99elcl = (vlClN + VlFlDl / SQRT(3)) / 2
99ilq = -ilds SINPLL + ilqs * COSPLL 99vlN2 = (vlA2 t vlB2 + vlC2) / 3
C Series inverter current computation 99vlA2N = vlA2 - vlN2
99i2a = INV02A 99vlB2N = vlB2 - vlN2
99i2b = INVOZB 99vlC2N = vlC2 - vlN2
99i2c = INVOZC 99vlD2E2 = vlD2 - vlE2
99vlE2F2 = vlE2 - vlF2
99vlF2D2 = vlF2 - vlD2
99elaZ = (vlA2N + vlD2E2 / SQRT(3)) / 2
demand 99elb2 = (vlB2N + vlE2F2 / SQRT(3)) / 2
99ilqcml- = TI 99elc2 = (v1CZN + vlF2D2 / SQRT(3)) / 2
99ilqcm2 = 2 * (TI1 C VSIl output voltage
99ilacm3 = 2 * (TIMEX .GE. 0.25) 99ela = (elal + ela2) / 2
* o 99elb = (elbl t elb2) / 2
99elc = (elcl + elc2) / 2
-. . 99elapu = ela / vbasei
1.0 0.0040 C Setting the SSSC voltage demand
C shunt-inverter-angle calculation 99v2cml = 0.2 * (TIMEX .GE. 0.100)
99ilqerr = (ilqref ilq)- MS1
99ilqint = ilqini + ilqerr * DELTAT
99v2cm2 = 0.2 * (TIMEX .GE. 0.300)
99v2dqcm = v2cml + v2cm2
ilqini +ilqint lv2dqrf +vZdqcm
99alpha = KpshI * ilqerr + KishI * ilqint 1.0
99gammal = 3.75 * CDR 1.0 0.0040
99fhal = theta + PI / 2 t alpha 99betal = 120** (TIMEX .GE. 0.100)
C This addition of PI/2 is because the gating signals are sine 99beta2 = 60 (TIMEX .GE. 0.200)
C reference and the Phase-Lock-Loop signals are cosine 99beta -
= (beta1 beta2) * CDR
C reference. 99cosga2 = v2dqrf / vDCpu / Kinv
99thetal = thal + TWOPI*(thal.LT.O.O) - TWOPI*(thal.GE.TWOPI) 99ga2d = cosga2 + 0.00000001
C Inverter Pole Voltages
99anlA1 = thetal + 7.5 * CDR
99ga2q = SQRT(1 -
cosgal * cosga2)
99gammaZ = ATAN(ga2q / ga2d)
99anglA1 = anlA1+TWOPI*~anlA1.LT.O.O)-TWOPI*(anlA1.GE.TWOPI) 99tha2 = theta + PI / 2 + beta
99poslA1 = ( (anglAl-gammal).GE.O) .AND. ( (anglAl-PI+gammal).LT.O) 99theta2 = tha2 + TWOPI*(tha2.LT.O.O) - TWOPI*(tha2.GE.TWOPI)
99neglA1 = ((anglA1 - PI-gammal) .GE. 0) .AND. ((anglAl - C Inverter Pole Voltages
TWOPItgammal) .LT. 0) 99an2A1 = theta2 + 7.5 * CDR
99vlA1 = vDC / 2 * poslAl - vDC / 2 neglAl 99ang2A1 = an2A1+TWOPI*(an2A1.LT.O.O)-TWOPI*(an2A1.GE.TWOPI)
99anlB1 = thetal t (-120.0 + 7 . 5 ) * CDR 99pos2A1 = ( (angZAl-gamma2).GE.O) .AND. ( (ang2Al-PI+gamaZ).LT.O)
99anglB1 = anlBl+TWOPI* (anlB1.LT.O.O)-TWOPI*(anlBl.GE.TWOPI)
99poslB1 = ( (anglB1-gammal).GE.O) .AND.( (anglB1-PI+gammal).LT.O) TWOPI+gammaZ) .LT. 0)
-
99neg2A1 = ((ang2Al PI-gamma2) .GE. 0 ) .AND. ((ang2Al -
99neglB1 = ((anglB1 - PI-gammal) .GE. 0) .AND. ((anglB1 - 99v2A1 = vDC / 2 posZAl - vDC / 2 * neg2Al
TWOPI+gammal) .LT. 0; 99an2B1 = theta2 + (-120.0 + 7 . 5 ) * CDR
99vlB1 = vDC / 2 poslBl - vDC / 2 * neglBl 99ang2B1 = an2Bl+TWOPI* (anZB1.LT.O.O)-TWOPI*(anZB1.GE.TWOPI)
99anlC1 = thetal + (-240.0 t 7 . 5 ) * CDR 99pos2B1 = ( (anglBl-gamma2).GE.O) .AND. ((angZB1-PItgamma2).LT.O)
99anglC1 = anlC1+TWOPI*~anlC1.LT.O.O)-TWOPI*(anlC1.GE.TWOPI) -
99neg2B1 = ((an9281 PI-gamma2) .GE. 0 ) .AND. ((ang2B1 -
99poslC1 = ( (anglC1-gammal).GE.O) .AND. ( (anglCl-PI+gammal).LT.O) TWOPItgamaZ) .LT. 0;
99neglC1 = ((anglC1 - PI-gammal) .GE. 0) .AND. ((anglC1 - 99v2B1 = vDC / 2 pos2Bl - vDC / 2 neg2Bl
TWOPI+aammal) .LT. 0) 99an2C1 = theta2 t (-240.0 t 7.5) CDR
99vlc1- = VDC / 2 * poslcl - VDC / 2 * neglcl 99ang2C1 = an2C1+TWOPI*(an2C1.LT.O.O)-TWOPI*(an2C1.GE.TWOPI)
99anlA2 = thetal - 7.5 CDR 99pos2Cl = ( (angZC1-gamma2).GE.O) .AND.( (ang2Cl-PItgamma2).LT.O)
99anglA2 = anlAZ+TWOPI*(anlA2.LT.O.O)-TWOPI* (anlA2.GE.TWOPI) 99neg2C1 = ((angZC1 - PI-gamma2) .GE. 0 ) .AND. ((angZC1 -
99poslA2 = ( (anglA2-gammal).GE.O) .AND. ((anglAZ-PI+gammal).LT.O) TWOPI+gamma2) .LT. 0)
-
99neglA2 = ((anglA2 PI-gammal) .GE. 0 ) .AND. ((anglA2 - 99v2C1 = vDC / 2 * pos2Cl - vDC / 2 * neg2Cl
TWOPI+gammal) .LT. O!
99vlA2 = vDC / 2 poslA2 - vDC / 2 neglA2
99an2A2 = theta2 -
7.5 * CDR
99ang2A2 = an2AZtTWOPI*(an2A2.LT.0.0)-TWOPI*(an2A2.GE.TWOPI)
99anlB2 = thetal + (-120.0 - 7 . 5 ) * CDR 99pos2A2 = ( (angZA2-gammaZ).GE.O) .AND. ( (angZAZ-PI+gammaZ).LT.O)
99anglB2 = anlB2+TWOPI*(anlB2.LT.O.O)-TWOPI*(anlB2.GE.TWOPI) 99neg2A2 = ((ang2A2 - PI-gamma2) .GE. 0) .AND. ((ang2A2 -
99poslB2 =((anglB2-gammal).GE.O).AND.((anglB2-PItgammal).LT.O) TWOPItgamma2) .LT. O!
99neglB2 = ((anglB2 - PI-gammal) .GE. 0 ) .AND. ((anglB2 - 99v2A2 = vDC / 2 pos2A2 - vDC / 2 * neg2A2
TWOPI+gammal) .LT. 0 ) 99an2B2 = theta2 + (-120.0 - 7.5) CDR
99vlB2 = VDC / 2 * poslB2 - VDC / 2 neglB2 99ang2B2 = an2B2+TWOPI*(an2B2.LT.O.O)-TWOPI*(an2B2.GE.TWOPI)
-
99anlC2 = thetal + (-240.0 7 . 5 ) * CDR 99pos2B2 =((ang2B2-gamma2).GE.O).AND.((ang2B2-PI+g~a2).LT.O)
99anglC2 = anlC2+TWOPI*(anlC2.LT.O.O)-TWOPI*(anlC2.GE.TWOPI) 99neg2B2 = ((ang2B2 - PI-gammal) .GE. 0) .AND. ((an9282 -
99poslC2 = ( (anglCZ-gammal).GE.O).AND.((anglC2-PI+gammal).LT.O) TWOPI+gammaZ) .LT. O!
99neglC2 = ((anglC2 - PI-gammal) .GE. 0 ) .AND. ((anglC2 - 99v2B2 = vDC / 2 pos2B2 - vDC / 2 * neg2B2
TWOPI+gammal) .LT. 0) 99an2C2 = theta2 + (-240.0 - 7.5) CDR
99vlCZ = vDC / 2 poslC2 - vDC / 2 * neglCZ 99ang2C2 = an2C2+TWOPI*(an2C2.LT.O.O)-TWOPI*(an2C2.GE.TWOPI)
99anlD1 = thetal t (-30.0 t 7.5) CDR
99anglD1 = anlD1+TWOPI*(anlDl.LT.O.O)-TWOPI*(a~lD1.GE.TWOPI)
99poslD1 = ( (anglD1-gammal).GE.O) .AND. ( (anglD1-PI+gammal).LT.O)
-
99posZC2 = ( (angZCZ-gamma2).GE.O) .AND. ( (anaZC2-PItaamma2)iLT.0)
99negzcz 3 ((angzcz PI-gammaz) .GE. 0 ) .AND. ((angzcz
TWOPI+gammaZ) .LT. 0)
-
99neglD1 = ((anglD1 PI-gammal) .GE. 0) .AND. ((anglD1 - 99v2CZ = vDC / 2 * pOS2C2 - vDC / 2 * negZC2
TWOPI+gammal) .LT. 0 ) 99an2D1 = theta2 + (-30.0 + 7.5) * CDR
99vlD1 -
= vDC / 2 * ~0slD1 vDC / 2 * nealDl
99anlE1 = thetal + 11150.0 + 7.5) * CDR
99ang2D1 = an2D1+TWOPI*(an2D1.LT.O.O)-TWOPI*(an2D1.GE.TWOPI)
99pos2D1 = ( (ang2Dl-gamma2).GE.O) .AND.( (ang2Dl-PI+gammaZ).LT.O)
99ingiE1 = aniEitTwoZI;laniE1.LT~o.o)~TwopI*(anlE1.GE.TWOPI) -
99neg2D1 = ((anglD1 PI-gamma2) .GE. 0 ) .AND. ((ang2D1 -
99poslE1 = ( (anglEl-gammal).GE.O).AND. ((anglEl-PI+gammal).LT.O) TWOPItgamma2) .LT. 0)
99neglEl = ((anglEl - PI-gammal) .GE. 0 ) .AND. ((anglEl - 99v2D1 = vDC / 2 * pos2Dl - vDC / 2 neg2Dl
TWOPI+gammal) .LT. 0) 99an2E1 = theta2 + (-150.0 + 7 . 5 ) * CDR
1460
99ang2E1 = an2E1+TWOPI*(an2E1.LT.O.O)-TWOPI*(an2El.GE.TWOPI) 9999
99pos2E1 = ( (ang2El-gama2) .GE.O) .AND.((angZEl-PI+gamma2).LT.O) lINVOZA 0.892723.679 1.0
99neg2E1 = ((ang2El - PI-gamma2) .GE. 0) .AND. ((ang2El - 2BUSOlABUS02A 0.892723.679 1.0
TWOPI+gammaZ) .LT. 0 ) TRANSFORMER T2B
__.-I- = vnC / 7 * ~ o s 2 E l- vDC / 2 * nea2El 9999
q qv?Pl
99an2F1 = t G t X + (t270.0 + 7.5) * CDR
99ang2F1 = an2F1+TWOPI*(an2F1.LT.O.O)-TWOPI*(an2F1.GE.TWOPI)
- 1INV02B
ZBUSOlBBUSOPB
0.892723.679
0.892723.679
1.0
1.0
99pos2F1 = ( (ang2Fl-gamma2).GE.O).AND. ((ang2Fl-PItgamma2).LT.O) TRANSFORMER T2C
99nea2F1 = ((anqZF1 - PI-gamma2) .GE. 0) .AND. ((angZF1 - 9999
TWOPf+gamma2) .L'i p-v..0. .
2-c. 0.892723.679 1.0
99v2F1 = vDC /'Zo! pos2F1 - vDC / 2 * neg2Fl LBUSOlCBUS02C 0.892723.679 1.0
99an2D2 = theta2 + (-30.0 - 7.5) * CDR BLANK RECORD ENDING BRANCHES
99ang2D2 = an2D2+TWOPI*(an2D2.LT.O.O)-TWOPI*(an2D2.GE.TWOPI) BUSOZABUSO3A MEASURING
99pos2D2 = ( (ang2DZ-gamma2).GE.O).AND. ((ang2DZ-PI+gamma2).LT.O) BUS02BBUS03B MEASURING
99neg2D2 = ((ang2D2 - PI-gamma2) .GE. 0) .AND. ((ang2D2 - BUSOPCBUSO3C MEASURING
TWOPI+gama2) .LT. 0) ela INVOlA MEASURING
99v2D2 = vDC / 2 * pos2D2 - vDC / 2 * neg2D2 elb INVOlB MEASURING
99an2E2 = theta2 + (-150.0 - 7.5) * CDR elc INVOlC MEASURING
99ang2E2 = an2E2+TWOPI*(an2E2.LT.0.0)-TWOPI*(an2E2.GE.TWOPI) INV02Ae22a MEASURING
99pos2E2 = ( (angZEZ-gamma2).GE.O).AND. ((ang2E2-PItgamma2).LT.O) INV02Be22b MEASURING
99neg2E2 = ((ang2E2 - PI-gamma2) .GE. 0) .AND. ((ang2E2 - INV02Ce22c MEASURING
TWOPI+gamma2) .LT. O! 13ella BUSOlA
99v2E2 = vDC / 2 pos2E2 - vDC / 2 * neg2E2 MS 1
99an2F2 = theta2 + (-270.0 - 7.5) * CDR 13ellb BUSOlB
99ang2F2 = anZFZ+TWOPI*(an2F2.LT.O.O)-TWOPI* (anZF2.GE.TWOPI) MS1
99pos2F2 = ( (ang2F2-gama2).GE.O).AND. ((angZFZ-PI+gammaZ).LT.O) 13ellc BUSOlC
-
99neg2F2 = ((ang2F2 PI-gamma2) .GE. 0) .AND. ((ang2F2 - MS1
13e2a e22a
TWOPI+gammaZ) .LT. 0)
99v2F2 = vDC / 2 * pos2F2 - vDC / 2 * neg2F2 ES2
C Magnetic Circuit 13e2b e22b
C Note: The signals vX, vY and VZ in Fig. 10 are renamed ES2
C as e2a, e2b and e2c, respectively. The signals vX1, vY1 and 13e2c e22c
C vZ1 are renamed as e2a1, e2bl and e2c1,respectively. ES2
99v2N1 = (v2A1 + v2B1 + v2C1) / 3 13e22a CLOSED
99v2AlN = v2A1 - v2N1 ES22
99v2BlN = v2B1 - v2N1 13e22b CLOSED
99v2ClN = v2C1 - v2N1 ES22
99v2DlE1 = v2D1 - v2E1 13e22c CLOSED
99v2ElF1 = v2E1 - v2F1 ES22
99v2FlD1 = v2F1 - v2D1 13BUSOlABUSOZA
99e2al = (v2AlN + v2DlEl / SQRT(3)) / 2 MS2
99e2bl = (vZB1N + v2ElFl / SQRT(3)) / 2 13BUSOlBBUS02B
99e2cl = (vZC1N + vZFlDl / SQRT(3)) / 2 MS 2
99v2N2
. . ~ = lv2A2 + v2B2 + v2C2) / 3
~
13BUSOlCBUSOZC
99v2A2N = v2A2 - v2N2 MS 2
. -~~~ = v2B2 - v2N2
99v7R7N
. BLANK RECORD ENDING SWITCHES
99v2C2N v2c2 - v2N2 60ela
99v2D2E2 v2D2 - v2E2 60elb
99v2E2F2 v2E2 - v2F2 60elc
99vZF2D2 v2F2 v2D2 - 60e2a
99e2a2 (v2A2N + v2D2E2 SQRT / 2
99e2b2 lv2B2N + v2E2F2 SQRT / 2
99e2c2 = (v2C2N + v2F2D2 SQRT / 2
C VSI2 output voltage
99e2a = (e2al + e2a2) / 0.00 -1.
99e2b = (e2bl + e2b2) / -120.00 -1.
99e2c = (e2cl + e2c2) / 120.00 -1.
99e2apu = e2a / Vbasei -20.00 -1.
c DC link capacitor voltage calculation -140.00 -1.
qqTmr = POS - NRG 100.00 -1.
99vDCpu = ZC / %;sei
99Pinl = ela * ila + elb * ilb + elc * ilc 2POS 94500.0
99iDC1 = (-Pin1 / vDC) * M S 1 2NEG -94500.0
99Pin2 = e2a * i2a + e2b * i2b + e2c * i2c 3POS NEG 189000 .o
99iDC2 = (Pin2 / vDC) * M S 1 BLANK RECORD ENDING NODE VOLTAGE OUTPUT
99iDCnet = iDCl + iDC2 BLANK RECORD ENDING PLOT
99iDCnl = iDCnet BEGIN NEW DATA CASE
99iDCnZ = -iDCnl BLANK RECORD ENDING ALL DATA CASES
.c Exchanged power between the SSSC and the transmission line
99Pinvpu =(vlZapu*iapu + vlZbpu*ibpu + vl2cpu*icpu) / 1.5 VI. ACKNOWLEDGMENT
9 9 0 i n w u =lvl2aou*ic~u- vlZcDu*iaDu) * SORTI3) / 1.5
C-iiecelveins-end'powe; calculation - ' ' '
The authors acknowledge EPRI, TVA and AEP for their ongoing
99Prpu = (vrapu*iapu + vrbpu*ibpu + vrcpu*icpu) / 1.5
99Qruu = (vrauu*icpu - vrcpu*iapu) * SQRT(~) / 1.5 support and pioneering spirit for developing FACTS technology.
C Setting up the-electronic switch&
. ~ _= ~
99ES22
. 0 _ W. REFERENCES
99ES2 = .NOT. ES22
C TACS Output [l] Advanced Static VAR Compensator Using Gate Turn-off
33ilqrefilq vDCpu elapu vlapu ilapu alpha
33e2apu vl2apuiapu Prpu Qrpu PinvpuQinvpu Thyristorsfor Utility Applications, L. Gpgyi, N. 6. Hingorani, P.
BLANK RECORD ENDING TACS R. Nannery and N. Tai, CIGRE paper No. 23-203,1990.
VSA BUSOlA 1.0053 19.73
VSB BUSOlBVSA BUSOlA [2] Vector Analysis and Control of Advanced Static VAR
VSC BUSOlCVSA BUSOlA Compensators, C. D. Schauder and H. Mehta, IEE
BUS03AVRA 3.0159 59.19
BUS03BVRB BUS03AVRA PROCEEDINGS-C, Vol 140, NO.4, July 1993.
BUS03CVRC BUS03AVRA [3] Static Synchronous Series Compensator: A Solid-state
POS NEG 42.0+0
iDCnl POS 0.001 Approach to the Series Compensation of Transmission Lines, L.
iDCnl 1* 00+8 Gyugyi, C. D. Schauder and K. K. Sen, 96 WM 120-6 PWRD,
iDCn2 NEG 0.001
iDCnZ 1.00+5 IEEE PES Winter Meeting, 1996.
ella BUSOlA l.OOc8
ellb BUSOlB 1.00+8
[4] A Unified Power Flow Control Conceppt for FZexibZe AC
ellc BUSOlC 1.00+8 Transmission Systems, L. Gyugyi, B E PROCEEDINGS-C, Vol
e2a e22a 1.00+8 139, No. 4,July 1992.
e2b e22b 1.OOt8
e2c e22c 1.00+8 [5] The UniJied Power Flow Controller: A New Approach to
e22a 1.00+8 Power Transmission Control,'' L. Gyugyi, C. D. Schauder, S. L.
e22b 1.00+8
e22c 1.00+8 Williams, T. R. Rietman, D. R. Torgerson, and A. Edris, 94 SM
TRANSFORMER T1A 474-7 PWRD, IEEE PES Summer Meeting, 1994.
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lINV0lA 0.892723.679 1.0 [6] Operation of the Unified Power Flow Controller (UPFC)
2ella 0.892723.679 1.0 Under Practical Constraints, C. D. Schauder, L. Gpgyi, M. R.
TRANSFORMER T1B
9999 Lund, D. M. Hamai, T. R. Rietman, D. R. Torgerson and A. Edris,
lINVOlB 0.892723.679 1.0 PE-511-PWRD-0-11-1996,IEEE PES Winter Meeting, New York.
2ellb 0.892723.679 1.0
TRANSFORMER T1C [7] SSSC - Static Synchronous Series Compensator: Theov,
lINV0lC
9999
0.892723.679 1.0
Modeling, and Applications, K. K. Sen, PE-862-PWRD-0-04-
2ellc 0.892723.679 1.0 1997, IEEE PES Summer Meeting, Berlin, Gemany.
TRANSFORMER T2A