Compal Confidential: Q5LJ1 M/B Schematics Document

A B C D E
Compal Confidential
Model Name : Q5LJ1(MA51-HX)
File Name : LA-8203P
1 1
BOM P/N:43
Compal Confidential
2 2
Q5LJ1 M/B Schematics Document

Intel Ivy Bridge ULV Processor + Panther Point PCH
Nvidia N13P-GS
3 2012-05-08 3
REV:1.0
4 4
A
Dr-Bios.com
B
Security Classification
Issued Date 2011/06/24
Compal Secret Data
Deciphered Date 2012/07/12 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C D
Date:
4019J1
Compal Electronics, Inc.
Size Document Number

SCHEMATIC MB A8203
Thursday, June 14, 2012

E
Sheet 1 of 56
Rev
C
A B C D E
204pin DDRIII-SO-DIMM X1
Fan Control BANK 0, 1, 2, 3 page 11,12
page 38
Memory BUS(DDRIII)
Intel
PCI-E 2.0x16 5GT/s PER LANE Dual Channel
1 PEG(DIS) 1
Nvidia CLK=100MHz Sandy/Ivy Bridge 1.5V DDRIII 1066/1333 DDRIII-ON BOARD 2G 1Rx16
N13P GS ULV Processor
with GDDR5 eDP(UMA/OPTIMUS)
BGA1023
page22~28 page 4~10
FDI x8 DMI x4 USB 3.0 USB 2.0 MINI Card CMOS

conn x2 conn x1 BT Camera
USB port 0,1 USB port 9 USB port 8 USB port 10
HDMI Conn. eDP Conn. CLK=100MHz CLK=100MHz
page 34 page 34 page 36 page 28
page 29 page 28 2.7GT/s 2.5GB/s x4
USBx14 3.3V 48MHz
Intel
2 HD Audio 3.3V 24MHz 2
TMDS(UMA/OPTIMUS) Panther Point-M

PCH SPI
PCI-Express x 8 (PCIE2.0 5GT/s) CLK=100MHz HDA Codec
989pin BGA ALC271X-VB6
port 1 port 2 port 3 SATA x 6 (GEN2 3.0GT/S ,GEN3 6GT/S) CLK=100MHz LPC page 38
page 13~21
LAN(GbE) MINI Card Card reader

Boardcom WLAN GEN3 GEN3 GEN2
57780 page 34 page 36 page 35 port 1 port 0 port 2 TPM SPI ROM x2 Int. Speaker Combo Jack
page 39 page 13 page 37 page 37
mSATA SATA HDD SATA CDROM
MINI Card Conn. Conn.
USB port 12 page 33 page 30 page 30 LPC BUS
3 3
CLK=33MHz
ENE
RTC CKT. LS-8201P KB9012/KB930
page 35
page 13 PWR/B
page 36
Power On/Off CKT. Touch Pad Int.KBD

page 36 page 36
page 36
DC/DC Interface CKT.

page 39,40 EC ROM x1
4
(KB930)
page 36 4
Power Circuit DC/DC
Dr-Bios.com
page 41~53
Security Classification Compal Secret Data Compal Electronics, Inc.
2011/06/24 2012/07/12 Title
Issued Date Deciphered Date SCHEMATIC MB A8203
Size Document Number Rev
Custom C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019J1
Date: Thursday, June 14, 2012 Sheet 2 of 56
A B C D E
A B C D E
Voltage Rails AC AC AC AC DC DC DC SIGNAL

STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Power Plane Description S0 S3 S4 S5 DS3 DS4 DS5
+RTCVCC RTC power ON ON ON ON ON ON ON Full ON HIGH HIGH HIGH HIGH ON ON ON ON
VIN Adapter power supply (19V) N/A ON ON ON OFF OFF OFF
S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
BATT+ Battery power supply (12.6V) N/A N/A N/A N/A ON ON ON
B+ AC or battery power rail for power circuit. ON ON ON ON ON ON ON S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
+VSB +VSBP to +VSB always on power rail for sequence control ON ON OFF OFF OFF OFF OFF
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
1
+CPU_CORE Core voltage for CPU ON OFF OFF OFF OFF OFF OFF 1
+VGFX_CORE Core voltage for UMA graphic ON OFF OFF OFF OFF OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+5VALW +5VALWP to +5VALW power rail ON ON ON ON ON ON ON
Board ID / SKU ID Table for AD channel
+5VALW_PCH +5VALW to +5VALW_PCH power rail for PCH ON ON ON OFF OFF OFF OFF
+5VS +5VALW to +5VS switched power rail ON OFF OFF OFF OFF OFF OFF
Vcc 3.3V +/- 5%
+3VALW +3VALW always on power rail ON ON ON ON ON ON ON
Ra/Rc/Re 100K +/- 5%
Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
+3VALW_PCH +3VALW to +3VALW_PCH power rail for PCH ON ON ON OFF OFF OFF OFF
+3VS +3VALW to +3VS power rail ON OFF OFF OFF OFF OFF OFF
0 0 0 V 0 V 0 V
+VCCSA +VCCSA POWER RAIL TO CPU ON OFF OFF OFF OFF OFF OFF
1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+1.8VS +3VALW to 1.8V switched power rail to PCH & GPU ON OFF OFF OFF OFF OFF OFF
2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+1.5V +1.5VP to +1.5V power rail for DDRIII ON ON OFF OFF ON OFF OFF
3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+1.5VS +1.5V to +1.5VS switched power rail ON OFF OFF OFF OFF OFF OFF
4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+1.05VS_VTT +1.05VS_VTTP to +1.05VS_VTT switched power rail for CPUON OFF OFF OFF OFF OFF OFF
5 100K +/- 5% 1.453 V 1.650 V 1.759 V
+0.75VS +0.75VP to +0.75VS switched power rail for DDR terminator ON OFF OFF OFF OFF OFF OFF
6 200K +/- 5% 1.935 V 2.200 V 2.341 V
+3V_LAN LAN CHIP POWER RAIL ON ON ON ON OFF OFF OFF
7 NC 2.500 V 3.300 V 3.300 V
+3VS_WLAN WLAN MODULE POWER RAIL ON OFF* OFF* OFF OFF OFF OFF
BOARD ID Table BTO Option Table
+USB3_VCCA USB SLEEP CHARGER & PORT0 POWER POWER RAIL ON* ON ON ON ON* ON* ON*
2
+USB3_VCCB/C USB PORT1/9 POWER POWER RAIL ON ON OFF OFF OFF OFF OFF
BTO Item BOM Structure 2
+3VSDGPU +3VS to +3VSDGPU power rail ON** OFF OFF OFF OFF OFF OFF
Board ID PCB Revision Unpop @
+VGA_CORE Core voltage for GPU ON** OFF OFF OFF OFF OFF OFF
0
+1.5VSDGPU +1.5V to +1.5VSDGPU switched power rail for GPU ON** OFF OFF OFF OFF OFF OFF
1 EC 9012 9012@
+1.05VSDGPU +1.05VSDGPU switched power rail for GPU ON** OFF OFF OFF OFF OFF OFF
2 0.1 EC 930 930@
Note : ON* WILL DEPEND ON BATTERY CAPACITY TO TURN ON OR OFF
3 0.2 Connector CONN@
Note : ON** Depend on Optimus ON/OFF. * 4 1.0 ALC281 281@
Note : OFF* Depend on IOAC SPEC support or not.
5 UMA Only UMAO@
6 OPT DIS@
EC SM Bus1 address EC SM Bus2 address 7
Device Address Device Address
Smart Battery 0001 011X b On Board Thermal Senser 1001_101xb
HR CPU I3-2367M I32367@ P.56
PCH SM Bus address USB Port Table HR CPU I3-2377M I32377@ P.56
Device Address 3 External HR CPU I5-2467M I52467@ P.56
USB 2.0 Port
ChannelA
ChannelB
DIMM0
DIMM0
A0 1010 000X JDIMM1(SPD)
On Board RAM(SPD)
USB Port
A4 1010 010X
0 USB Port(Right 2.0),USB Charger
CPU BOM Config
HR 1.4G SA000051H60 (S IC AV8062701047904 SR0CV J1 1.4G ABO!)
1 USB Port(Mid 2.0) CR CPU I3-3217M I33217@ P.56
I32367@ I3-2367M
3
HR 1.5G SA00005MX10 (S IC AV8062701048004 QAXQ J1 1.5G BGA)
2 CR CPU I5-3317M I53317@ P.56 3
I32377@ I3-2377M
3 CR CPU I7-3517M I73517@ P.56
I52467@ I5-2467M HR 1.6G SA00004X010 (S IC AV8062701047504 SR0D6 J1 1.6G ABO!) EHCI1
4
CR 1.8G SA00005L5C0(S IC AV8063801058401 SR0N9 L1 1.8G BGA 1023 ABO !)
5
I33217@ I3-3217U
CR 1.7G SA00005K6B0(S IC AV8063801058002 SR0N8 L1 1.7G ABO!)
6
I53317@ I5-3317U
CR 1.9G SA00005K5B0(S IC AV8063801057605 SR0N6 L1 1.9G BGA 1023 ABO !)
7
I73517@ I7-3517U
8 BT (WLAN) GDDR5 HYNIX MFR HYNMFR@ X76364BOL03 P.27
9 USB port(Left 2.0) GDDR5 HYNIX AFR HYNAFR@ X76364BOL04 P.27
10 Camera DRAM RAM@ for X76 RAM GPIO P.18
EHCI2
GPU BOM Config + GPIO 11 Mini Card(MSATA) DRAM HYNIX HYNIX@ for X76364BOL11: P.56
N13P-GS-A2 R3 SA0000518A0 (S IC N13P-GS-A2 FCBGA 908P GPU ABO !) 12 DRAM ELPIDA ELPIDA@ for X76364BOL12: P.56
13 VRAM X76 VRAM@ MB VRAM X76 P.56
VRAM BOM Config
GDDR5 64*32 2G SA00004GD30(S IC D5 64M32/2.5G H5GQ2H24MFR-T2C ABO!) HYNMFR@/
DRAM X76 DRAM@ MB DRAM X76 P.56
X76364BOL03: 1G HYN
GDDR5 64*32 2G SA00004GD50(S IC D5 64M32/2.5G H5GQ2H24AFR-T2C ABO!) HYNAFR@/
USB 3.0 Port
X76364BOL04: 1G HYN
1 USB Port(Right 3.0)
RAM BOM Config 2 USB Port(Mid 3.0)
XHCI
4
X76364BOL11: 2GB*4 HYNIX HYNIX 2GB 1333 SA00005FV10(S IC D3 256MX16/1333 H5TC4G63MFR-H9A FBGA 96P ABO !)RAM@//HYNIX@/ 3 4
X76364BOL12: 2GB*4 ELPDIA ELPDIA 2GB 1333 SA000059110(S IC D3 256M16 EDJ4216EBBG-DJ-F ABO!) RAM@//ELPIDA@/ 4
BOM Config
LA8203 UMA :
LA8203 Optimus :
A
9012@/UMAO@/DRAM@/
9012@/DIS@/DRAM@/VRAM@/
Dr-Bios.com
+CPU config
+CPU config
B
Compal Secret Data
C D

Date:
4019J1
SCHEMATIC MB A8203

E
Sheet 3 of 56
Rev
C
A B C D E
PEG_ICOMPI and RCOMPO signals should be

shorted and routed
+1.05VS_VTT with - max length = 500 mils - typical
impedance = 43 mohms
PEG_ICOMPO signals should be routed with -
1
R249 max length = 500 mils
24.9_0402_1%
- typical impedance = 14.5 mohms
UCPU1A
W=12mil L=500mil S=15mil
2
1 G3 PEG_COMP 1
PEG_ICOMPI
PEG_ICOMPO G1
15 DMI_CRX_PTX_N0 M2 DMI_RX#[0] PEG_RCOMPO G4
PEG_GTX_HRX_N[0..15] 22 15 DMI_CRX_PTX_N1 P6 DMI_RX#[1]
PEG_GTX_HRX_P[0..15] 22 15 DMI_CRX_PTX_N2 P1 DMI_RX#[2]
15 DMI_CRX_PTX_N3 P10 H22 PEG_GTX_C_HRX_N15 C262 1 2 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_N15
DMI_RX#[3] PEG_RX#[0] PEG_GTX_C_HRX_N14 C244 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_N14
PEG_HTX_C_GRX_N[0..15] 22 PEG_RX#[1] J21 1 2
15 DMI_CRX_PTX_P0 N3 B22 PEG_GTX_C_HRX_N13 C264 1 2 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_N13
PEG_HTX_C_GRX_P[0..15] 22 DMI_RX[0] PEG_RX#[2]
15 DMI_CRX_PTX_P1 P7 D21 PEG_GTX_C_HRX_N12 C246 1 2 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_N12
DMI_RX[1] PEG_RX#[3]
DMI
15 DMI_CRX_PTX_P2 P3 A19 PEG_GTX_C_HRX_N11 C267 1 2 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_N11
DMI_RX[2] PEG_RX#[4] PEG_GTX_C_HRX_N10 C248 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_N10
15 DMI_CRX_PTX_P3 P11 DMI_RX[3] PEG_RX#[5] D17 1 2
B14 PEG_GTX_C_HRX_N9 C268 1 2 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_N9
PEG_RX#[6] PEG_GTX_C_HRX_N8 C250 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_N8
15 DMI_CTX_PRX_N0 K1 DMI_TX#[0] PEG_RX#[7] D13 1 2
M8 A11 PEG_GTX_C_HRX_N7 C270 1 2 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_N7
15 DMI_CTX_PRX_N1 DMI_TX#[1] PEG_RX#[8]
N4 B10 PEG_GTX_C_HRX_N6 C252 1 2 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_N6
R2 G8 PEG_GTX_C_HRX_N5 C272 1 2 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_N5
A8 PEG_GTX_C_HRX_N4 C254 1 2 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_N4
PEG_RX#[11] PEG_GTX_C_HRX_N3 C274 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_N3
15 DMI_CTX_PRX_P0 K3 DMI_TX[0] PEG_RX#[12] B6 1 2
M7 H8 PEG_GTX_C_HRX_N2 C257 1 2 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_N2
15 DMI_CTX_PRX_P1 DMI_TX[1] PEG_RX#[13]
P4 E5 PEG_GTX_C_HRX_N1 C276 1 2 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_N1
T3 K7 PEG_GTX_C_HRX_N0 C259 1 2 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_N0
K22 PEG_GTX_C_HRX_P15 C263 1 2 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_P15
PEG_RX[0] PEG_GTX_C_HRX_P14 C245 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_P14
PEG_RX[1] K19 1 2
C21 PEG_GTX_C_HRX_P13 C265 1 2 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_P13
15 FDI_CTX_PRX_N0 U7 FDI0_TX#[0] PEG_RX[3] D19 1 2
W11 C19 PEG_GTX_C_HRX_P11 C266 1 2 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_P11
15 FDI_CTX_PRX_N1 FDI0_TX#[1] PEG_RX[4]
W1 D16 PEG_GTX_C_HRX_P10 C249 1 2 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_P10
AA6 C13 PEG_GTX_C_HRX_P9 C269 1 2 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_P9
2 W6 D12 PEG_GTX_C_HRX_P8 C251 1 2 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_P8 2
15 FDI_CTX_PRX_N4 FDI1_TX#[0] PEG_RX[7] PEG_GTX_C_HRX_P7 C271 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_P7
PCI EXPRESS -- GRAPHICS

15 FDI_CTX_PRX_N5 V4 FDI1_TX#[1] PEG_RX[8] C11 1 2
Y2 C9 PEG_GTX_C_HRX_P6 C253 1 2 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_P6
AC9 F8 PEG_GTX_C_HRX_P5 C273 1 2 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_P5
Intel(R) FDI
C8 PEG_GTX_C_HRX_P4 C255 1 2 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_P4
PEG_RX[12] C5 1 2
U6 H6 PEG_GTX_C_HRX_P2 C256 1 2 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_P2
15 FDI_CTX_PRX_P0 FDI0_TX[0] PEG_RX[13]
W10 F6 PEG_GTX_C_HRX_P1 C277 1 2 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_P1
W3 K6 PEG_GTX_C_HRX_P0 C258 1 2 DIS@ 0.22U_0402_6.3V6K PEG_GTX_HRX_P0
15 FDI_CTX_PRX_P3 AA7 FDI0_TX[3]
W7 G22 PEG_HTX_GRX_N15 C597 1 2 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_N15
15 FDI_CTX_PRX_P4 FDI1_TX[0] PEG_TX#[0]
T4 C23 PEG_HTX_GRX_N14 C576 1 2 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_N14
AA3 D23 PEG_HTX_GRX_N13 C594 1 2 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_N13
AC8 F21 PEG_HTX_GRX_N12 C574 1 2 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_N12
H19 PEG_HTX_GRX_N11 C593 1 2 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_N11
+1.05VS_VTT PEG_TX#[4] PEG_HTX_GRX_N10 C572 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_N10
15 FDI_FSYNC0 AA11 FDI0_FSYNC PEG_TX#[5] C17 1 2
eDP_COMPIO and ICOMPO signals 15 FDI_FSYNC1 AC12 FDI1_FSYNC PEG_TX#[6] K15 PEG_HTX_GRX_N9 C591 1 2 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_N9
F17 PEG_HTX_GRX_N8 C570 1 2 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_N8
should be shorted near balls and 15 FDI_INT U11
PEG_TX#[7]
FDI_INT PEG_TX#[8]
routed with typical impedance PEG_TX#[9] A15 PEG_HTX_GRX_N6 C568 1 2 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_N6
1
AA10 J14 PEG_HTX_GRX_N5 C587 1 2 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_N5

<25 mohms R247
15 FDI_LSYNC0
AG8
FDI0_LSYNC PEG_TX#[10]
H13 PEG_HTX_GRX_N4 C566 1 2 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_N4
15 FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11]
can't be left floating 24.9_0402_1% PEG_TX#[12] M10 PEG_HTX_GRX_N3 C584 1 2 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_N3
,even if disable eDP function... PEG_TX#[13] PEG_HTX_GRX_N1 C582 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_N1
W=12mil L=500mil S=15mil D9 1 2
2
PEG_TX#[14] PEG_HTX_GRX_N0 C562 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_N0

PEG_TX#[15] J4 1 2
EDP_COMP AF3 eDP_COMPIO PEG_HTX_GRX_P15 C596 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_P15
AD2 eDP_ICOMPO PEG_TX[0] F22 1 2
EDP_HPD# AG11 A23 PEG_HTX_GRX_P14 C575 1 2 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_P14
3 eDP_HPD# PEG_TX[1] PEG_HTX_GRX_P13 C595 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_P13 3
PEG_TX[2] D24 1 2
E21 PEG_HTX_GRX_P12 C573 1 2 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_P12
PEG_TX[3] PEG_HTX_GRX_P11 C592 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_P11
29 EDP_AUXN AG4 eDP_AUX# PEG_TX[4] G19 1 2
Add eDP circuit 29 EDP_AUXP AF4 eDP_AUX PEG_TX[5] B18
K17
PEG_HTX_GRX_P10
PEG_HTX_GRX_P9
C571
C590
1
1
2
2
DIS@
DIS@
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
PEG_HTX_C_GRX_P10
PEG_HTX_C_GRX_P9
PEG_TX[6]
eDP
G17 PEG_HTX_GRX_P8 C569 1 2 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_P8
+1.05VS_VTT PEG_TX[7] PEG_HTX_GRX_P7 C588 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_P7
29 EDP_TXN0 AC3 eDP_TX#[0] PEG_TX[8] E14 1 2
AC4 C15 PEG_HTX_GRX_P6 C567 1 2 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_P6
eDP_TX#[1] PEG_TX[9] PEG_HTX_GRX_P5 C586 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_P5
AE11 eDP_TX#[2] PEG_TX[10] K13 1 2
1
AE7 G13 PEG_HTX_GRX_P4 C565 1 2 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_P4

R250 eDP_TX#[3] PEG_TX[11] PEG_HTX_GRX_P3 C585 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_P3
PEG_TX[12] K10 1 2
1K_0402_5% AC1 G10 PEG_HTX_GRX_P2 C563 1 2 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_P2
29 EDP_TXP0 eDP_TX[0] PEG_TX[13]
AA4 D8 PEG_HTX_GRX_P1 C583 1 2 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_P1
eDP_TX[1] PEG_TX[14] PEG_HTX_GRX_P0 C561 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_P0
AE10 K4 1 2
2
eDP_TX[2] PEG_TX[15]
AE6 eDP_TX[3]
29 EDP_HPD# EDP_HPD#
IVY-BRIDGE_BGA1023
@
Typ- suggest 220nF. The change in AC capacitor
value from 100nF to 220nF is to enable
compatibility with future platforms having PCIE
Gen3 (8GT/s)
4 4
A
Dr-Bios.com B
Compal Secret Data
Deciphered Date
C
2012/07/12

Custom
D
Title
Date:
4019J1
SCHEMATIC MB A8203

E
Sheet 4 of 56
Rev
C
A B C D E
0921 LVDS@->@ +1.05VS_VTT
CLK_CPU_DPLL# R517 2 @ 1 1K_0402_5%
CLK_CPU_DPLL R516 2 @ 1 1K_0402_5%
Checklist1.5 P.67 Graphis Disable Guide

DIS only SKU eDP disable
1
DPLL_REF_SSCLK PD 1K_5% to GND 1
DPLL_REF_SSCLK# PH 1K_5% to +1.05VS_VTT
UCPU1B
PROC_SELECT#
PCH->CPU PH VCPLL and connect to PCH DF_TVS BCLK J3 CLK_CPU_DMI 14
BCLK# H2 CLK_CPU_DMI# 14
UNCOREPWRGOOD:非CORE外的電OK
MISC
CLOCKS
SM_DRAMPWROK:DRAM power ok 17 H_SNB_IVB# F49 PROC_SELECT#
AG3 CLK_CPU_DPLL
DPLL_REF_CLK CLK_CPU_DPLL 14
RESET#:都ok後請CPU做reset DPLL_REF_CLK# AG1 CLK_CPU_DPLL#
CLK_CPU_DPLL# 14
C57 PROC_DETECT#
偵測CPU有無安裝 SM_RCOMP0,SM_RCOMP1
Follow DG 1.5& Tacoma_Fall2 1.0 W=20mil L=500mil S=13mil
reserve XBOX 三紅功能 T33 PAD @ H_CATERR# C49 SM_RCOMP2
CATERR#
W=15mil L=500mil S=13mil
THERMAL
@
C614 2 1 0.1U_0402_16V4Z H_CPUPWRGD
follow Checklist 1.5 H_PECI A48 AT30 SM_DRAMRST#
18,36 H_PECI PECI SM_DRAMRST# SM_DRAMRST# 6
R292 2 1 10K_0402_5% +1.05VS_VTT R534 2 1 62_0402_5% R533
56_0402_5% BF44 SM_RCOMP0 R272 2 1 140_0402_1%
DDR3
MISC
H_PROCHOT# H_PROCHOT#_R SM_RCOMP[0] SM_RCOMP1 R273
36,43 H_PROCHOT# 1 2 C45 PROCHOT# SM_RCOMP[1] BE43 2 1 25.5_0402_1%
BG43 SM_RCOMP2 R267 2 1 200_0402_1%
SM_RCOMP[2]
2 DDR3 Compensation Signals 2

18 H_THRMTRIP# D45 THERMTRIP#
Follow DG 1.5 & Tacoma_Fall2 1.0 Use open drain logic gate:
PRDY# N53
Buffered reset to CPU +1.05VS_VTT PH pop 75ohm N55
+3VS PREQ#
series resister pop 43ohm XDP_TCK @ PAD T19
TCK L56
L55 XDP_TMS @ PAD T20
+1.05VS_VTT TMS
PWR MANAGEMENT
J58 XDP_TRST# @ PAD T21
TRST#
1
JTAG & BPM

C617 C48 M60 XDP_TDI @ PAD T34
15 H_PM_SYNC PM_SYNC TDI
1
0.1U_0402_16V4Z L59 XDP_TDO @ PAD T35

R546 TDO
2 75_0402_5%
R550 18 H_CPUPWRGD 1 2 H_CPUPWRGD_R B46 UNCOREPWRGOOD
5
0_0402_5% U45 R544 R305 0_0402_5% K58 XDP_DBRESET# XDP_DBRESET# 15

2
@ 43_0402_1% DBR#
1 2 1 UNCOREPWRGOOD:非CORE外的電OK
P
NC BUFO_CPU_RST# BUF_CPU_RST#
Y 4 1 2
17,32,33,36,37 PLT_RST# PLT_RST# 2 PM_DRAM_PWRGD_R BE45 G58
A SM_DRAMPWROK BPM#[0]
G
BPM#[1] E55
SN74LVC1G07DCKR_SC70-5 E59
3
BPM#[2]
SM_DRAMPWROK:DRAM power ok BPM#[3] G55
BPM#[4] G59
BUF_CPU_RST# D44 H60
RESET# BPM#[5]
RESET#:都ok後請CPU做reset BPM#[6] J59
BPM#[7] J61
Follow DG 1.5 & Tacoma_Fall2 1.0
3 +3VALW Use open drain logic gate: 3
+1.5V_CPU_VDDQ PH pop 200ohm
+1.5V_CPU_VDDQ
series resister pop 130ohm +3VS
1
C228 IVY-BRIDGE_BGA1023
1
0.1U_0402_16V4Z @ XDP_DBRESET# R312 2 1 1K_0402_5%

R238
2 200_0402_5% Tacoma_Fall2 1.0 PH 1K +3VS
Check list 1.5 PH 1K +3VS
2
5
U18
Debug port DG1.1-1.3 50~5K ohm
1
G VCC
15 SYS_PWROK B
4 PM_SYS_PWRGD_BUF 1 2 PM_DRAM_PWRGD_R
Y R237 130_0402_5%
15 PM_DRAM_PWRGD 2 A
MC74VHC1G09DFT2G_SC70-5
3
4 4
Dr-Bios.com
2011/06/24 2012/07/12 Title
Custom C
A B C D E
A B C D E
UCPU1C UCPU1D
11 DDR_A_D[0..63] 12 DDR_B_D[0..63]
DDR_A_D0 AG6 DDR_B_D0 AL4
DDR_A_D1 SA_DQ[0] DDR_B_D1 SB_DQ[0]
AJ6 SA_DQ[1] SA_CK[0] AU36 SA_CLK_DDR0 11 AL1 SB_DQ[1] SB_CK[0] BA34 DDR_B_CLK0 12
DDR_A_D2 AP11 AV36 DDR_B_D2 AN3 AY34
SA_DQ[2] SA_CK#[0] SA_CLK_DDR#0 11 SB_DQ[2] SB_CK#[0] DDR_B_CLK0# 12
DDR_A_D3 AL6 AY26 DDR_B_D3 AR4 AR22
SA_DQ[3] SA_CKE[0] DDRA_CKE0_DIMMA 11 SB_DQ[3] SB_CKE[0] DDR_B_CKE0 12
DDR_A_D4 AJ10 DDR_B_D4 AK4
1 DDR_A_D5 SA_DQ[4] DDR_B_D5 SB_DQ[4] 1
AJ8 SA_DQ[5] AK3 SB_DQ[5]
DDR_A_D6 AL8 DDR_B_D6 AN4
AL7 SA_DQ[7] AR1 SB_DQ[7]
DDR_A_D8 AR11 DDR_B_D8 AU4
AP6 SA_DQ[9] SA_CK[1] AT40 SA_CLK_DDR1 11 AT2 SB_DQ[9] SB_CK[1] BA36
DDR_A_D10 AU6 AU40 DDR_B_D10 AV4 BB36
SA_DQ[10] SA_CK#[1] SA_CLK_DDR#1 11 SB_DQ[10] SB_CK#[1]
DDR_A_D11 AV9 BB26 DDR_B_D11 BA4 BF27
SA_DQ[11] SA_CKE[1] DDRA_CKE1_DIMMA 11 SB_DQ[11] SB_CKE[1]
DDR_A_D12 AR6 DDR_B_D12 AU3
AP8 SA_DQ[13] AR3 SB_DQ[13]
DDR_A_D14 AT13 DDR_B_D14 AY2
AU13 SA_DQ[15] BA3 SB_DQ[15]
DDR_A_D16 BC7 DDR_B_D16 BE9
BB7 SA_DQ[17] SA_CS#[0] BB40 DDRA_CS0_DIMMA# 11 BD9 SB_DQ[17] SB_CS#[0] BE41 DDR_B_CS0# 12
DDR_A_D18 BA13 BC41 DDR_B_D18 BD13 BE47
SA_DQ[18] SA_CS#[1] DDRA_CS1_DIMMA# 11 SB_DQ[18] SB_CS#[1]
DDR_A_D19 BB11 DDR_B_D19 BF12
BA7 SA_DQ[20] BF8 SB_DQ[20]
DDR_A_D21 BA9 DDR_B_D21 BD10
BB9 SA_DQ[22] BD14 SB_DQ[22]
DDR_A_D23 AY13 DDR_B_D23 BE13
AV14 SA_DQ[24] SA_ODT[0] AY40 SA_ODT0 11 BF16 SB_DQ[24] SB_ODT[0] AT43 DDR_B_ODT0 12
DDR_A_D25 AR14 BA41 DDR_B_D25 BE17 BG47
SA_DQ[25] SA_ODT[1] SA_ODT1 11 SB_DQ[25] SB_ODT[1]
AR19 SA_DQ[27] BE21 SB_DQ[27]
DDR_A_D28 BA14 DDR_B_D28 BE14
AU14 SA_DQ[29] BG14 SB_DQ[29]
DDR_A_D30 BB14 DDR_B_D30 BG18
SA_DQ[30] DDR_A_DQS#[0..7] 11 SB_DQ[30] DDR_B_DQS#[0..7] 12
DDR_A_D31 BB17 AL11 DDR_A_DQS#0 DDR_B_D31 BF19 AL3 DDR_B_DQS#0
DDR_A_D32 SA_DQ[31] SA_DQS#[0] DDR_A_DQS#1 DDR_B_D32 SB_DQ[31] SB_DQS#[0] DDR_B_DQS#1
BA45 SA_DQ[32] SA_DQS#[1] AR8 BD50 SB_DQ[32] SB_DQS#[1] AV3
DDR_A_D33 AR43 AV11 DDR_A_DQS#2 DDR_B_D33 BF48 BG11 DDR_B_DQS#2
AW48 SA_DQ[34] SA_DQS#[3] AT17 BD53 SB_DQ[34] SB_DQS#[3] BD17
DDR_A_D35 BC48 AV45 DDR_A_DQS#4 DDR_B_D35 BF52 BG51 DDR_B_DQS#4
BC45 SA_DQ[36] SA_DQS#[5] AY51 BD49 SB_DQ[36] SB_DQS#[5] BA59
2 DDR_A_D37 DDR_A_DQS#6 DDR_B_D37 DDR_B_DQS#6 2
AR45 AT55 BE49 AT60
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY B

AT48 SA_DQ[38] SA_DQS#[7] AK55 BD54 SB_DQ[38] SB_DQS#[7] AK59
BA49 SA_DQ[40] BF56 SB_DQ[40]
DDR_A_D41 AV49 DDR_B_D41 BE57
BB51 SA_DQ[42] BC59 SB_DQ[42]
DDR_A_D43 AY53 DDR_B_D43 AY60
BB49 SA_DQ[44] DDR_A_DQS[0..7] 11 BE54 SB_DQ[44]
DDR_A_D45 AU49 AJ11 DDR_A_DQS0 DDR_B_D45 BG54
SA_DQ[45] SA_DQS[0] SB_DQ[45] DDR_B_DQS[0..7] 12
DDR_A_D46 BA53 AR10 DDR_A_DQS1 DDR_B_D46 BA58 AM2 DDR_B_DQS0
DDR_A_D47 SA_DQ[46] SA_DQS[1] DDR_A_DQS2 DDR_B_D47 SB_DQ[46] SB_DQS[0] DDR_B_DQS1
BB55 SA_DQ[47] SA_DQS[2] AY11 AW59 SB_DQ[47] SB_DQS[1] AV1
DDR_A_D48 BA55 AU17 DDR_A_DQS3 DDR_B_D48 AW58 BE11 DDR_B_DQS2
AV56 SA_DQ[49] SA_DQS[4] AW45 AU58 SB_DQ[49] SB_DQS[3] BD18
DDR_A_D50 AP50 AV51 DDR_A_DQS5 DDR_B_D50 AN61 BE51 DDR_B_DQS4
AP53 SA_DQ[51] SA_DQS[6] AT56 AN59 SB_DQ[51] SB_DQS[5] BA61
DDR_A_D52 AV54 AK54 DDR_A_DQS7 DDR_B_D52 AU59 AR59 DDR_B_DQS6
DDR_A_D53 SA_DQ[52] SA_DQS[7] DDR_B_D53 SB_DQ[52] SB_DQS[6] DDR_B_DQS7
AT54 SA_DQ[53] AU61 SB_DQ[53] SB_DQS[7] AK61
DDR_A_D54 AP56 DDR_B_D54 AN58
AP52 SA_DQ[55] AR58 SB_DQ[55]
DDR_A_D56 AN57 DDR_B_D56 AK58
AN53 SA_DQ[57] AL58 SB_DQ[57]
DDR_A_D58 AG56 DDR_B_D58 AG58
AG53 SA_DQ[59] AG59 SB_DQ[59]
DDR_A_D60 AN55 DDR_B_D60 AM60
SA_DQ[60] DDR_A_MA[0..15] 11 SB_DQ[60] DDR_B_MA[0..15] 12
DDR_A_D61 AN52 BG35 DDR_A_MA0 DDR_B_D61 AL59 BF32 DDR_B_MA0
DDR_A_D62 SA_DQ[61] SA_MA[0] DDR_A_MA1 DDR_B_D62 SB_DQ[61] SB_MA[0] DDR_B_MA1
AG55 SA_DQ[62] SA_MA[1] BB34 AF61 SB_DQ[62] SB_MA[1] BE33
DDR_A_D63 AK56 BE35 DDR_A_MA2 DDR_B_D63 AH60 BD33 DDR_B_MA2
SA_DQ[63] SA_MA[2] DDR_A_MA3 SB_DQ[63] SB_MA[2] DDR_B_MA3
SA_MA[3] BD35 SB_MA[3] AU30
AT34 DDR_A_MA4 BD30 DDR_B_MA4
SA_MA[4] DDR_A_MA5 SB_MA[4] DDR_B_MA5
SA_MA[5] AU34 SB_MA[5] AV30
BB32 DDR_A_MA6 BG30 DDR_B_MA6
11 DDR_A_BS0 BD37 SA_BS[0] SA_MA[7] AT32 12 DDR_B_BS0 BG39 SB_BS[0] SB_MA[7] BD29
3 DDR_A_MA8 DDR_B_MA8 3
11 DDR_A_BS1 BF36 SA_BS[1] SA_MA[8] AY32 12 DDR_B_BS1 BD42 SB_BS[1] SB_MA[8] BE30
BA28 AV32 DDR_A_MA9 AT22 BE28 DDR_B_MA9
11 DDR_A_BS2 SA_BS[2] SA_MA[9] 12 DDR_B_BS2 SB_BS[2] SB_MA[9]
BE37 DDR_A_MA10 BD43 DDR_B_MA10
SA_MA[11] BA30 SB_MA[11] AT28
BC30 DDR_A_MA12 AV28 DDR_B_MA12
11 DDR_A_CAS# BE39 SA_CAS# SA_MA[13] AW41 12 DDR_B_CAS# AV43 SB_CAS# SB_MA[13] BD46
BD39 AY28 DDR_A_MA14 BF40 AT26 DDR_B_MA14
11 DDR_A_RAS# SA_RAS# SA_MA[14] 12 DDR_B_RAS# SB_RAS# SB_MA[14]
AT41 AU26 DDR_A_MA15 BD45 AU22 DDR_B_MA15
11 DDR_A_WE# SA_WE# SA_MA[15] 12 DDR_B_WE# SB_WE# SB_MA[15]
IVY-BRIDGE_BGA1023 IVY-BRIDGE_BGA1023
@ @
Follow CRB1.0 +1.5V

Address 0~13:For 128*16
Address 0~14:For 256*16
1
R216
0_0402_5% R212
1 2 1K_0402_5% Address 0~15:For 512*16
@
CPU通知DIMM做reset
2
S
5 SM_DRAMRST# SM_DRAMRST# 3 1 DIMM_DRAMRST#_R 1 2 DIMM_DRAMRST# 11,12

Q16 R219 1K_0402_5%
2
BSS138_G_SOT23-3
R217 S0
G
2
4.99K_0402_1%
DRAMRST_CNTRL_PCH hgih ,MOS ON
SM_DRAMRST# HIGH,DDR3 DRAMRST# HIGH
1
4 R504 4
0_0402_5% RST_GATE_R Dimm not reset
1 2 11,12S3
Dr-Bios.com
14 RST_GATE RST_GATE_R
DRAMRST_CNTRL_PCH Low ,MOS OFF
R505
0_0402_5% SM_DRAMRST# lo,DDR3 DRAMRST# HIGH
36 EC_RST_GATE 1 2 Dimm not reset Security Classification Compal Secret Data Compal Electronics, Inc.
1
C190 S4,5 2011/06/24 2012/07/12 Title
0.047U_0402_16V7K DRAMRST_CNTRL_PCH Low ,MOS OFF
2 SM_DRAMRST# lo,DDR3 DRAMRST# low THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Dimm reset DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C
A B C D E
A B C D E
CFG Straps for Processor

CFG2
UCPU1E
1
R296
T32 PAD @ CFG0 B50 N59 1K_0402_1%
CFG[0] BCLK_ITP
C51 N58
2
CFG2 CFG[1] BCLK_ITP#
B54 CFG[2]
D53 CFG[3]
+CPU_CORE CFG4
1 A51 CFG[4] RSVD30 N42 1
CFG5 C53 L42 PEG Static Lane Reversal - CFG2 is for the 16x
CFG6 CFG[5] RSVD31
C55 CFG[6] RSVD32 L45
2
CFG7 H49 L47 1: Normal Operation; Lane # definition matches

R302 CFG[7] RSVD33
A55 CFG[8]
@ H51 CFG2 socket pin map definition
49.9_0402_1% CFG[9]
K49 CFG[10] RSVD34 M13
K53 M14 0:Lane Reversed
*
1
VCC_VAL_SENSE CFG[11] RSVD35

F53 CFG[12] RSVD36 U14
G53 CFG[13] RSVD37 W14
VSS_VAL_SENSE L51 P13
CFG[14] RSVD38
F51 CFG[15]
2
D52 CFG4 UMA,Optimus eDP啟動

R306 CFG[16]
L53 CFG[17] RSVD39 AT49
1
@ K24 DISO eDP關閉
49.9_0402_1% RSVD40
RESERVED
VCC_VAL_SENSE H43 R293
1
VSS_VAL_SENSE VCC_VAL_SENSE 1K_0402_1%

K43 VSS_VAL_SENSE RSVD41 AH2
AG13
2
RSVD42
RSVD43 AM14
VAXG_VAL_SENSE H45 AM15
VSSAXG_VAL_SENSE VAXG_VAL_SENSE RSVD44
K45 VSSAXG_VAL_SENSE
+VGFX_CORE
T18 PAD @ RSVD45 N50 eDP enable

F48 VCC_DIE_SENSE
2
R310
1:Disable
@
H48 RSVD6 CFG4
K48 0:Enable
2 49.9_0402_1% RSVD7
DC_TEST_A4 A4
C4
* 2
1
VAXG_VAL_SENSE DC_TEST_C4 DC_TEST_C4_D3 CFG6

BA19 RSVD8 DC_TEST_D3 D3 These pins are for solder joint CFG5
AV19 RSVD9 DC_TEST_D1 D1
VSSAXG_VAL_SENSE AT21 A58 reliability and non-critical to
RSVD10 DC_TEST_A58
BB21 RSVD11 DC_TEST_A59 A59 function. For BGA only.
2
1
BB19 C59 DC_TEST_A59_C59
R311 RSVD12 DC_TEST_C59 R543 R541
AY21 RSVD13 DC_TEST_A61 A61
@ BA22 C61 DC_TEST_A61_C61 1K_0402_1% 1K_0402_1%
49.9_0402_1% RSVD14 DC_TEST_C61 @ @
AY22 RSVD15 DC_TEST_D61 D61
AU19 BD61
1
2
RSVD16 DC_TEST_BD61
AU21 RSVD17 DC_TEST_BE61 BE61
BD21 BE59 DC_TEST_BE59_BE61
RSVD18 DC_TEST_BE59
BD22 RSVD19 DC_TEST_BG61 BG61
BD25 BG59 DC_TEST_BG59_BG61
RSVD20 DC_TEST_BG59
BD26 RSVD21 DC_TEST_BG58 BG58
BG22 RSVD22 DC_TEST_BG4 BG4
BE22 RSVD23 DC_TEST_BG3 BG3
BG26 BE3 DC_TEST_BE3_BG3 PCIE Port Bifurcation Straps
RSVD24 DC_TEST_BE3
BE26 RSVD25 DC_TEST_BG1 BG1
BF23 BE1 DC_TEST_BE1_BG1
RSVD26 DC_TEST_BE1
*11: (Default) 1x16 PCI Express

BE24 RSVD27 DC_TEST_BD1 BD1
CFG[6:5] 10: 2x8 PCI Express

IVY-BRIDGE_BGA1023
01: Reserved
@ 00: 1x8,2x4 PCI Express
3 3
CFG7
1
R297
@ 1K_0402_1%
2
PEG DEFER TRAINING Tacoma_Fall2 1.0 P.12
1: (Default) PEG Train immediately following

CFG7 xxRESETB de assertion
0: PEG Wait for BIOS for training
4 4
A
Dr-Bios.com B
Compal Secret Data
Deciphered Date 2012/07/12
C D
Title

Custom
Date:
4019J1
SCHEMATIC MB A8203

E
Sheet 7 of 56
Rev
C
A B C D E
UCPU1F POWER 8.5A

ULV type
+1.05VS_VTT
DC 33A
VCCIO[1] AF46
+CPU_CORE
VCCIO[3] AG48
VCCIO[4] AG50 For DDR
A26 VCC[1] VCCIO[5] AG51
A29 VCC[2] VCCIO[6] AJ17
A31 VCC[3] VCCIO[7] AJ21
A34 AJ25
A35
VCC[4] VCCIO[8]
AJ43 INTEL Recommend VCCIO
INTEL Recommend VCC A38
VCC[5] VCCIO[9]
AJ47
A39
VCC[6] VCCIO[10]
AK50 2*330UF,10*10uF(0603) and 26*1uF(0402)
1
4*470UF,12*22uF(0805) and 35*2.2uF(0402) A42
VCC[7]
VCC[8]
VCCIO[11]
VCCIO[12] AK51
1
C26 VCC[9] VCCIO[13] AL14 PD0.8

PD0.8 C27 VCC[10] VCCIO[14] AL15
C32 VCC[11] VCCIO[15] AL16
CAP at P.51
CAP at P.51 C34
C37
VCC[12]
VCC[13]
VCCIO[16]
VCCIO[17]
AL20
AL22
D27 VCC[16] VCCIO[20] AL48
D32 VCC[17] VCCIO[21] AM16
D39 AM43
PEG IO AND DDR IO

VCC[20] VCCIO[24]
E26 VCC[22] VCCIO[26] AN20
E37 VCC[26]
E38 VCC[27]
CORE SUPPLY
F25 VCC[28]
F26 VCC[29]
F28 VCC[30]
F32 VCC[31]
F34 VCC[32]
F37 VCC[33] VCCIO[30] AA14
F38 VCC[34] VCCIO[31] AA15 For PEG
F42 VCC[35] VCCIO[32] AB17
G42 VCC[36] VCCIO[33] AB20
H25 VCC[37] VCCIO[34] AC13
H26 VCC[38] VCCIO[35] AD16
2 2
H32 VCC[41] VCCIO[38] AE14
H34 VCC[42] VCCIO[39] AE15
H35 VCC[43] VCCIO[40] AF16
H40 VCC[46] VCCIO[43] AG15
J25 VCC[47] VCCIO[44] AG16
J26 AG17 +3VS
VCC[48] VCCIO[45]
1
J32 VCC[51] VCCIO[48] AJ14
J34 AJ15 R521
VCC[52] VCCIO[49] 10K_0402_5%
J35 VCC[53]
J37 @
VCC[54]
J38
2
VCC[55] +1.05VS_VTT
J40 VCC[56]
J42 VCC[57]
K26 W16 VCCIO_SEL
VCC[58] VCCIO50
K27 VCC[59] VCCIO51 W17 VCCIO_SEL after Ivy bridge ES2 Voltage support
1
K29 VCC[60]
K32 R522
VCC[61] 10K_0402_5%
K34 1/NC : (Default) +1.05VS_VTT
K35
K37
VCC[62]
VCC[63]
@ BC22 * 0: +1.0VS_VTT
2
VCC[64]
K39 VCC[66]
K42 BC22 VCCIO_SEL
VCC[67] VCCIO_SEL
L25 VCC[68]
L28 VCC[69]
L33 VCC[70] +1.05VS_VTT
L36 VCC[71]
L40 +1.05VS_VTT +1.05VS_VTT
VCC[72]
N26 VCC[73]
RAILS
QUIET
N30 VCC[74] VCCPQE[1] AM25
1
3 3
N34 VCC[75] VCCPQE[2] AN22
R531 R529
Place the PU
N38 VCC[76]
1 2 130_0402_5% 75_0402_5% resistors close to CPU
C553
1U_0402_6.3V6K
2
A44 H_CPU_SVIDALRT# R528 1 2 43_0402_1%
VIDALERT# VR_SVID_ALRT# 49
B43 H_CPU_SVIDCLK R527 1 2 0_0402_5%
VIDSCLK VR_SVID_CLK 49
SVID
C44 H_CPU_SVIDDAT R530 1 2 0_0402_5%
VIDSOUT VR_SVID_DAT 49
+CPU_CORE
Place the PU
1
resistors close to VR R281
100_0402_1%
2
SENSE LINES VCC_SENSE F43 VCCSENSE_R R282 1 2 0_0402_5%
VCCSENSE 49
VSS_SENSE G43 VSSSENSE_R R289 1 2 0_0402_5%
VSSSENSE 49
1
R513 1 2 10_0402_5% +1.05VS_VTT
R288
VCCIO_SENSE AN16 VCCIO_SENSE 47 100_0402_1%
AN17 VSSIO_SENSE
VSS_SENSE_VCCIO
2
1
R512 Should change to connect form
10_0402_5%
power cirucit & layout differential
IVY-BRIDGE_BGA1023
4 with VCCIO_SENSE. 4
2
@
Check list 1.5
A
Dr-Bios.com
B
Compal Secret Data
C D
Title
Date:
4019J1
SCHEMATIC MB A8203

E
Sheet 8 of 56
Rev
C
A B C D E
+1.5V_CPU_VDDQ
POWER
1
UCPU1G
+V_SM_VREF should R266
have 20 mil trace width 1K_0402_5%
+VGFX_CORE
DC 29A
2
AY43 +V_SM_VREF
SM_VREF
AA46
VREF
VAXG[1]
1
AB47 VAXG[2] 1
AB50 BE7 SA_DIMM_VREFDQ SA_DIMM_VREFDQ 12 C352 R268 SA_DIMM_VREFDQ
VAXG[3] SA_DIMM_VREFDQ SB_DIMM_VREFDQ 0.1U_0402_16V4Z 1K_0402_5%
AB51 VAXG[4] SB_DIMM_VREFDQ BG7 SB_DIMM_VREFDQ 11
AB52 SB_DIMM_VREFDQ
1
INTEL Recommend VAXG AB53
VAXG[5] 2
Check list1.5 P18 M1 default M3 no stuff
1
2
VAXG[6]
1
AB55
2*470uF,6*22uF(0805) and 6*10uF(0603) AB56
VAXG[7]
VAXG[8] R519 R518
AB58 VAXG[9]
11*1U(0402) AB59
AC61
VAXG[10]
1K_0402_1% 1K_0402_1%
INTEL Recommend VDDQ
2
VAXG[11]
PD0.8 AD47
AD48
VAXG[12]
VAXG[13]
5A 1*330uF,8*10uF(0603) ,10*1uF(0402)
AD50 VAXG[14]
AD51 AJ28 PD0.8
- 1.5V RAILS
VAXG[15] VDDQ[1]
AD52 VAXG[16] VDDQ[2] AJ33
AD53 VAXG[17] VDDQ[3] AJ36
+1.5V_CPU_VDDQ +1.5VS
AD55 VAXG[18] VDDQ[4] AJ40 Place TOP IN BGA J12
AD56 VAXG[19] VDDQ[5] AL30
AD58 VAXG[20] VDDQ[6] AL34 1 2
AD59 AL38 C321 C329 C351 C348 C328 C312 C318 C320 C349 C316
VAXG[21] VDDQ[7]
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
AE46 AL42 1 JUMP_43X118
VAXG[22] VDDQ[8] @
N45 VAXG[23] VDDQ[9] AM33
1
P47 AM36 + C286
VAXG[24] VDDQ[10] 330U_D2_2V_Y
P48 VAXG[25] VDDQ[11] AM40
P50 AN30
2
VAXG[26] VDDQ[12] 2
P51 VAXG[27] VDDQ[13] AN34
P52 VAXG[28] VDDQ[14] AN38
P53 AR26
DDR3
VAXG[29] VDDQ[15]
P55 AR28
GRAPHICS
VAXG[30] VDDQ[16]
P56 VAXG[31] VDDQ[17] AR30 Place BOT OUT BGA
P61 VAXG[32] VDDQ[18] AR32
T48 VAXG[33] VDDQ[19] AR34
T58 VAXG[34] VDDQ[20] AR36
T59 AR40 C340 C337 C338 C296 C295 C299 C339 C298
VAXG[35] VDDQ[21]
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
T61 VAXG[36] VDDQ[22] AV41 SGA20331E10 S POLY C 330U
1
U46 VAXG[37] VDDQ[23] AW26
V47 BA40 2V Y D2 LESR9M EEFSX H1.9
2 VAXG[38] VDDQ[24] 2
V48 BB28
2
VAXG[39] VDDQ[25]
V50 VAXG[40] VDDQ[26] BG33
V51 VAXG[41]
V52 VAXG[42]
V53 VAXG[43]
V55 VAXG[44]
V56 VAXG[45]
V58 VAXG[46]
V59 VAXG[47]
W50 VAXG[48]
W51 VAXG[49]
W52 VAXG[50]
W53 VAXG[51]
CR CheckList Rev1.5 W55 VAXG[52]
W56 VAXG[53]
W61 VAXG[54]
+VGFX_CORE Y48 VAXG[55]
Y61 VAXG[56]
1
R308
100_0402_5% +1.5V_CPU_VDDQ
INTEL Recommend VCCPLL

2
QUIET RAILS
AM28
SENSE
LINES
VCCDQ[1]
F45 AN26
1*330uF,2*1uF(0402) 49 VCC_AXG_SENSE
49 VSS_AXG_SENSE G45
VAXG_SENSE
VSSAXG_SENSE
VCCDQ[2]
1
1
PD0.8 R309
C317
1U_0402_6.3V6K
2
100_0402_5% 1.2A
1.8V RAIL
2
+1.8VS
3
Place BOT OUT Conn BB3 VCCPLL[1] 3
BC1 VCCPLL[2]
BC4 VCCPLL[3]
1
1U_0402_6.3V6K
C281
1U_0402_6.3V6K
C280
1 1
+ C261
SGA00001700 S POLY C 220U @ BC43
220U_B2_2.5VM_R35 VDDQ_SENSE
VSS_SENSE_VDDQ BA43
220U 2.5V M B2 ESR35 TPE H1.9 2 2 2
SENSE LINES
6A L17 VCCSA[1]
L21 VCCSA[2]
N16 VCCSA[3]
N20 VCCSA[4]
N22
SA RAIL
VCCSA[5]
+VCCSA
P17 VCCSA[6] VCCSA
Place TOP IN BGA P20 VCCSA[7] VCCSA_SENSE U10 VCCSA_SENSE 48
+VCCSA
R16 VCCSA[8] CPU EDS1.3 P.93 VID0 VID1 Vout HR CR
R18 VCCSA[9]
R21 VCCSA_VID0 Must PD 0 0 0.9V V V
C309 C302 C300 C301 C308 VCCSA[10]
1 U15
VCCSA VID
VCCSA[11]
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
V16 VCCSA[12] 0 1 0.85V V V

1
+ C242 V17 D48 H_VCCSA_VID0

VCCSA[13] VCCSA_VID[0] H_VCCSA_VID0 48
lines
330U_D2_2V_Y V18 D49 H_VCCSA_VID1 1 0 0.775V X V

VCCSA[14] VCCSA_VID[1] H_VCCSA_VID1 48
SGA20331E10 S POLY C 330U V21
2
2 VCCSA[15]
2V Y D2 LESR9M EEFSX H1.9
W20 VCCSA[16] 1 1 0.75V X V
1
R248
0_0402_5%
@
IVY-BRIDGE_BGA1023
2
Place BOT OUT BGA @
4 INTEL Recommend VCCSA C577 C560 C555 C579 C559 4

10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1*330uF,5*10uF(0603) ,5*1uF(0402)
1
Dr-Bios.com
PD0.8
2

2011/06/24 2012/07/12 Title
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C
4019J1
A B C D E
A B C D E
UCPU1H
UCPU1I
A13 VSS[1] VSS[91] AM38

A17 VSS[2] VSS[92] AM4
A21 VSS[3] VSS[93] AM42 BG17 VSS[181] VSS[250] M4
A33 VSS[6] VSS[96] AM58 BG28 VSS[184] VSS[253] N1
1 A37 VSS[7] VSS[97] AN1 BG37 VSS[185] VSS[254] N17 1
A40 VSS[8] VSS[98] AN21 BG41 VSS[186] VSS[255] N21
AA1 VSS[13] VSS[103] AN40 C29 VSS[191] VSS[260] N40
AA51 VSS[16] VSS[106] AN50 D10 VSS[194] VSS[263] N48
AA52 VSS[17] VSS[107] AN54 D14 VSS[195] VSS[264] N51
AA53 VSS[18] VSS[108] AP10 D18 VSS[196] VSS[265] N52
AA8 VSS[21] VSS[111] AP7 D29 VSS[199] VSS[268] P14
AB16 VSS[22] VSS[112] AR13 D35 VSS[200] VSS[269] P16
AB48
AB61
AC10
VSS[25]
VSS[26]
VSS[27]
VSS[115]
VSS[116]
VSS[117]
AR41
AR48
AR61
D43
D46
D50
VSS[203]
VSS[204]
VSS[205]
VSS VSS[272]
VSS[273]
VSS[274]
P58
P59
P9
AC14 VSS[28] VSS[118] AR7 D54 VSS[206] VSS[275] R17
AC46 VSS[29] VSS[119] AT14 D58 VSS[207] VSS[276] R20
AC6 VSS[30] VSS[120] AT19 D6 VSS[208] VSS[277] R4
AD17 VSS[31] VSS[121] AT36 E25 VSS[209] VSS[278] R46
AD20 VSS[32] VSS[122] AT4 E29 VSS[210] VSS[279] T1
2
AD4
AD61
AE13
VSS[33]
VSS[34]
VSS[35]
VSS VSS[123]
VSS[124]
VSS[125]
AT45
AT52
AT58
E3
E35
E40
VSS[211]
VSS[212]
VSS[213]
VSS[280]
VSS[281]
VSS[282]
T47
T50
T51
2
AE8 VSS[36] VSS[126] AU1 F13 VSS[214] VSS[283] T52

AF1 VSS[37] VSS[127] AU11 F15 VSS[215] VSS[284] T53
AF47 VSS[40] VSS[130] AU51 F35 VSS[218] VSS[287] U13
AF48 VSS[41] VSS[131] AU7 F40 VSS[219] VSS[288] U8
AF50 VSS[42] VSS[132] AV17 F55 VSS[220] VSS[289] V20
AF51 VSS[43] VSS[133] AV21 G51 VSS[221] VSS[290] V61
AF52 VSS[44] VSS[134] AV22 G6 VSS[222] VSS[291] W13
AF53 VSS[45] VSS[135] AV34 G61 VSS[223] VSS[292] W15
AF55 VSS[46] VSS[136] AV40 H10 VSS[224] VSS[293] W18
AF59 VSS[49] VSS[139] AW13 H21 VSS[227] VSS[296] W8
AG10 VSS[50] VSS[140] AW43 H4 VSS[228] VSS[297] Y4
AG47 VSS[53] VSS[143] AY14 J1 VSS[231] VSS[300] Y59
AG52 VSS[54] VSS[144] AY19 J49 VSS[232] VSS[301] G48
AG61 VSS[55] VSS[145] AY30 J55 VSS[233]
AG7 VSS[56] VSS[146] AY36 K11 VSS[234]
AH4 VSS[57] VSS[147] AY4 K21 VSS[235]
AH58 VSS[58] VSS[148] AY41 K51 VSS[236]
AJ13 VSS[59] VSS[149] AY45 K8 VSS[237] VSS_NCTF_1 A5
3 AJ16 VSS[60] VSS[150] AY49 L16 VSS[238] VSS_NCTF_2 A57 3
AJ20 VSS[61] VSS[151] AY55 L20 VSS[239] VSS_NCTF_3 BC61
AJ22 VSS[62] VSS[152] AY58 L22 VSS[240] VSS_NCTF_4 BD3
AJ26 VSS[63] VSS[153] AY9 L26 VSS[241] VSS_NCTF_5 BD59
AJ30 BA1 L30 BE4
VSS[64] VSS[154] VSS[242]
NCTF VSS_NCTF_6
AJ34 VSS[65] VSS[155] BA11 L34 VSS[243] VSS_NCTF_7 BE58
AJ38 VSS[66] VSS[156] BA17 L38 VSS[244] VSS_NCTF_8 BG5
AJ42 VSS[67] VSS[157] BA21 L43 VSS[245] VSS_NCTF_9 BG57
AJ45 VSS[68] VSS[158] BA26 L48 VSS[246] VSS_NCTF_10 C3
AJ48 VSS[69] VSS[159] BA32 L61 VSS[247] VSS_NCTF_11 C58
AJ7 VSS[70] VSS[160] BA48 M11 VSS[248] VSS_NCTF_12 D59
AK1 VSS[71] VSS[161] BA51 M15 VSS[249] VSS_NCTF_13 E1
AK52 VSS[72] VSS[162] BB53 VSS_NCTF_14 E61
AL10 VSS[73] VSS[163] BC13
AL13 VSS[74] VSS[164] BC5
AL17 VSS[75] VSS[165] BC57
AL21 VSS[76] VSS[166] BD12
AL25 VSS[77] VSS[167] BD16
AL28 BD19 IVY-BRIDGE_BGA1023
VSS[78] VSS[168] @
AL33 VSS[79] VSS[169] BD23
AL36 VSS[80] VSS[170] BD27
AL40 VSS[81] VSS[171] BD32
AL43 VSS[82] VSS[172] BD36
AL47 VSS[83] VSS[173] BD40
AL61 VSS[84] VSS[174] BD44
AM13 VSS[85] VSS[175] BD48
AM20 VSS[86] VSS[176] BD52
4 AM22 VSS[87] VSS[177] BD56 4
AM26 VSS[88] VSS[178] BD8
AM30 VSS[89] VSS[179] BE5
Dr-Bios.com
AM34 VSS[90] VSS[180] BG13

2011/06/24 2012/07/12 Title
IVY-BRIDGE_BGA1023 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
@ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
A B C D E
A B C D E
+1.5V
+V_DDR_REFA +1.5V +1.5V
JDIMM1
1
+V_DDR_REFA 1 2
R223 VREF_DQ VSS1 DDR_A_D4
3 VSS2 DQ4 4
1K_0402_1% DDR_A_D0 5 6 DDR_A_D5
R221 DDR_A_D1 DQ0 DQ5
M3 support(unpop) 0_0402_5%
7 DQ1 VSS3 8
DDR_A_DQS#0
9 10
2
DDR_A0_DM0 VSS4 DQS#0 DDR_A_DQS0
9 SB_DIMM_VREFDQ 1 2 11 DM0 DQS0 12
@ 13 14
VSS5 VSS6
2.2U_0603_6.3V6K
C222
0.1U_0402_16V4Z
C221
1 1 DDR_A_D2 15 16 DDR_A_D6
DDR_A_D3 DQ2 DQ6 DDR_A_D7
17 DQ3 DQ7 18
D
3 1 R226 19 20
@ Q17 1K_0402_1% DDR_A_D8 VSS7 VSS8 DDR_A_D12
21 DQ8 DQ12 22
BSS138_G_SOT23-3 2 2 DDR_A_D9 DDR_A_D13
23 24
2
DQ9 DQ13
G
25 26
2
1 VSS9 VSS10 1
6,12 RST_GATE_R DDR_A_DQS#1 27 28 DDR_A0_DM1
DDR_A_DQS1 DQS#1 DM1 DIMM_DRAMRST#
29 DQS1 RESET# 30 DIMM_DRAMRST# 6,12
31 VSS11 VSS12 32
DDR_A_D10 33 34 DDR_A_D14
DDR_A_DQS#[0..7] 6 35 DQ11 DQ15 36
37 VSS13 VSS14 38
DDR_A_DQS[0..7] 6 DQ16 DQ20
DQ17 DQ21
DDR_A_D[0..63] 6 43 VSS15 VSS16 44
DDR_A_DQS#2 45 46 DDR_A0_DM2
DDR_A_DQS2 DQS#2 DM2
DDR_A_MA[0..15] 6 47 DQS2 VSS17 48
49 50 DDR_A_D22
DDR_A_D18 VSS18 DQ22 DDR_A_D23
51 DQ18 DQ23 52
DDR_A_D19 53 54
DQ19 VSS19 DDR_A_D28
All VREF traces should DDR_A_D24
55 VSS20 DQ28 56
DDR_A_D29
Layout Note: have 10 mil trace width DDR_A_D25
57 DQ24 DQ29 58
59 DQ25 VSS21 60
Place near JDIMM1 61 62 DDR_A_DQS#3
+1.5V DDR_A0_DM3 VSS22 DQS#3 DDR_A_DQS3
63 DM3 DQS3 64
65 VSS23 VSS24 66
69 DQ27 DQ31 70
1U_0402_6.3V6K
C294
1U_0402_6.3V6K
C326
1U_0402_6.3V6K
C291
1U_0402_6.3V6K
C310
71 VSS25 VSS26 72
1 1 1 1
6 DDRA_CKE0_DIMMA DDRA_CKE0_DIMMA 73 74 DDRA_CKE1_DIMMA DDRA_CKE1_DIMMA 6

2 2 2 2 CKE0 CKE1
75 VDD1 VDD2 76
77 78 DDR_A_MA15
DDR_A_BS2 NC1 A15 DDR_A_MA14
6 DDR_A_BS2 79 BA2 A14 80
81 VDD3 VDD4 82
DDR_A_MA12 83 84 DDR_A_MA11
DDR_A_MA9 A12/BC# A11 DDR_A_MA7
85 A9 A7 86
2 2
87 VDD5 VDD6 88
+1.5V DDR_A_MA8 89 90 DDR_A_MA6
DDR_A_MA5 A8 A6 DDR_A_MA4
91 A5 A4 92
93 VDD7 VDD8 94
A3 A2
10U_0603_6.3V6M
C287
10U_0603_6.3V6M
C284
10U_0603_6.3V6M
C314
10U_0603_6.3V6M
C289
A1 A0
1 1 1 1 99 VDD9 VDD10 100
6 SA_CLK_DDR0 SA_CLK_DDR0 101 102 SA_CLK_DDR1 SA_CLK_DDR1 6
SA_CLK_DDR#0 CK0 CK1 SA_CLK_DDR#1
6 SA_CLK_DDR#0 103 CK0# CK1# 104 SA_CLK_DDR#1 6 +1.5V
105 VDD11 VDD12 106
2 2 2 2 DDR_A_MA10 DDR_A_BS1
107 A10/AP BA1 108 DDR_A_BS1 6
6 DDR_A_BS0 DDR_A_BS0 109 110 DDR_A_RAS# DDR_A_RAS# 6
BA0 RAS#
111 VDD13 VDD14 112
1
6 DDR_A_WE# DDR_A_WE# 113 114 DDRA_CS0_DIMMA# DDRA_CS0_DIMMA# 6
DDR_A_CAS# WE# S0# SA_ODT0 R265
6 DDR_A_CAS# 115 CAS# ODT0 116 SA_ODT0 6
117 118 1K_0402_1%
DDR_A_MA13 VDD15 VDD16 SA_ODT1
119 A13 ODT1 120 SA_ODT1 6
6 DDRA_CS1_DIMMA# DDRA_CS1_DIMMA# 121 122
2
+1.5V S1# NC2
123 VDD17 VDD18 124
125 126 +VREF_CA
NCTEST VREF_CA
127 VSS27 VSS28 128
2.2U_0603_6.3V6K
DDR_A_D32 129 130 DDR_A_D36
DQ32 DQ36
1
10U_0603_6.3V6M
C303
10U_0603_6.3V6M
C293
10U_0603_6.3V6M
C343
C354
0.1U_0402_16V4Z
C353
1 DDR_A_D33 131 132 DDR_A_D37
DQ33 DQ37 R269
1 1 1 133 VSS29 VSS30 134 1 1
+ C311 DDR_A_DQS#4 135 136 DDR_A0_DM4 1K_0402_1%
330U_D2_2V_Y DDR_A_DQS4 DQS#4 DM4
137 DQS4 VSS31 138
@ 139 140 DDR_A_D38
2
2 2 2 2 DDR_A_D34 VSS32 DQ38 DDR_A_D39 2 2
SGA20331E10 DDR_A_D35
141 DQ34 DQ39 142
143 DQ35 VSS33 144
330U 2V H1.9 145 146 DDR_A_D44
9mohm POLY DDR_A_D41
147 DQ40 DQ45 148
149 DQ41 VSS35 150
151 152 DDR_A_DQS#5
3 DDR_A0_DM5 VSS36 DQS#5 DDR_A_DQS5 3
153 DM5 DQS5 154
155 VSS37 VSS38 156
DDR_A_D42 157 158 DDR_A_D46
159 DQ43 DQ47 160
+0.75VS 161 162
DDR_A_D48 VSS39 VSS40 DDR_A_D52
163 DQ48 DQ52 164
DDR_A_D49 165 166 DDR_A_D53
DQ49 DQ53
167 VSS41 VSS42 168
1U_0402_6.3V6K
C411
1U_0402_6.3V6K
C412
1U_0402_6.3V6K
C413
1U_0402_6.3V6K
C414
DDR_A_DQS#6 169 170 DDR_A0_DM6

DDR_A_DQS6 DQS#6 DM6
1 1 1 1 171 DQS6 VSS43 172
173 174 DDR_A_D54
175 DQ50 DQ55 176
DDR_A_D51 177 178
2 2 2 2 DQ51 VSS45 DDR_A_D60
179 VSS46 DQ60 180
DDR_A_D56 181 182 DDR_A_D61
DDR_A_D57 DQ56 DQ61
183 DQ57 VSS47 184
185 186 DDR_A_DQS#7
DDR_A0_DM7 VSS48 DQS#7 DDR_A_DQS7
187 DM7 DQS7 188
189 VSS49 VSS50 190
DDR_A_D58 191 192 DDR_A_D62
Layout Note: 193 DQ59 DQ63 194
195 VSS51 VSS52 196
Place near JDIMM1.203,204 197 198
SA0 EVENT# D_CK_SDATA
+3VS 199 VDDSPD SDA 200 D_CK_SDATA 14,37
201 202 D_CK_SCLK
SA1 SCL D_CK_SCLK 14,37
+0.75VS 203 VTT1 VTT2 204 +0.75VS
DDR_A0_DM0
10K_0402_5%
DDR_A0_DM1 205 206

G1 G2
2
2
0.1U_0402_16V4Z
C408
2.2U_0603_6.3V6K
C409
DDR_A0_DM2 1 1
DDR_A0_DM3
DDR_A0_DM4
R336 TYCO_2-2013290-1
CONN@ Channel A
R331
DDR_A0_DM5 10K_0402_5%
DDR_A0_DM6 2 2
1
DDR_A0_DM7
4
<Address: SA1:SA0=00> 4
Dr-Bios.com
DIMM_1 Reverse H:5.2mm
2011/06/24 2012/07/12 Title
4019J1
A B C D E
A B C D E
+VREF1 U2 +VREF1 U3 +VREF1 U4

U1 +VREF1 U1
M8 E3 DDR_B_D16 M8 E3 DDR_B_D37 M8 E3 DDR_B_D61
DDR_B_D12 VREFCA DQL0 DDR_B_D23 VREFCA DQL0 DDR_B_D39 VREFCA DQL0 DDR_B_D58
M8 VREFCA DQL0 E3 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7
ELPIDA@ SA000059110 H1 F7 DDR_B_D10 1 F2 DDR_B_D17 1 F2 DDR_B_D36 1 F2 DDR_B_D60
VREFDQ DQL1 DQL2 DQL2 DQL2
C1295
0.1U_0402_16V4Z
C1297
0.1U_0402_16V4Z
C1303
0.1U_0402_16V4Z
1 F2 DDR_B_D13 DDR_B_MA0 N3 F8 DDR_B_D22 DDR_B_MA0 N3 F8 DDR_B_D38 DDR_B_MA0 N3 F8 DDR_B_D62
DQL2 A0 DQL3 A0 DQL3 A0 DQL3
C1294
0.1U_0402_16V4Z
DDR_B_MA0 N3 F8 DDR_B_D11 DDR_B_MA1 P7 H3 DDR_B_D21 DDR_B_MA1 P7 H3 DDR_B_D32 DDR_B_MA1 P7 H3 DDR_B_D56
EDJ4216EBBG-DJ-F 96P ABO! DDR_B_MA1 A0 DQL3 DDR_B_D8 DDR_B_MA2 A1 DQL4 DDR_B_D18 DDR_B_MA2 A1 DQL4 DDR_B_D34 DDR_B_MA2 A1 DQL4 DDR_B_D59
P7 A1 DQL4 H3 P3 A2 DQL5 H8 P3 A2 DQL5 H8 P3 A2 DQL5 H8
U2 DDR_B_MA2 DDR_B_D15 2 DDR_B_MA3 DDR_B_D20 2 DDR_B_MA3 DDR_B_D33 2 DDR_B_MA3 DDR_B_D57
P3 A2 DQL5 H8 N2 A3 DQL6 G2 N2 A3 DQL6 G2 N2 A3 DQL6 G2
2 DDR_B_MA3 DDR_B_D9 DDR_B_MA4 DDR_B_D19 DDR_B_MA4 DDR_B_D35 DDR_B_MA4 DDR_B_D63
N2 A3 DQL6 G2 P8 A4 DQL7 H7 P8 A4 DQL7 H7 P8 A4 DQL7 H7
DDR_B_MA4 P8 H7 DDR_B_D14 DDR_B_MA5 P2 DDR_B_MA5 P2 DDR_B_MA5 P2
ELPIDA@ SA000059110 DDR_B_MA5 A4 DQL7 DDR_B_MA6 A5 DDR_B_MA6 A5 DDR_B_MA6 A5
P2 A5 R8 A6 R8 A6 R8 A6
DDR_B_MA6 R8 DDR_B_MA7 R2 D7 DDR_B_D30 DDR_B_MA7 R2 D7 DDR_B_D42 DDR_B_MA7 R2 D7 DDR_B_D55
DDR_B_MA7 A6 DDR_B_D1 +VREF0 DDR_B_MA8 A7 DQU0 DDR_B_D25 +VREF0 DDR_B_MA8 A7 DQU0 DDR_B_D41 +VREF0 DDR_B_MA8 A7 DQU0 DDR_B_D52
R2 A7 DQU0 D7 T8 A8 DQU1 C3 T8 A8 DQU1 C3 T8 A8 DQU1 C3
EDJ4216EBBG-DJ-F 96P ABO! +VREF0 DDR_B_MA8 T8 C3 DDR_B_D2 DDR_B_MA9 R3 C8 DDR_B_D27 DDR_B_MA9 R3 C8 DDR_B_D47 DDR_B_MA9 R3 C8 DDR_B_D51
U3 DDR_B_MA9 A8 DQU1 DDR_B_D7 DDR_B_MA10 A9 DQU2 DDR_B_D28 DDR_B_MA10 A9 DQU2 DDR_B_D44 DDR_B_MA10 A9 DQU2 DDR_B_D49
R3 A9 DQU2 C8 L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2
1 DDR_B_MA10 L7 C2 DDR_B_D5 DDR_B_MA11 R7 A7 DDR_B_D26 DDR_B_MA11 R7 A7 DDR_B_D46 DDR_B_MA11 R7 A7 DDR_B_D54 1
DDR_B_MA11 A10/AP DQU3 DDR_B_D6 DDR_B_MA12 A11 DQU4 DDR_B_D29 DDR_B_MA12 A11 DQU4 DDR_B_D45 DDR_B_MA12 A11 DQU4 DDR_B_D48
R7 A11 DQU4 A7 1 N7 A12 DQU5 A2 1 N7 A12 DQU5 A2 1 N7 A12 DQU5 A2
1
0.1U_0402_16V4Z
2.2U_0603_6.3V6K
C1293
0.1U_0402_16V4Z
2.2U_0603_6.3V6K
C1296
0.1U_0402_16V4Z
2.2U_0603_6.3V6K
C1301
ELPIDA@ SA000059110 1 DDR_B_MA12 N7 A2 DDR_B_D4 DDR_B_MA13 T3 B8 DDR_B_D31 DDR_B_MA13 T3 B8 DDR_B_D43 DDR_B_MA13 T3 B8 DDR_B_D50
A12 DQU5 A13 DQU6 A13 DQU6 A13 DQU6
1
0.1U_0402_16V4Z
2.2U_0603_6.3V6K
C1292
C1299
C1300
C1302
DDR_B_MA13 T3 B8 DDR_B_D3 DDR_B_MA14 T7 A3 DDR_B_D24 DDR_B_MA14 T7 A3 DDR_B_D40 DDR_B_MA14 T7 A3 DDR_B_D53
A13 DQU6 A14 DQU7 A14 DQU7 A14 DQU7
C1298
DDR_B_MA14 T7 A3 DDR_B_D0 DDR_B_MA15 M7 DDR_B_MA15 M7 DDR_B_MA15 M7
2
EDJ4216EBBG-DJ-F 96P ABO! DDR_B_MA15 A14 DQU7 2 A15/BA3 +1.5V 2 A15/BA3 +1.5V 2 A15/BA3 +1.5V
M7
2
U4 2 A15/BA3 +1.5V
DDR_B_BS0 M2 B2 DDR_B_BS0 M2 B2 DDR_B_BS0 M2 B2
DDR_B_BS0 DDR_B_BS1 BA0 VDD DDR_B_BS1 BA0 VDD DDR_B_BS1 BA0 VDD
M2 BA0 VDD B2 N8 BA1 VDD D9 N8 BA1 VDD D9 N8 BA1 VDD D9
ELPIDA@ SA000059110 DDR_B_BS1 N8 D9 DDR_B_BS2 M3 G7 DDR_B_BS2 M3 G7 DDR_B_BS2 M3 G7
DDR_B_BS2 BA1 VDD BA2 VDD BA2 VDD BA2 VDD
M3 BA2 VDD G7 VDD K2 VDD K2 VDD K2
VDD K2 VDD K8 VDD K8 VDD K8
EDJ4216EBBG-DJ-F 96P ABO! K8 N1 N1 N1
VDD DDR_B_CLK0 VDD DDR_B_CLK0 VDD DDR_B_CLK0 VDD
VDD N1 J7 CK VDD N9 J7 CK VDD N9 J7 CK VDD N9
DDR_B_CLK0 J7 N9 DDR_B_CLK0# K7 R1 DDR_B_CLK0# K7 R1 DDR_B_CLK0# K7 R1
DDR_B_CLK0# CK VDD DDR_B_CKE0 CK VDD DDR_B_CKE0 CK VDD DDR_B_CKE0 CK VDD
K7 CK VDD R1 K9 CKE/CKE0 VDD R9 K9 CKE/CKE0 VDD R9 K9 CKE/CKE0 VDD R9
DDR_B_CKE0 K9 R9
U1 CKE/CKE0 VDD
DDR_B_ODT0 K1 A1 DDR_B_ODT0 K1 A1 DDR_B_ODT0 K1 A1
DDR_B_ODT0 DDR_B_CS0# ODT/ODT0 VDDQ DDR_B_CS0# ODT/ODT0 VDDQ DDR_B_CS0# ODT/ODT0 VDDQ
K1 ODT/ODT0 VDDQ A1 L2 CS/CS0 VDDQ A8 L2 CS/CS0 VDDQ A8 L2 CS/CS0 VDDQ A8
HYNIX@ SA00005FV10 DDR_B_CS0# L2 A8 DDR_B_RAS# J3 C1 DDR_B_RAS# J3 C1 DDR_B_RAS# J3 C1
DDR_B_RAS# CS/CS0 VDDQ DDR_B_CAS# RAS VDDQ DDR_B_CAS# RAS VDDQ DDR_B_CAS# RAS VDDQ
J3 RAS VDDQ C1 K3 CAS VDDQ C9 K3 CAS VDDQ C9 K3 CAS VDDQ C9
DDR_B_CAS# K3 C9 DDR_B_WE# L3 D2 DDR_B_WE# L3 D2 DDR_B_WE# L3 D2
H5TC4G63MFR-H9A 96P ABO ! DDR_B_WE# CAS VDDQ WE VDDQ WE VDDQ WE VDDQ
L3 WE VDDQ D2 VDDQ E9 VDDQ E9 VDDQ E9
U2 E9 F1 F1 F1
VDDQ DDR_B_DQS2 VDDQ DDR_B_DQS4 VDDQ DDR_B_DQS7 VDDQ
VDDQ F1 F3 DQSL VDDQ H2 F3 DQSL VDDQ H2 F3 DQSL VDDQ H2
DDR_B_DQS1 F3 H2 DDR_B_DQS3 C7 H9 DDR_B_DQS5 C7 H9 DDR_B_DQS6 C7 H9
HYNIX@ SA00005FV10 DDR_B_DQS0 DQSL VDDQ DQSU VDDQ DQSU VDDQ DQSU VDDQ
C7 DQSU VDDQ H9
E7 DML VSS A9 E7 DML VSS A9 E7 DML VSS A9

H5TC4G63MFR-H9A 96P ABO ! E7 A9 D3 B3 D3 B3 D3 B3
U3 DML VSS DMU VSS DMU VSS DMU VSS
D3 DMU VSS B3 VSS E1 VSS E1 VSS E1
VSS E1 VSS G8 VSS G8 VSS G8
G8 DDR_B_DQS#2 G3 J2 DDR_B_DQS#4 G3 J2 DDR_B_DQS#7 G3 J2
HYNIX@ SA00005FV10 DDR_B_DQS#1 VSS DDR_B_DQS#3 DQSL VSS DDR_B_DQS#5 DQSL VSS DDR_B_DQS#6 DQSL VSS
G3 DQSL VSS J2 B7 DQSU VSS J8 B7 DQSU VSS J8 B7 DQSU VSS J8
DDR_B_DQS#0 B7 J8 M1 M1 M1
DQSU VSS VSS VSS VSS
VSS M1 VSS M9 VSS M9 VSS M9
H5TC4G63MFR-H9A 96P ABO ! M9 P1 P1 P1
U4 VSS DIMM_DRAMRST# VSS DIMM_DRAMRST# VSS DIMM_DRAMRST# VSS
2
VSS P1 T2 RESET VSS P9 T2 RESET VSS P9 T2 RESET VSS P9 2
6,11 DIMM_DRAMRST# DIMM_DRAMRST# T2 P9 T1 T1 T1
RESET VSS VSS VSS VSS
VSS T1 1 R1006 2 L8 ZQ/ZQ0 VSS T9 1 R1007 2 L8 ZQ/ZQ0 VSS T9 1 R1008 2 L8 ZQ/ZQ0 VSS T9
HYNIX@ SA00005FV10 1 R1005 2 L8 T9 240_0402_1% 240_0402_1% 240_0402_1%
240_0402_1% ZQ/ZQ0 VSS
J1 NC/ODT1 VSSQ B1 J1 NC/ODT1 VSSQ B1 J1 NC/ODT1 VSSQ B1
H5TC4G63MFR-H9A 96P ABO ! J1 B1 L1 B9 L1 B9 L1 B9
NC/ODT1 VSSQ NC/CS1 VSSQ NC/CS1 VSSQ NC/CS1 VSSQ
L1 NC/CS1 VSSQ B9 J9 NC/CE1 VSSQ D1 J9 NC/CE1 VSSQ D1 J9 NC/CE1 VSSQ D1
J9 NC/CE1 VSSQ D1 1 R1010 2 L9 NCZQ1 VSSQ D8 1 R1011 2 L9 NCZQ1 VSSQ D8 1 R1012 2 L9 NCZQ1 VSSQ D8
1 R1009 2 L9 NCZQ1 VSSQ D8 240_0402_1%
VSSQ E2 240_0402_1%
VSSQ E2 240_0402_1%
VSSQ E2
240_0402_1% E2 E8 E8 E8
VSSQ VSSQ VSSQ VSSQ
VSSQ E8 VSSQ F9 VSSQ F9 VSSQ F9
VSSQ F9 VSSQ G1 VSSQ G1 VSSQ G1
VSSQ G1 VSSQ G9 VSSQ G9 VSSQ G9
VSSQ G9
96-BALL 96-BALL 96-BALL
RAM GPIO config P.18 96-BALL SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
SDRAM DDR3 H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96
H5TQ2G63BFR-11C_FBGA96 @ @ @
@
DDR3 CTL/ADD Termination
+1.5V +1.5V
+0.75VS
1
R232 SGA20331E10 S POLY C 330U External DDR Thermal Sensor
10U_0603_6.3V6M
C543
10U_0603_6.3V6M
C604
10U_0603_6.3V6M
C292
10U_0603_6.3V6M
C608
10U_0603_6.3V6M
C402
10U_0603_6.3V6M
C240
R349 1 2 36_0402_5%DDR_B_CAS# 1K_0402_1%
+VREF0 2V Y D2 LESR9M EEFSX H1.9
330U_D2_2V_Y
R595 1 2 36_0402_5%DDR_B_RAS# M3 support(unpop) R231
C313
R596 1 2 36_0402_5%DDR_B_CKE0 R229 0_0402_5% +3VS
2
R597 1 2 36_0402_5%DDR_B_ODT0 30.1_0402_1% 1 2 @ @ @ @ @ @ + C605
9 SA_DIMM_VREFDQ
1 2 DDR_B_CLK0 @ @ 0.1U_0402_16V4Z
2
2.2U_0603_6.3V6K
C207
0.1U_0402_16V4Z
C217
1 1 2
2
1
S
D
C415 3 1 UMAO@
1
R598 1 2 36_0402_5%DDR_B_MA10 R230 1.8P_0402_50V8 Q19
R599 1 2 36_0402_5%DDR_B_WE# 30.1_0402_1% BSS138_G_SOT23-3 @ R234 @
R600 36_0402_5%DDR_B_MA15 2 DDR_B_CLK0# 1K_0402_1%
G
1 2 1 2
2
2
R601 1 2 36_0402_5%DDR_B_CS0# 1 6,11 RST_GATE_R U43
2
C208 1 8
+1.5V +0.75VS VDD SCLK EC_SMB_CK2 14,22,27,36
3 3
0.1U_0402_16V4Z 2 7
2 D+ SDATA EC_SMB_DA2 14,22,27,36
R602 1 2 36_0402_5%DDR_B_BS2 DDR3 CLK Termination
R604 1 2 36_0402_5%DDR_B_MA12 3 6 1 UMAO@ 2 +3VS
D- ALERT#
1.CAD Note: Cterm= 1.6pF should be kept
1U_0402_6.3V6K
C624
1U_0402_6.3V6K
C607
1U_0402_6.3V6K
C243
1U_0402_6.3V6K
C288
1U_0402_6.3V6K
C380
1U_0402_6.3V6K
C350
1U_0402_6.3V6K
C599
1U_0402_6.3V6K
C544
1U_0402_6.3V6K
C202
1U_0402_6.3V6K
C199
1U_0402_6.3V6K
C200
1U_0402_6.3V6K
C201
R603 1 2 36_0402_5%DDR_B_BS0 R523 10K_0402_5%
R605 36_0402_5%DDR_B_BS1 +1.5V
1 2 4 5
near feeding point of first SDRAM THERM# GND
1
1
W83L771AWG-2 TSSOP8P
2.CAD Note: Rtt= 30.1ohms, Ctt= 0.1uF
2
R606 1 2 36_0402_5%DDR_B_MA0 R245 SA00003PU00
R607 1 2 36_0402_5%DDR_B_MA1 should be kept within 600mils from last SDRAM 1K_0402_1% UMAO@
R608 1 2 36_0402_5%DDR_B_MA3 +VREF1 SA00003PU00
R609 1 2 36_0402_5%DDR_B_MA4 S IC W83L771AWG-2 TSSOP 8P SENSOR
2
DDR_B_MA[0..15]
6 DDR_B_MA[0..15]
Layout Note:
2.2U_0603_6.3V6K
C235
0.1U_0402_16V4Z
DDR_B_DQS#[4..7] C234
6 DDR_B_DQS#[4..7] Place near each
1
R610 1 2 36_0402_5%DDR_B_MA2
1
R611 1 2 36_0402_5%DDR_B_MA11
6 DDR_B_DQS[4..7]
DDR_B_DQS[4..7] R244 memory part
R612 1 2 36_0402_5%DDR_B_MA5 1K_0402_1% @
R613 1 2 36_0402_5%DDR_B_MA14 DDR_B_D[32..63]
6 DDR_B_D[32..63]
2
2
2
DDR_B_DQS#[0..3]
6 DDR_B_DQS#[0..3]
R614 1 2 36_0402_5%DDR_B_MA9 DDR_B_DQS[0..3]
6 DDR_B_DQS[0..3]
R615 1 2 36_0402_5%DDR_B_MA6
R616 1 2 36_0402_5%DDR_B_MA13 DDR_B_D[0..31]
6 DDR_B_D[0..31]
R617 1 2 36_0402_5%DDR_B_MA8
DDR_B_BS[0..2]
6 DDR_B_BS[0..2]
R228 1 2 DDR_B_MA7
36_0402_1% 6 DDR_B_ODT0 DDR_B_ODT0
6 DDR_B_CS0# DDR_B_CS0#
6 DDR_B_RAS# DDR_B_RAS#
6 DDR_B_CAS# DDR_B_CAS#
6 DDR_B_WE# DDR_B_WE#
6 DDR_B_CLK0 DDR_B_CLK0
6 DDR_B_CLK0# DDR_B_CLK0#
6 DDR_B_CKE0 DDR_B_CKE0
4 4
A
Dr-Bios.com B C
Issued Date
2011/06/24

Custom
Compal Secret Data
D
Date:
4019J1
SCHEMATIC MB A8203

E
Sheet 12 of 56
Rev
C
A B C D E
RTCRST close RAM door J1

+RTCBATT
1
1
R501 R652
+RTCVCC C439 @ 0_0603_5% @ 0_0603_5%
1U_0603_10V6K 20mil
2
2
1 2 PCH_RTCRST#
R356 20K_0402_5%
1 2 PCH_SRTCRST#
R357 20K_0402_5%
1
1
1 R372 1
C440 @ 0_0603_5% D26
1U_0603_10V6K BAS40-04_SOT23-3
2 +RTCVCC
2
20mil
2
+CHGRTC
1
C443
0.1U_0402_16V4Z
20mil
+RTCVCC 2
R358 1 2 1M_0402_5% SM_INTRUDER#
R355 1 2 330K_0402_5% PCH_INTVRMEN +3VS
INTVRMEN SERIRQ R118 2 1 10K_0402_5%

* H：Integrated VRM enable PCH_SATALED# R429 2 1 10K_0402_5%
L：Integrated VRM disable
(INTVRMEN should always be pull high.) U13A
+3VS PCH_RTCX1 A20 C38 LPC_AD0

RTCX1 FWH0 / LAD0 LPC_AD0 36,37
A38 LPC_AD1
LPC
FWH1 / LAD1 LPC_AD1 36,37
R109 1 @ 2 1K_0402_5% PCH_SPKR PCH_RTCX2 C20 B37 LPC_AD2
RTCX2 FWH2 / LAD2 LPC_AD2 36,37
HIGH= Enable ( No Reboot)Disable TCO timer system reboot feature C37 LPC_AD3
FWH3 / LAD3 LPC_AD3 36,37
PCH_RTCRST# D20 RTCRST#
* LOW= Disable (Default internal PD) PCH_SRTCRST# G22 SRTCRST#
FWH4 / LFRAME# D36 LPC_FRAME#
LPC_FRAME# 36,37
E36
RTC
+3VALW_PCH R46 SM_INTRUDER# LDRQ0# PCH_GPIO23
2
K22 INTRUDER# LDRQ1# / GPIO23 K36 PCH_GPIO23 18 2
1K_0402_5% +3VS
2 @ 1 HDA_SDOUT_PCH PCH_INTVRMEN C17 V5 SERIRQ SERIRQ 36,37
INTVRMEN SERIRQ
1
R73
36 HDA_SDO 2 @ 1 AM3 SATA_PRX_DTX_N0 31 R136
HDA_BITCLK_PCH SATA0RXN 10K_0402_5%
N34 HDA_BCLK SATA0RXP AM1 SATA_PRX_DTX_P0 31
SATA 6G
HDA_SDO 0_0402_5%
SATA0TXN AP7 SATA_PTX_DRX_N0 31 HDD1
HDA_SYNC_PCH L34 AP5 SATA_PTX_DRX_P0 31
2
HDA_SYNC SATA0TXP PCH_GPIO21
ME debug mode,this signal has a weak internal PD Switchable Graphic (MUX)
* Low = Disabled (Default) 38 PCH_SPKR
PCH_SPKR T10 SPKR SATA1RXN AM10 SATA_PRX_DTX_N1 34
2
High = Enabled [Flash Descriptor Security Overide]
HDA_RST_PCH# K34
SATA1RXP AM8
AP11
SATA_PRX_DTX_P1 34
mSATA UM77 not support R135
GPIO21
HDA_RST# SATA1TXN SATA_PTX_DRX_N1 34
+3VALW_PCH SATA1TXP AP10 SATA_PTX_DRX_P1 34
10K_0402_5% @
Switchable 0
38 HDA_SDIN0 HDA_SDIN0 E34 AD7 SATA_PRX_DTX_N2 31
* Non SG 1
1
HDA_SDIN0 SATA2RXN
R47 2 1 1K_0402_5% HDA_SYNC_PCH SATA2RXP AD5 SATA_PRX_DTX_P2 31
This signal has a weak internal pull-down G34 HDA_SDIN1 SATA2TXN AH5 SATA_PTX_DRX_N2 31 ODD
SATA2TXP AH4 SATA_PTX_DRX_P2 31
C34
IHDA
HDA_SDIN2
On Die PLL VR Select is supplied by SATA3RXN AB8
Prevent back drive issue. A34 HDA_SDIN3 SATA3RXP AB10
*1.5V when sampled high +5VS
SATA3TXN
SATA3TXP
AF3
AF1
UM77 not support
1.8V when sampled low HDA_SDOUT_PCH A36
SATA
HDA_SDO
SATA4RXN Y7
Needs to be pulled High for Huron River platfrom Y5
SATA4RXP
2
G
Q3 C36 AD3
R75 BSS138_G_SOT23-3 HDA_DOCK_EN# / GPIO33 SATA4TXN
SATA4TXP AD1
33_0402_5% 3 1HDA_SYNC_PCH N32 HDA_DOCK_RST# / GPIO13
HDA_BITCLK_PCH
S
38 HDA_BITCLK_AUDIO 1 2 SATA5RXN Y3
R30 R100 Y1
33_0402_5% R48 51_0402_5% SATA5RXP
SATA5TXN AB3
3 38 HDA_SYNC_AUDIO 1 2 HDA_SYNC_PCH_R 1 2 2 1 PCH_JTAG_TCK J3 AB1 3
R74 @ 0_0402_5% JTAG_TCK SATA5TXP
1
33_0402_5% PAD T6 @ PCH_JTAG_TMS +1.05VS_VTT

H7 Y11 L=500mil S=15mil
JTAG
HDA_RST_PCH# R29 JTAG_TMS SATAICOMPO
38 HDA_RST_AUDIO# 1 2
R72 1M_0402_5% PAD T11 @ PCH_JTAG_TDI K5 Y10 SATA_COMP 1 2
33_0402_5% JTAG_TDI SATAICOMPI R121 37.4_0402_1%
38 HDA_SDOUT_AUDIO 1 2 HDA_SDOUT_PCH PAD T25 @ PCH_JTAG_TDO H1
2
JTAG_TDO +1.05VS_VTT
SATA3RCOMPO AB12 L=500mil S=15mil
AB13 SATA3_COMP 1 2
PCH_SPI_CLK_2 SATA3COMPI R126 49.9_0402_1% +3VS
2 1
R433 33_0402_5%
PCH_SPI_CLK_1 2 1 PCH_SPI_CLK T3 AH1 RBIAS_SATA3 1 2
SPI_CLK SATA3RBIAS
1
R432 33_0402_5% R440 750_0402_1%
PCH_SPI_CS0#_1 2 1 PCH_SPI_CS0# Y14 R430
R127 33_0402_5% SPI_CS0# 4.7K_0402_5%
PCH_SPI_CS1#_2 2 1 PCH_SPI_CS1# T1
SPI
R435 33_0402_5% SPI_CS1# PCH_SATALED#

P3
2
PCH_SPI_MOSI_2 SATALED# PCH_GPIO19
2 1
R123 33_0402_5% PCH_SPI_MOSI V4 V14 PCH_GPIO21 No use PH 10K +3VS
SPI_MOSI SATA0GP / GPIO21
PCH_SPI_MOSI_1 2 1 Debug Port DG 1.2 PH 4.7K +3VS
R122 33_0402_5% U3 SPI_MISO SATA1GP / GPIO19 P1 PCH_GPIO19 GPIO19 has internal Pull up
PCH_SPI_MISO_1 2 1 PCH_SPI_MISO
R437 33_0402_5% COUGARPOINT_FCBGA989 Boot BIOS Strap
PCH_SPI_MISO_2 2 1
R438 33_0402_5%
+3VS Boot BIOS GPIO51 GPIO19
PCH_RTCX1
PCH_SPI_CS0#_1 1
U44
8
LPC 0 0
CS# VCC
1
R406
2
10M_0402_5%
PCH_RTCX2 +3VS R22
R89
1 2 3.3K_0402_5%
2 3.3K_0402_5%
SPI_WP1#
SPI_HOLD1#
3 WP# SCLK 6 PCH_SPI_CLK_1
PCH_SPI_MOSI_1
Reserved 0 1
1 7 HOLD# SI 5 Reserve for EMI
4
Y2
4 GND SO 2 PCH_SPI_MISO_1 C459
10P_0402_50V8J
- 1 0 4
SPI ROM FOR ME (4MB)
1 2
Footprint 200mil
EN25Q32B-104HIP_SO8
SA00004LI00
1
@
2 2
R434 @
1 PCH_SPI_CLK
33_0402_5% * SPI 1 1
Dr-Bios.com
32.768K 12.5PF 1TJF125DP1A000D +3VS
U46
PCH_SPI_CS1#_2 1 8
R21 SPI_WP2# CS# VCC PCH_SPI_CLK_2
1 1 +3VS 1 2 3.3K_0402_5% 3 WP# SCLK 6
C452 C451 R88 1 2 3.3K_0402_5% SPI_HOLD2# 7 5 PCH_SPI_MOSI_2
18P_0402_50V8J 18P_0402_50V8J 4
HOLD# SI
2 PCH_SPI_MISO_2 Security Classification Compal Secret Data Compal Electronics, Inc.
GND SO
SPI ROM FOR ME (2MB) 2011/06/24 2012/07/12 Title
2 2 EN25QH16-104HIP_SO8
Footprint 200mil SA00004UG00
Custom C
A B C D E
A B C D E
U13B +3VALW_PCH
PCIE_PRX_DTX_N1
No use PH 10K +3VALW SMB_ALERT# R33 10K_0402_5%
32 PCIE_PRX_DTX_N1 BG34 PERN1 1 2
32 PCIE_PRX_DTX_P1 PCIE_PRX_DTX_P1 BJ34 E12 SMB_ALERT# EC LID SW OUT
PERP1 SMBALERT# / GPIO11 SMB_ALERT# 36
PCIE LAN 32 PCIE_PTX_C_DRX_N1
C480 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_N1 AV32 PETN1
C478 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_P1 AU32 H14 PCH_SMBCLK DDR,WLAN,XDPSMBUS PCH_SMBCLK R405 1 2 2.2K_0402_5%
32 PCIE_PTX_C_DRX_P1 PETP1 SMBCLK PCH_SMBCLK 34
PH 2.2K +3VALW
34 PCIE_PRX_DTX_N2 PCIE_PRX_DTX_N2 BE34 C9 PCH_SMBDATA PCH_SMBDATA 34 PCH_SMBDATA R370 1 2 2.2K_0402_5%
PCIE_PRX_DTX_P2 PERN2 SMBDATA
34 PCIE_PRX_DTX_P2 BF34 PERP2
WLAN 34 PCIE_PTX_C_DRX_N2
C482 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_N2 BB32 PETN2
C481 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_P2 AY32 RST_GATE R391 1 2 1K_0402_5%
SMBUS
34 PCIE_PTX_C_DRX_P2 PETP2
A12 RST_GATE
SML0ALERT# / GPIO60 RST_GATE 6
33 PCIE_PRX_DTX_N3 PCIE_PRX_DTX_N3 BG36 PCH_GPIO74 R392 1 2 10K_0402_5%
PCIE_PRX_DTX_P3 PERN3
1 33 PCIE_PRX_DTX_P3 BJ36 PERP3 SML0CLK C8 S3 reduse No use PH 10K +3VALW 1
Card Reader 33 PCIE_PTX_C_DRX_N3
C485 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_N3 AV34 PETN3
C486 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_P3 AU34 G12 PCH_SML1CLK R403 1 2 2.2K_0402_5%
33 PCIE_PTX_C_DRX_P3 PETP3 SML0DATA
BF36 PCH_SML1DATA R369 1 2 2.2K_0402_5%
PERN4
BE36 PERP4
AY34 C13 PCH_GPIO74 S3 reduse No use PH 10K +3VALW
PETN4 SML1ALERT# / PCHHOT# / GPIO74 PCH_GPIO47 R25 10K_0402_5%
BB34 PETP4 1 2
E14 PCH_SML1CLK EC-PCH SMBUS
PCI-E*
SML1CLK / GPIO58
BG37 PERN5
BH37 M16 PCH_SML1DATA PH 2.2K +3VALW
PERP5 SML1DATA / GPIO75 +3VS
UM77 not support AY36 PETN5 For DDR
BB36 PETP5
+3VS PCIE port 4-7 R404
BJ38 4.7K_0402_5%
PERN6
2
R424 2 1 10K_0402_5% MINI1_CLKREQ# BG38 1 2 +3VS
Controller
PERP6
AU36 PETN6 CL_CLK1 M7
R110 2 1 10K_0402_5% PCH_GPIO20 AV36 PCH_SMBDATA 6 1 D_CK_SDATA D_CK_SDATA 11,37
PETP6
Link
+3VALW_PCH BG40 T11 Q34A
PERN7 CL_DATA1 DMN66D0LDW-7_SOT363-6 R371
BJ40 PERP7
R414 2 1 10K_0402_5% PCH_GPIO73 AY40 4.7K_0402_5%
PETN7
5
BB40 PETP7 CL_RST1# P10 1 2 +3VS
R389 2 1 10K_0402_5% LAN_CLKREQ#
BE38 PCH_SMBCLK 3 4 D_CK_SCLK D_CK_SCLK 11,37
R35 PERN8
2 1 10K_0402_5% CARD_CLKREQ# BC38 PERP8
AW38 Q34B
R50 PCH_GPIO44 PETN8
2 1 10K_0402_5% AY38 PETP8
DMN66D0LDW-7_SOT363-6
R32 1 10K_0402_5% PCH_GPIO45 PCH_GPIO47 +3VS

2 PEG_A_CLKRQ# / GPIO47 M10 No use PH 10K +3VALW Pull up at EC side.
Y40 CLKOUT_PCIE0N
R51 2 1 10K_0402_5% PCH_GPIO46 Y39 For VGA,EC
CLKOUT_PCIE0P
2
CLKOUT_PEG_A_N AB37 2
2
CLOCKS
No use PH 10K +3VALW PCH_GPIO73 J2 AB38
PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P
PCH_SML1DATA 6 1 EC_SMB_DA2 EC_SMB_DA2 12,22,27,36
AB49 AV22 CLK_CPU_DMI#
34 CLK_PCIE_MINI1# CLKOUT_PCIE1N CLKOUT_DMI_N CLK_CPU_DMI# 5
AB47 AU22 CLK_CPU_DMI Q33A
34 CLK_PCIE_MINI1 CLKOUT_PCIE1P CLKOUT_DMI_P CLK_CPU_DMI 5
WLAN DMN66D0LDW-7_SOT363-6
5
34 MINI1_CLKREQ# MINI1_CLKREQ# M1 PCIECLKRQ1# / GPIO18 CLK_CPU_DPLL#
No use PH 10K +3VS CLKOUT_DP_N / CLKOUT_BCLK1_N AM12
CLK_CPU_DPLL
CLK_CPU_DPLL# 5
PCH_SML1CLK EC_SMB_CK2
CLKOUT_DP_P / CLKOUT_BCLK1_P AM13 CLK_CPU_DPLL 5 120MHz for eDP. 3 4 EC_SMB_CK2 12,22,27,36
AA48 CLKOUT_PCIE2N
AA47 Q33B
CLKOUT_PCIE2P CLK_BUF_CPU_DMI# R152 1
CLKIN_DMI_N BF18 2 10K_0402_5% DMN66D0LDW-7_SOT363-6
No use PH 10K +3VS PCH_GPIO20 V10 BE18 CLK_BUF_CPU_DMI R147 1 2 10K_0402_5%
PCIECLKRQ2# / GPIO20 CLKIN_DMI_P
Y37 BJ30 CLKIN_GND1# R453 1 2 10K_0402_5%

32 CLK_PCIE_LAN# CLKOUT_PCIE3N CLKIN_DMI2_N
PCIE LAN 32 CLK_PCIE_LAN Y36 CLKOUT_PCIE3P CLKIN_DMI2_P BG30 CLKIN_GND1 R452 1 2 10K_0402_5%
No use PH 10K +3VALW 32 LAN_CLKREQ# LAN_CLKREQ# A8 PCIECLKRQ3# / GPIO25 CLK_BUF_DREF_96M# R99

CLKIN_DOT_96N G24 1 2 10K_0402_5%
E24 CLK_BUF_DREF_96M R93 1 2 10K_0402_5%
CLKIN_DOT_96P
33 CLK_PCIE_CARD# Y43 CLKOUT_PCIE4N
Card Reader 33 CLK_PCIE_CARD Y45 CLKOUT_PCIE4P
AK7 CLK_BUF_PCIE_SATA# R139 1 2 10K_0402_5%
CARD_CLKREQ# CLKIN_SATA_N / CKSSCD_N CLK_BUF_PCIE_SATA R138 1
No use PH 10K +3VALW 33 CARD_CLKREQ# L12 PCIECLKRQ4# / GPIO26 CLKIN_SATA_P / CKSSCD_P AK5 2 10K_0402_5%
CLK_BUF_ICH_14M R101 1
Pull down 10K ohm
V45 CLKOUT_PCIE5N REFCLK14IN K45 2 10K_0402_5%
V46 for using internal Clock
CLKOUT_PCIE5P
No use PH 10K +3VALW PCH_GPIO44 L14 H45 CLK_PCI_LPBACK
3 PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK CLK_PCI_LPBACK 17 3
2 1 1 2
R96 @ C29 @ 22P_0402_50V8J
AB42 V47 XTAL25_IN 33_0402_5%
22 CLK_PEG_VGA# CLKOUT_PEG_B_N XTAL25_IN
AB40 V49 XTAL25_OUT Reserve for EMI please close to PCH
22 CLK_PEG_VGA CLKOUT_PEG_B_P XTAL25_OUT
PEG_CLKREQ#_R R120 +1.05VS_VTT
E6 PEG_B_CLKRQ# / GPIO56 W=12mil S=15mil 90.9_0402_1%
Y47 XCLK_RCOMP 1 2
XCLK_RCOMP
V40 CLKOUT_PCIE6N
V42 CLKOUT_PCIE6P +3VS
No use PH 10K +3VALW PCH_GPIO45 T13 PCIECLKRQ6# / GPIO45
1
V38 K43 CLK_FLEX0 @ PAD
CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64 T7
R421
FLEX CLOCKS
V37 CLKOUT_PCIE7P
F47 CLK_FLEX1 @ PAD UMAO@ 10K_0402_5%
CLKOUTFLEX1 / GPIO65 T2
No use PH 10K +3VALW PCH_GPIO46 K12 PCIECLKRQ7# / GPIO46 CLK_FLEX2 @
H47 T26 PAD
2
CLKOUTFLEX2 / GPIO66 DGPU_PRSNT#
AK14 CLKOUT_BCLK0_N / CLKOUT_PCIE8N
AK13 K49 DGPU_PRSNT#
CLKOUT_BCLK0_P / CLKOUT_PCIE8P CLKOUTFLEX3 / GPIO67
2
R420 XTAL25_IN
COUGARPOINT_FCBGA989 DIS@ 10K_0402_5%
XTAL25_OUT 1 2
R431 1M_0402_5%
1
+3VALW_PCH DGPU_PWR_EN 17,41
25MHZ_10PF_7V25000014
1
GPIO67 3 3 1 1
1
R8
R27 DIS@ GND GND
DGPU_PRSNT# 1 1
4 10K_0402_5% 4
4 2
10K_0402_5%
DIS,Optimus 0 C457 Y3 C468
2
10P_0402_50V8J 10P_0402_50V8J
Dr-Bios.com
2
2 2
UMA 1
2
Q2
G
2N7002K_SOT23-3 R7 Pull high @ VGA side

PEG_CLKREQ#_R 1 3 1 2 PEG_CLKREQ# 22
@ 0_0402_5%
D
Security Classification Compal Secret Data

1
DIS@
@ R23 @ R12 2011/06/24 2012/07/12 Title
for safe
2.2K_0402_5% 2.2K_0402_5%
2
Custom C
A B C D E
A B C D E
U13C
4 DMI_CTX_PRX_N0 DMI_CTX_PRX_N0 BC24 BJ14 FDI_CTX_PRX_N0 FDI_CTX_PRX_N0 4

DMI_CTX_PRX_N1 DMI0RXN FDI_RXN0 FDI_CTX_PRX_N1 +RTCVCC
4 DMI_CTX_PRX_N1 BE20 DMI1RXN FDI_RXN1 AY14 FDI_CTX_PRX_N1 4
4 DMI_CTX_PRX_N2 DMI_CTX_PRX_N2 BG18 BE14 FDI_CTX_PRX_N2 FDI_CTX_PRX_N2 4
+3VALW DMI_CTX_PRX_N3 DMI2RXN FDI_RXN2 FDI_CTX_PRX_N3
4 DMI_CTX_PRX_N3 BG20 DMI3RXN FDI_RXN3 BH13 FDI_CTX_PRX_N3 4
BC12 FDI_CTX_PRX_N4 FDI_CTX_PRX_N4 4 DSWODVREN R350 2 1 330K_0402_5%
DMI_CTX_PRX_P0 FDI_RXN4 FDI_CTX_PRX_N5
4 DMI_CTX_PRX_P0 BE24 DMI0RXP FDI_RXN5 BJ12 FDI_CTX_PRX_N5 4
R26 2 @ 1 10K_0402_5% PCH_ACIN 4 DMI_CTX_PRX_P1 DMI_CTX_PRX_P1 BC20 BG10 FDI_CTX_PRX_N6 FDI_CTX_PRX_N6 4 R368 2 @ 1 330K_0402_5%
DMI_CTX_PRX_P2 DMI1RXP FDI_RXN6 FDI_CTX_PRX_N7
4 DMI_CTX_PRX_P2 BJ18 DMI2RXP FDI_RXN7 BG9 FDI_CTX_PRX_N7 4
4 DMI_CTX_PRX_P3 DMI_CTX_PRX_P3 BJ20 DSWODVREN - On Die DSW VR Enable
+3VALW_PCH DMI3RXP
1 4 DMI_CRX_PTX_N0
DMI_CRX_PTX_N0 AW24 DMI0TXN
FDI_RXP0
FDI_RXP1
BG14
BB14
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
4
4
* H：Enable internal DSW +1.05VS
1
DMI_CRX_PTX_N1 AW20 BF14 FDI_CTX_PRX_P2 FDI_CTX_PRX_P2 4 L：Disable
4 DMI_CRX_PTX_N1 DMI1TXN FDI_RXP2
R34 2 @ 1 10K_0402_5% SUSWARN# DMI_CRX_PTX_N2 BB18 BG13 FDI_CTX_PRX_P3 FDI_CTX_PRX_P3 4 Must always PH at +RTCVCC
4 DMI_CRX_PTX_N2 DMI2TXN FDI_RXP3
DMI_CRX_PTX_N3 AV18 BE12 FDI_CTX_PRX_P4
DMI
FDI
4 DMI_CRX_PTX_N3 DMI3TXN FDI_RXP4 FDI_CTX_PRX_P4 4
R49 2 1 10K_0402_5% PCH_GPIO72 BG12 FDI_CTX_PRX_P5 FDI_CTX_PRX_P5 4
DMI_CRX_PTX_P0 FDI_RXP5 FDI_CTX_PRX_P6
4 DMI_CRX_PTX_P0 AY24 DMI0TXP FDI_RXP6 BJ10 FDI_CTX_PRX_P6 4
R390 2 1 10K_0402_5% RI# DMI_CRX_PTX_P1 AY20 BH9 FDI_CTX_PRX_P7 +3VALW_PCH
4 DMI_CRX_PTX_P1 DMI1TXP FDI_RXP7 FDI_CTX_PRX_P7 4
DMI_CRX_PTX_P2 AY18
4 DMI_CRX_PTX_P2 DMI2TXP
DMI_CRX_PTX_P3 AU18 PCH_PCIE_WAKE# R374 1 2 10K_0402_5%
4 DMI_CRX_PTX_P3 DMI3TXP
R393 2 1 200_0402_5% PM_DRAM_PWRGD AW16 FDI_INT
FDI_INT FDI_INT 4
Follow Tacoma 1.0 +1.05VS_VTT FDI_FSYNC0 PCH_GPIO29 R36 @
L=500mil S=15mil BJ24 DMI_ZCOMP FDI_FSYNC0 AV12 FDI_FSYNC0 4 1 2 10K_0402_5%
R394 2 1 10K_0402_5% PCH_RSMRST#
1 2 DMI_IRCOMP BG25 BC10 FDI_FSYNC1 +3VS
DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 4
R156 49.9_0402_1%
1 2 DMI2RBIAS BH21 AV14 FDI_LSYNC0 CLKRUN# R423 1 2 8.2K_0402_5%
DMI2RBIAS FDI_LSYNC0 FDI_LSYNC0 4
R155 750_0402_1%
BB10 FDI_LSYNC1
FDI_LSYNC1 FDI_LSYNC1 4
4mil width and place
within 500mil of the PCH
A18 DSWODVREN
DSWVRMEN
not support Deep S4,S5
System Power Management

can be left unconnected. SUSACK#
not support Deep S4,S5 DPWROK mux with RSMRST#
36 SUSACK# 1 2 SUSACK#_R C12 SUSACK# DPWROK E22 PCH_DPWROK PCH_DPWROK 36
Check list1.5 P.81 R375 0_0402_5% check list1.5 P.50
5 XDP_DBRESET# 1 @ 2 XDP_DBRESET#_R K3 B9 PCH_PCIE_WAKE# PCH_PCIE_WAKE# 34
R415 0_0402_5% SYS_RESET# WAKE# PCH_DPWROK
2 2
1
SYS_PWROK P12 N3 CLKRUN# CLKRUN# 37 No use PH 10K +3VS
SYS_PWROK CLKRUN# / GPIO32 R153
not support AMT APWROK can mux 100K_0402_5%
with PWROK (check list1.5 P.47) PCH_PWROK 1 2 PCH_PWROK_R L22 G8 SUS_STAT# T1@ PAD
R107 0_0402_5% PWROK SUS_STAT# / GPIO61
2
L10 N14 SUSCLK
APWROK SUSCLK / GPIO62 SUSCLK 36
T36 @ PAD
PM_DRAM_PWRGD B13 D10 PM_SLP_S5#
5 PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63 PM_SLP_S5# 36
T27 @ PAD
36 PCH_RSMRST# PCH_RSMRST# C21 H4 PM_SLP_S4#
RSMRST# SLP_S4# PM_SLP_S4# 36
T22 @ PAD
Can be left NC
36 SUSWARN#
SUSWARN# K16 F4 PM_SLP_S3#
PM_SLP_S3# 36
when IAMT is not
SUSWARN# / SUS_PWR_DN_ACK / GPIO30 SLP_S3#
support on the
36 PBTN_OUT# PBTN_OUT# E20 PWRBTN# SLP_A# G10 SLP_A# T4@ PAD platfrom
D3 T23 @ PAD not support
36 ACPRESENT 1 2 PCH_ACIN 36,40,41,44,45 ACIN 1 2 PCH_ACIN H20 G16 SLP_SUS#
ACPRESENT / GPIO31 SLP_SUS# SLP_SUS# 36 Deep S4,S5 can NC
R621 0_0402_5% @
RB751V-40_SOD323-2
PCH_GPIO72 H_PM_SYNC
PCH EDS1.5 P.75
No use PH 10K +3VALW E10 BATLOW# / GPIO72 PMSYNCH AP14 H_PM_SYNC 5
3 3
Ring Indicator CRB1.0 PH 10K +3VALW RI# A10 K14 PCH_GPIO29 No use PH 10K +3VALW
RI# SLP_LAN# / GPIO29
COUGARPOINT_FCBGA989
+3VS ALL power OK

tell PCH all power ok
but cpu core
5
U36
2 B
P
36 PCH_PWROK
4 SYS_PWROK
Y SYS_PWROK 5
49 VGATE 1 A
G
1
MC74VHC1G08DFT2G_SC70-5 1
3
R104 R119 C52

10K_0402_5% 10K_0402_5%
0.047U_0402_16V7K
@2
2
4 4
A
Dr-Bios.com B
Compal Secret Data
Deciphered Date
2012/07/12

C D
Title
Date:
4019J1
SCHEMATIC MB A8203
Thursday, June 14, 2012 Sheet

E
15 of 56
Rev
C
A B C D E
UMA Panel Backlight ON/OFF U13D

IGPU_BKLT_EN J47 AP43
@ L_BKLTEN SDVO_TVCLKINN
29 PCH_ENVDD M45 L_VDD_EN SDVO_TVCLKINP AP45
ENBKL 2 1 IGPU_BKLT_EN
36 ENBKL
R102 0_0402_5% P45 AM42
29 DPST_PWM L_BKLTCTL SDVO_STALLN
PD 100K PCH_LCD_CLK SDVO_STALLP AM40
T40 L_DDC_CLK
at EC side PCH_LCD_DATA K47 AP39
L_DDC_DATA SDVO_INTN
CTRL_CLK SDVO_INTP AP40 SDVO_CTRLDATA strap pull high
+3VS L=500mil S=20mil T45 L_CTRL_CLK at level shift page
1 Change to eDP only CTRL_DATA P39 L_CTRL_DATA
1
2.37K_0402_1%
R108 1 @ 2 2.2K_0402_5% CTRL_CLK R132 2 @ 1 LVDS_IBG AF37 P38 SDVO_SCLK
LVD_IBG SDVO_CTRLCLK SDVO_SCLK 30
AF36 M39 SDVO_SDATA
LVD_VBG SDVO_CTRLDATA SDVO_SDATA 30
R105 1 @ 2 2.2K_0402_5% CTRL_DATA DIS only can NC W=10mil S=30mil LVD_VREF AE48
R131 @ LVD_VREFH
UMA LVDS DDC 2
0_0402_5%
1 AE47 LVD_VREFL DDPB_AUXN AT49
DDPB_AUXP AT47
R428 1 @ 2 2.2K_0402_5% PCH_LCD_CLK AT40 PCH_DPB_HPD
DDPB_HPD PCH_DPB_HPD 30
AK39
LVDS
R425 @ PCH_LCD_DATA LVDSA_CLK# PCH_DPB_N0
1 2 2.2K_0402_5% AK40 LVDSA_CLK DDPB_0N AV42 PCH_DPB_N0 30
AV40 PCH_DPB_P0 PCH_DPB_P0 30 HDMI D2
DDPB_0P PCH_DPB_N1
Check list1.5 P.60 disable Graphics AN48 LVDSA_DATA#0 DDPB_1N AV45 PCH_DPB_N1 30
Digital Display Interface

AM47 AV46 PCH_DPB_P1 PCH_DPB_P1 30 HDMI D1
ALL Can NC LVDSA_DATA#1 DDPB_1P PCH_DPB_N2
AK47 LVDSA_DATA#2 DDPB_2N AU48 PCH_DPB_N2 30
AJ48 AU47 PCH_DPB_P2 HDMI D0
but DAC_IREF still need PD LVDSA_DATA#3 DDPB_2P PCH_DPB_N3
PCH_DPB_P2 30
DDPB_3N AV47 PCH_DPB_N3 30
AN47 AV49 PCH_DPB_P3 PCH_DPB_P3 30 HDMI CLK
LVDSA_DATA0 DDPB_3P
AM49 LVDSA_DATA1
LVDS disable: AK49 LVDSA_DATA2
AJ47 LVDSA_DATA3 DDPC_CTRLCLK P46
DATA/Clock/Control an NC P42
DDPC_CTRLDATA
VCC_TX_LVDS,VCCA_LVDS PD to GND
AF40 LVDSB_CLK#
2
AF39 LVDSB_CLK DDPC_AUXN AP47 2
CRT disable: UM77 not support DDPC_AUXP AP49
AH45 LVDSB_DATA#0 DDPC_HPD AT38
DATA/Clock/Control an NC LVDS/CRT AH47 LVDSB_DATA#1
VCCADAC connect to +3VS AF49 LVDSB_DATA#2 DDPC_0N AY47
AF45 LVDSB_DATA#3 DDPC_0P AY49
DAC_IREF connect 1K_0402_5% DDPC_1N AY43
AH43 LVDSB_DATA0 DDPC_1P AY45
AH49 LVDSB_DATA1 DDPC_2N BA47
AF47 LVDSB_DATA2 DDPC_2P BA48
AF43 LVDSB_DATA3 DDPC_3N BB47
DDPC_3P BB49
N48 CRT_BLUE DDPD_CTRLCLK M43

P49 CRT_GREEN DDPD_CTRLDATA M36
T49 CRT_RED
AT45
CRT
DDPD_AUXN
T39 CRT_DDC_CLK DDPD_AUXP AT43
M40 CRT_DDC_DATA DDPD_HPD BH41
DDPD_0N BB43
M47 CRT_HSYNC DDPD_0P BB45
M49 CRT_VSYNC DDPD_1N BF44
3
DDPD_1P BE44 3
DDPD_2N BF42
CRT_IREF T43 BE42
DAC_IREF DDPD_2P
T42 CRT_IRTN DDPD_3N BJ42
1 DDPD_3P BG42
R114 COUGARPOINT_FCBGA989
1K_0402_5%
CRT disable
2
use 1K_0402_5%
4 4
Dr-Bios.com
2011/06/24 2012/07/12 Title
A B C D E
A B C D E
+3VS
1 2 PCI_PIRQC# U13E
R79 8.2K_0402_5% AY7
PCI_PIRQB# NV_CE#0
1 2 NV_CE#1 AV7
R80 8.2K_0402_5% BG26 AU3
PCI_PIRQA# TP1 NV_CE#2
1 2 BJ26 TP2 NV_CE#3 BG4
R81 8.2K_0402_5% BH25
PCI_PIRQD# TP3
1 2 BJ16 TP4 NV_DQS0 AT10
R82 8.2K_0402_5% BG16 BC8
TP5 NV_DQS1
AH38 TP6
1 2 PCH_GPIO55 AH37 AU2
R90 8.2K_0402_5% TP7 NV_DQ0 / NV_IO0
AK43 TP8 NV_DQ1 / NV_IO1 AT4
1 PCH_GPIO53 1
1 2 AK45 TP9 NV_DQ2 / NV_IO2 AT3
R240 8.2K_0402_5% C18 AT1
PCH_GPIO52 TP10 NV_DQ3 / NV_IO3
1 2 N30 TP11 NV_DQ4 / NV_IO4 AY3
R246 8.2K_0402_5% H3 AT5
PCH_GPIO5 TP12 NV_DQ5 / NV_IO5
1 2 AH12 AV3
NVRAM
R251 8.2K_0402_5% TP13 NV_DQ6 / NV_IO6
AM4 TP14 NV_DQ7 / NV_IO7 AV1
AM5 TP15 NV_DQ8 / NV_IO8 BB1
1 2 PCH_GPIO51 Y13 BA3
R294 8.2K_0402_5% TP16 NV_DQ9 / NV_IO9
K24 TP17 NV_DQ10 / NV_IO10 BB5
1 2 PCH_GPIO2 L24 BB3
R395 8.2K_0402_5% TP18 NV_DQ11 / NV_IO11
AB46 TP19 NV_DQ12 / NV_IO12 BB7
1 2 ODD_DA# AB45 BE8
RSVD
R409 8.2K_0402_5% TP20 NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14 BD4
1 2 PCH_GPIO4 BF6
R514 8.2K_0402_5% NV_DQ15 / NV_IO15
B21 TP21 NV_ALE AV5
1 2 DGPU_PWR_EN M20 AY1 DF_TVS
R401 10K_0402_5% TP22 NV_CLE
AY16 TP23 DMI,FDI Termination Voltage
BG46 TP24 NV_RCOMP AV10
+3VS
Set to Vcc when HIGH HR CPU NC
NV_RB# AT8 DF_TVS
R66
1
@
2
8.2K_0402_5% PCH_USB3_RX1_N
Set to Vss when LOW CR CPU PD
35 PCH_USB3_RX1_N BE28 TP25 NV_RE#_WRB0 AY5
35 PCH_USB3_RX2_N PCH_USB3_RX2_N BC30 BA2
DGPU_HOLD_RST# TP26 NV_RE#_WRB1
R41
1 2
8.2K_0402_5%
BE32 TP27 CR Check list P.89 PH 2.2K series 1K
BJ32 TP28 NV_WE#_CK0 AT12
35 PCH_USB3_RX1_P PCH_USB3_RX1_P BC28 BF3
PCH_USB3_RX2_P TP29 NV_WE#_CK1
35 PCH_USB3_RX2_P BE30 TP30
BF32 +1.8VS
TP31 USB20_N0
USB3.0 PCH_USB3_TX1_N
BG32 TP32 USBP0N C24
USB20_P0
USB20_N0 35 USB3 (Right side)
35 PCH_USB3_TX1_N AV26 TP33 USBP0P A24 USB20_P0 35
1
PCH_USB3_TX2_N BB26 C25 USB20_N1 USB3 (Mid side)
2 35 PCH_USB3_TX2_N TP34 USBP1N USB20_N1 35 2
AU28 B25 USB20_P1 R145
TP35 USBP1P USB20_P1 35
Boot BIOS Strap AY30 C26 2.2K_0402_5%
PCH_USB3_TX1_P TP36 USBP2N
35 PCH_USB3_TX1_P AU26 TP37 USBP2P A26
GPIO19 GPIO51 Boot BIOS PCH_USB3_TX2_P AY26 K28 USB3/B (right side)
35 PCH_USB3_TX2_P
2
TP38 USBP3N DF_TVS
AV28 TP39 USBP3P H28 2 1 H_SNB_IVB# 5
Bit11 Bit10 Destination AW30 TP40 USBP4N E28 3D Panel EHCI 1 R146 1K_0402_5%
GNT1#/ USBP4P D28
GPIO51 0 1 Reserved USBP5N C28 CLOSE TO THE BRANCHING POINT
USBP5P A28
1 0 PCI USBP6N C29
USBP6P B29
Internal
PH
1 1 SPI * PCI Interrupt Requests
PCI_PIRQA#
PCI_PIRQB#
K40
K38
PIRQA# USBP7N N28
M28
UM77,HM76,HM75 not support USB port 6 & 7.&12,13
PCI
PCI_PIRQC# PIRQB# USBP7P USB20_N8
0 0 LPC PCI_PIRQD#
H38 PIRQC# USBP8N L30
USB20_P8
USB20_N8 34
G38 PIRQD# USBP8P K30
USB20_N9
USB20_P8 34 Mini Card (WLAN)
USBP9N G30 USB20_N9 35
DGPU_HOLD_RST# USB20_P9 +3VALW_PCH
CR Check list 1.5 only use for GPIO C46 E30 USB2 (Left side)
USB
REQ1# / GPIO50 USBP9P USB20_P9 35
PCH_GPIO52 C44 C30 USB20_N10
No use PH +3VS REQ2# / GPIO52 USBP10N USB20_N10 29
DGPU_PWR_EN E40 A30 USB20_P10 CMOS Camera (LVDS) USB_OC0# 2 1
14,41 DGPU_PWR_EN REQ3# / GPIO54 USBP10P USB20_P10 29
Only GPIO USBP11N L32 EHCI 2 R24 10K_0402_5%
CR Check list 1.5 only use for GPIO PCH_GPIO51 D47 K32
function PCH_GPIO53 GNT1# / GPIO51 USBP11P USB20_N12 USB_OC7#
E42 G32 USB20_N12 34 2 1
無須PH(Internal PH),如做GPIO PH +3VS PCH_GPIO55 F46
GNT2# / GPIO53 USBP12N
E32 USB20_P12
USB20_P12 34 Mini Card (MSATA) R367 10K_0402_5%
GNT3# / GPIO55 USBP12P USB_OC5#
USBP13N C32 2 1
A32 Bluetooth R378 10K_0402_5%
PCH_GPIO2 USBP13P
G42 PIRQE# / GPIO2
ODD_DA# G40 USB_OC6# 2 1
31 ODD_DA# PIRQF# / GPIO3
PCH_GPIO4 C42 C33 USBRBIAS 1 2 R377 10K_0402_5%
ODD_DA# PCH_GPIO5 PIRQG# / GPIO4 USBRBIAS# R399 22.6_0402_1%
D44 PIRQH# / GPIO5
+3VALW_PCH
PAD T5 @ USBRBIAS B33 L=500mil S=15mil
1 K10 PME#
3 C455 USB_OC1# 3
2 1
0.1U_0402_16V4Z PLT_RST# C6 A14 USB_OC0# R520 10K_0402_5%
5,32,33,36,37 PLT_RST# PLTRST# OC0# / GPIO59 USB_OC0# 35
K20 USB_OC1# USB_OC4# 2 1
2 OC1# / GPIO40 USB_OC1# 35
Place near PCH B17 USB_OC2# R539 10K_0402_5%
CLK_PCI_LPBACK R417 OC2# / GPIO41
14 CLK_PCI_LPBACK 2 1 22_0402_5% CLK_PCI0 H49 CLKOUT_PCI0 OC3# / GPIO42 C16 USB_OC3# USB_OC3# 2 1
Add for ESD CLK_PCI_LPC R84 1 2 22_0402_5% CLK_PCI1 H43 L16 USB_OC4# R566 10K_0402_5%
36 CLK_PCI_LPC CLKOUT_PCI1 OC4# / GPIO43 USB_OC4# 35
CLK_PCI_TPM R333 1 2 22_0402_5% CLK_PCI2 J48 A16 USB_OC5# USB_OC2# 2 1
37 CLK_PCI_TPM CLKOUT_PCI2 OC5# / GPIO9
PAD T9 @ CLK_PCI3 K42 D14 USB_OC6# R594 10K_0402_5%
PAD T8 @ CLK_PCI4 CLKOUT_PCI3 OC6# / GPIO10 USB_OC7#
H40 CLKOUT_PCI4 OC7# / GPIO14 C14
R10
0_0402_5%
2 1
@
+3VS
5
U25
PLT_RST# 2 B
P
Y 4 PLT_RST_BUF# 32,34
1 2 IRST_RST_R# 1 A
G
R161 @ 0_0402_5%
36 IRST_RST# IRST_RST# 1 2 R11
3
R162 0_0402_5% 100K_0402_5%
MC74VHC1G08DFT2G_SC70-5
2
4 +3VS 4
Dr-Bios.com
5
U29 R6
2 B 100_0402_5%
P
Y 4 1 2 PLTRST_VGA# 22
DGPU_HOLD_RST# 1 DIS@
A
G

1
3
R3 2011/06/24 2012/07/12 Title

100K_0402_5%
MC74VHC1G08DFT2G_SC70-5 DIS@
DIS@ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2
A B C D E
A B C D E
HDA_SYNC PH(PLL =+1.5VS)

+3VS +3VS +3VS
GPIO28 Project ID GPIO69 GPIO70
On-Die PLL Voltage Regulator * x 0 0 0
1
This signal has a weak internal pull up R68 R67 R69
x 0 0 1
* H：On-Die PLL voltage regulator enable
L：On-Die PLL Voltage Regulator disable
10K_0402_5% 10K_0402_5% @ 10K_0402_5% @
x 0 1 0
12/19 modify
2
PCH_GPIO71 PCH_GPIO69 PCH_GPIO70
+3VALW_PCH x 0 1 1
2
Fan Tachometer Inputs
GPIO71 R43 R42 R44 x 1 0 0
1
1 10K_0402_5% 10K_0402_5% 10K_0402_5% 1

R411 TACH1~7 only on server GDDR5 1 @ x 0 0 1
4.7K_0402_5% can insted to GPIO GDDR3 0 x 0 1 0
1
x 0 1 1
2
PCH_GPIO28 U13F
x 1 0 0
2
No use PH 10K +3VS PCH_GPIO0 T7 C40 ODD_EN#

BMBUSY# / GPIO0 TACH4 / GPIO68 ODD_EN# 31
R413
@ 1K_0402_5% No use PH 10K +3VS PCH_GPIO1 A42 B41 PCH_GPIO69 x 1 0 1
TACH1 / GPIO1 TACH5 / GPIO69
No use PH 10K +3VS PCH_GPIO6 H36 C41 PCH_GPIO70 +3VS x 1 1 0
1
TACH2 / GPIO6 TACH6 / GPIO70

Debug Port DG 1.2 PH 4.7K +3VALW_PCH EC_SCI# PCH_GPIO71 x 1 1 1
No use PH 10K +3VS 36 EC_SCI# E38 TACH3 / GPIO7 TACH7 / GPIO71 A40
2
No use PH 10K +3VALW 36 EC_SMI# EC_SMI# C10 R106
GPIO8
10K_0402_5%
Deep S4,S5 wake event signal No use PH +3VALW PCH_GPIO12 C4 LAN_PHY_PWR_CTRL / GPIO12
1
RTC alarm,Power BTN,GPIO27 No use PH +3VALW 36 EC_LID_OUT#
EC_LID_OUT# G2 P4 GATEA20 36
GPIO15 A20GATE
PCH_GPIO27 (Have internal Pull-High) PCH_PECI_R @
AU16 1 2 PECI CPU-EC
CPU/MISC
Deep S4,S5 wake event signal PECI H_PECI 5,36
No use PH +3VS 34 MSATA_DET# MSATA_DET# U2 0_0402_5% R158
SATA4GP / GPIO16 EC_KBRST#
RCIN# P5 EC_KBRST# 36 CTRL+ALT+DEL
No use PH +3VS
GPIO
50 VGA_PWROK R45 1 2 0_0402_5% DGPU_PWROK D40 AY11 non CPU power ok
TACH0 / GPIO17 PROCPWRGD H_CPUPWRGD 5
R83 1 @ 2 10K_0402_5% PCH_GPIO27
No use PH 10K +3VS RAM flag PCH_GPIO22 T5 AY10 PCH_THRMTRIP#_R 1 2 H_THRMTRIP# H_THRMTRIP# 5 130c shut down
SCLOCK / GPIO22 THRMTRIP# R159 390_0402_5%
No use PH +3VALW DDR3/DDR3L PCH_GPIO24 E8 T14
GPIO24 / MEM_LED INIT3_3V#
PCH_GPIO27
INIT3_3V Checklist1.5 P.69
2 +3VS No use PD 10K to GND E16 GPIO27 +3VS 2
PCH_GPIO28
This signal has weak internal
No use PH 10K +3VALW P8 GPIO28 PU, can't pull low,leave NC
NC_1 AH8
R439 2 1 200K_0402_5% ODD_DETECT# No use PH 10K +3VS BT ON/OFF PCH_GPIO34 K1 STP_PCI# / GPIO34
AK11 EC_KBRST# R103 1 2 10K_0402_5%
PAD T12 @ PCH_GPIO35 NC_2
+3VALW_PCH No use can NC K4 GPIO35 ODD_EN# R400
NC_3 AH10 TS_VSS1~4 1 2 10K_0402_5%
Can't PH 31 ODD_DETECT# ODD_DETECT# V8
R261 @ EC_SMI# SATA2GP / GPIO36 PD to GND
1 2 1K_0402_5% NC_4 AK10
Can't PH PAD T10 @ PCH_GPIO37 M5 SATA3GP / GPIO37
NC_5 P37
No use PH 10K +3VS Optimus(L)/ non optimus(H) OPTIMUS_EN# N2 SLOAD / GPIO38
SATA2GP/GPIO36 & SATA3GP/GPIO37 PCH_GPIO39
Sampled at Rising edge of PWROK. No use PH 10K +3VS RAM flag M3 SDATAOUT0 / GPIO39
No use PH 10K +3VS PCH_GPIO48 V13 BG2
Weak internal pull-down. SDATAOUT1 / GPIO48 VSS_NCTF_15
(weak internal pull-down is disabled SATA5GP&TEMP_ALERT# CRB PH 10K +3VS PCH_GPIO49 V3 SATA5GP / GPIO49 VSS_NCTF_16 BG48 9/15 Layout
after PLTRST# de-asserts) PCH_GPIO57 request remove
No use PH +3VALW D6 GPIO57 VSS_NCTF_17 BH3
NOTE: This signal should NOT be Test point
pulled high when strap is sampled VSS_NCTF_18 BH47
They will route
+3VS A4 BJ4
VSS_NCTF_1 VSS_NCTF_19 by itself
UMAO@ 9/15 Layout A44 BJ44
R427 VSS_NCTF_2 VSS_NCTF_20
1 2 10K_0402_5% OPTIMUS_EN#
+3VS request remove A45 BJ45
DIS@ VSS_NCTF_3 VSS_NCTF_21
Test point
NCTF
R112 1 2 10K_0402_5% PCH_GPIO0 R426 1 2 10K_0402_5% A46 BJ46
They will route VSS_NCTF_4 VSS_NCTF_22
R402 1 2 10K_0402_5% PCH_GPIO1 A5 BJ5
3 by itself VSS_NCTF_5 VSS_NCTF_23 3
R70 1 2 10K_0402_5% PCH_GPIO6 GPIO38 A6 BJ6
VSS_NCTF_6 VSS_NCTF_24
R115 MSATA_DET#
OPTIMUS_EN#
1 2 10K_0402_5% B3 VSS_NCTF_7 VSS_NCTF_25 C2
R71 1 2 10K_0402_5% DGPU_PWROK

* Muxless 0 B47 C48
nonMuxless 1 BD1 D1
BD49 VSS_NCTF_10 VSS_NCTF_28 D49 GPIO39 GPIO23 GPIO22
+3VALW_PCH
R416 1 2 10K_0402_5% PCH_GPIO34 BE1 VSS_NCTF_11 VSS_NCTF_29 E1 EVT MICRON 4G 0 0 0
R128 1 2 10K_0402_5% PCH_GPIO48 R92 1 2 10K_0402_5% PCH_GPIO24 BE49 VSS_NCTF_12 VSS_NCTF_30 E49 EVT ELPIDA 4G 0 0 1
on board ram flag
R111 1 2 10K_0402_5% PCH_GPIO49
R94 1 @ 2 10K_0402_5%
BF1 VSS_NCTF_13 VSS_NCTF_31 F1 DVT HYNIX 2G 0 1 0
+3VALW_PCH
BF49 VSS_NCTF_14 VSS_NCTF_32 F49 DVT ELPIDA 2G 0 1 1
GPIO24 COUGARPOINT_FCBGA989 +3VS +3VS +3VS
R376
PCH_GPIO24
1 2 10K_0402_5% PCH_GPIO12
1
R412 1 2 1K_0402_5% EC_LID_OUT# DDR3L 0 R419 R398 R97
R52 1 2 10K_0402_5% PCH_GPIO57

* DDR3 1 10K_0402_5%
@
10K_0402_5%
RAM@
10K_0402_5%
ELPIDA@
2
PCH_GPIO39 PCH_GPIO23 PCH_GPIO22
PCH_GPIO23 13
GPIO24 Unmultiplexed
1
NOTE: GPIO24 configuration GPIO36/GPIO37 is Strap functionality R418 R397 R98
4 10K_0402_5% 4
register bits are not cleared by that requires internal pull down to be sampled at rising PWROK. RAM@
1K_0402_5%
@
10K_0402_5%
HYNIX@
CF9h reset event. When uses as SATA2GP/SATA3GP for mechanical presence detect
Dr-Bios.com 2
2
CRB1.0 PH10K to +3VALW -use a external pull up 150K-200K ohm to Vcc3_3
When used as GP input
-ensure GPI is not driven high during strap sampling window
When Unused as GPIO or SATA*GP Security Classification Compal Secret Data Compal Electronics, Inc.
-use 8.2K-10K pull-down 2011/06/24 2012/07/12 Title
check list page 47
A B C D E
A B C D E
Thermal Senser share with VCCADAC power rail

so can't remove this power
+1.05VS_VTT U13G POWER +3VS

L16 SM010014520 3000ma
1300mA Place Near U48 FBMA-L11-201209-221LMA30T_0805
+1.05VS_VTT +VCCADAC
220ohm@100mhz
AA23 VCCCORE[1] VCCADAC U48 2 1
AC23 DCR 0.04
VCCCORE[2] 1mA 1 1 1
10U_0603_6.3V6M
C106
1U_0402_6.3V6K
C64
1U_0402_6.3V6K
C67
1U_0402_6.3V6K
C75
CRT
1 1 1 1 AD21 C53 C54 C40
VCCCORE[3] 10U_0603_6.3V6M
AD23 VCCCORE[4] VSSADAC U47
VCC CORE
AF21 0.01U_0402_16V7K 0.1U_0402_16V7K
VCCCORE[5] 2 2 2
AF23 VCCCORE[6]
1 2 2 2 2 +3VS 1
AG21 VCCCORE[7] 1121 LVDS@ ->@
AG23 VCCCORE[8]
AG24 AK36 +VCCA_LVDS 1 2
VCCCORE[9] VCCALVDS R442 @ 0_0805_5%
AG26 VCCCORE[10] 1mA
1
Place Near AA23 AG27 VCCCORE[11] VSSALVDS AK37
R441
AG29 VCCCORE[12]
AJ23 0_0402_5% 1121 EDP@->POP
LVDS
VCCCORE[13]
AJ26 VCCCORE[14] VCCTX_LVDS[1] AM37
AJ27
2
VCCCORE[15]
AJ29 VCCCORE[16] VCCTX_LVDS[2] AM38
AJ31 VCCCORE[17] Place Near AM37 +VCCTX_LVDS
60mA VCCTX_LVDS[3] AP36
+1.05VS_VTT
1
VCCTX_LVDS[4] AP37 12/20 DEL +VCCTX_LVDS R157
AN19 VCCIO[28] 0_0402_5%
0.1uH inductor, 200mA
+VCCAPLLEXP BJ22 +3VS

266mA
2
VCCAPLLEXP
1121 EDP@->POP
On-Die PLL Voltage Regulator V33
HVCMOS
VCC3_3[6]
AN16 VCCIO[15] Place Near V33
H：On-Die PLL voltage regulator 1
enable
AN17 VCCIO[16] C61
I/O Buffer Voltage
VCC3_3[7] V34
VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 2925mA 2
0.1U_0402_16V7K
AN21 VCCIO[17]
,VCCAPLLSATA PCH Power Rail Table
AN26 +1.5VS
VCCIO[18]
S0 Iccmax
AN27 VCCIO[19] VCCVRM[3] AT16 Voltage Rail Voltage Current(A)
+1.05VS_VTT +1.05VS_VTT Internal PLL and VRM(+1.5VS)
AP21 VCCIO[20]
2 2
V_PROC_IO 1.05 0.001 Processor I/F
AP23 VCCIO[21] VCCDMI[1] AT20
1 DMI buffer logic
DMI
10U_0603_6.3V6M
C80
1U_0402_6.3V6K
C87
1U_0402_6.3V6K
C88
1U_0402_6.3V6K
C90
1U_0402_6.3V6K
C86
1 1 1 1 1 AP24 C96 V5REF 5 0.001 PCH Core Well Reference Voltage

VCCIO
VCCIO[22] 1U_0402_6.3V6K
AP26
20mA AB36
VCCIO[23] VCCIO[1] 2 place V5REF_Sus 5 0.001 Suspend Well Reference Voltag
2 2 2 2 2
AT24 VCCIO[24] near AT20 Core Well I/O Buffer
Vcc3_3 3.3 0.266 I/O Buffer Voltage
AN33 VCCIO[25] 190mA
Place Near AN16,AN21,AN33 Display DAC Analog Power. This power is
+3VS
AN34 VCCIO[26] VCCPNAND[1] AG16
+1.8VS VccADAC 3.3 0.001 supplied by the core well.
VccDFTERM should PH +1.8VS or +3VS
NAND / SPI
BH29 VCC3_3[3] VCCPNAND[2] AG17 VccADPLLA 1.05 0.08 Display PLL A power
1 1
C107 C81
0.1U_0402_16V7K +1.5VS 0.1U_0402_16V7K
VCCPNAND[3] AJ16 VccADPLLB 1.05 0.08 Display PLL B power
Place Near 2 2
AP16 VCCVRM[2]
place
BH29 AJ17 near AG16 VccCore 1.05 1.3 Internal Logic Voltage
VCCPNAND[4]
PAD @ +1.05VS_VCCAPLL_FDI BG6
T17 VCCFDIPLL
+1.05VS_VTT +3VS VccDMI 1.05 0.042 DMI Buffer Voltage
AP17 VCCIO[27]
FDI
VCCSPI V1 For SPI control logi VccIO 1.05 2.925 Core Well I/O buffers
1 AU20
20mA 1 1.05 V Supply for Intel R Management
C98 VCCDMI[2]
1U_0402_6.3V6K C60
VccASW 1.05 1.01 Engine and Integrated LAN
3 COUGARPOINT_FCBGA989 1U_0402_6.3V6K 3
2 Near 2
VccSPI 3.3 0.02 3.3 V Supply for SPI Controller Logic
AU20
Trace 20mil VccDSW 3.3 0.003 3.3v supply for Deep S4/S5 well
On-Die PLL Voltage Regulator
H：On-Die PLL voltage regulator VccpNAND 1.8 0.19 1.8V power supply for DF_TVS
enable
VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 VccRTC 3.3 6 uA Battery Voltage
,VCCAPLLSATA
VccSus3_3 3.3 0.266 Suspend Well I/O Buffer Voltage
High Definition Audio Controller Suspend
VccSusHDA 3.3 / 1.5 0.01 Voltage
1.8 V Internal PLL and VRMs (1.8 V for
VccVRM 1.8 / 1.5 0.16 Desktop)
VccCLKDMI 1.05 0.02 DMI Clock Buffer Voltage
VccSSC 1.05 0.095 Spread Modulators Power Supply
VccDIFFCLKN 1.05 0.055 Differential Clock Buffers Power Supply

Analog power supply for LVDS (Mobile
4
VccALVDS 3.3 0.001 Only) 4
Analog power supply for LVDS (Mobile

VccTX_LVDS 1.8 0.06
Dr-Bios.com
Only)

2011/06/24 2012/07/12 Title
A B C D E
A B C D E
+3VS
+1.05V analog VCC3_3 = 266mA detal waiting for newest spec
internal clock PLL VCCDMI = 42mA detal waiting for newest spec
PAD T28 @ +VCCACLK
L23
Can NC
10UH_LB2012T100MR_20%
1 2
1
+3VS_VCC_CLKF33
1 +VCCDSW3_3 U13J POWER +1.05VS_VTT
+5VALW +5VALW_PCH
1U_0402_6.3V6K
C55
1
C71 C47 AD49 N26
10U_0603_6.3V6M 0.1U_0402_16V7K VCCACLK VCCIO[29]
2 2 Not support Deep S4,S5 1
R345
2
@
1
0_0603_5%
VCCIO[30] P26
connect to +3VALW 2
Near T16 T16 C51
1 VCCDSW3_3 1U_0402_6.3V6K 1
P28 3 1
D
VCCIO[31] 2 Q29
Near T38 3mA
1
0.1U_0402_16V7K
C434
20K_0402_5%
R347
PAD T14 @ +PCH_VCCDSW V12 T27 1
G
DCPSUSBYP VCCIO[32] AO3419L_SOT23-3
Near N26
2
suppied by internal +3VS_VCC_CLKF33 VCCIO[33] T29
+3VALW_PCH
T38 VCC3_3[5] 40 PCH_PWR_EN#
GPIO28 1.05V VR must NC 2
2
VCCSUS3_3[7] T23
On-Die PLL Voltage Regulator +VCCAPLL_CPY_PCH BH23 VCCAPLLDMI2 119mA T24 1 1
VCCSUS3_3[8] C46 C45
H：On-Die PLL voltage regulator +3VALW_PCH +1.05VS_VTT AL29 VCCIO[14] 0.1U_0402_16V7K 0.1U_0402_16V7K
V23
USB
enable VCCSUS3_3[9]
@ +VCCDSW3_3 PAD T15 @ +VCCSUS1 AL24 2 Near T23 2 Near T24 +3VALW_PCH +5VALW_PCH
VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2 +3VALW
1
R408
2
0_0402_5% DCPSUS[3] VCCSUS3_3[10] V24
,VCCAPLLSATA P24
VCCSUS3_3[6]
1
1 2 +1.05VS_VTT
R407 0_0402_5% AA19 D23 R348
VCCASW[1] RB751V-40_SOD323-2 100_0402_5%
1010mA VCCIO[34] T26
+1.05VS_VTT
+1.05VS_VTT
AA21 VCCASW[2] Near M26
2
AA24 M26 +PCH_V5REF_SUS
L25 1 1
VCCASW[3] 1mA V5REF_SUS
1 2
+3VS +5VS
22U_0805_6.3V6M
C113
22U_0805_6.3V6M
C110
Clock and Miscellaneous

10UH_LB2012T100MR_20% AA26 C37
+1.05VS_VCCA_A_DPL VCCASW[4] +VCCA_USBSUS @ T16 0.1U_0402_16V7K
1 2 DCPSUS[4] AN23
AA27 PAD
VCCASW[5]
1
2 2
1U_0402_6.3V6K
C103
VCCSUS3_3[1] AN24 +3VALW_PCH suppied by internal D29 R130

1 AA29 VCCASW[6]
Near BD47 1.05V VR Must NC 100_0402_5%
AA31 RB751V-40_SOD323-2
VCCASW[7]
2
2 +PCH_V5REF_RUN
AC26 VCCASW[8] 1mA V5REF P34
2 +3VALW_PCH 2
1 1 1 1
1U_0402_6.3V6K
C56
1U_0402_6.3V6K
C73
1U_0402_6.3V6K
C66
AC27 VCCASW[9]
N20 C42
PCI/GPIO/LPC
+1.05VS_VCCA_B_DPL VCCSUS3_3[2] 1U_0603_10V6K
1 2 AC29 VCCASW[10] 1
L26 2 2 2 C38 2
VCCSUS3_3[3] N22
1U_0402_6.3V6K
C104
1 10UH_LB2012T100MR_20% AC31 1U_0402_6.3V6K

VCCASW[11]
+ C112
1 VCCSUS3_3[4] P20
2 Near P34
330U_D2_2V_Y
Near BF47 AD29 VCCASW[12] Near N20 +3VS
VCCSUS3_3[5] P22
2 2 Near AA19 AD31 VCCASW[13]
W21 VCCASW[14] VCC3_3[1] AA16
1 1 1
W23 W16 C471 C65 C49
VCCASW[15] VCC3_3[8] 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K
W24 VCCASW[16] VCC3_3[4] T34
2 Place near 2 Place near 2 Place near
SGA20331E10 W26 AJ2 AA16,W16 T34
VCCASW[17]
330U 2V H1.9 W29 VCCASW[18]
9mohm POLY +1.05VS_VTT
W31 VCCASW[19] VCC3_3[2] AJ2
W33 VCCASW[20]
Near M6 VCCIO[5] AF13 Near AH13,AH14,AF13
1
2 1 +VCCRTCEXT N16
C39 0.1U_0402_16V7K DCPRTC C76
VCCIO[12] AH13
1U_0402_6.3V6K
2
+1.5VS Y49 VCCVRM[4] VCCIO[13] AH14
3
GPIO28 3
VCCIO[6] AF14
+1.05VS_VCCA_A_DPL BD47 On-Die PLL Voltage Regulator
80mA
SATA
VCCADPLLA +VCCSATAPLL @ T29 PAD
VCCAPLLSATA AK1
+1.05VS_VTT +1.05VS_VCCA_B_DPL +1.5VS
BF47 VCCADPLLB 80mA H：On-Die PLL voltage regulator
AF11 enable
VCCVRM[1]
+1.05VS_VTT
AF17 VCCIO[7] VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2
AF33 VCCIO[8]
1 C77 1 C79 AF34 AC16 +1.05VS_VTT ,VCCAPLLSATA
1U_0402_6.3V6K 1U_0402_6.3V6K AG34
VCCIO[9] 55mA VCCIO[2]
VCCIO[11]
VCCIO[3] AC17 Near AC16
Place Place 1 C72
+1.05VS_VTT
2 2
near AF17 near AG33 1U_0402_6.3V6K AG33 VCCIO[10] VCCIO[4] AD17 1
C68
Place
95mA 1U_0402_6.3V6K
2 +VCCSST
near AF33, Near V16 C57
2 1
0.1U_0402_16V7K
V16 DCPSST +1.05VS_VTT 2
AF34,AG34 PAD T13 @ +1.05VM_VCCSUS T17
suppied by internal DCPSUS[1] VCCASW[22] T21
V19
MISC
1.05V VR Must NC DCPSUS[2]

+1.05VS_VTT V21
VCCASW[23]
1mA
CPU
BJ8 V_PROC_IO
VCCASW[21] T19
1 1 1
+RTCVCC +3VALW_PCH
4.7U_0603_6.3V6K
C114
0.1U_0402_16V7K
C109
0.1U_0402_16V7K
C111
RTC
A22
10mAVCCSUSHDA P32 Need +3VALW and 0.1U close PCH
HDA
2 2 2 VCCRTC
isolation between SSC (AG33)
1U_0402_6.3V6K
C445
0.1U_0402_16V7K
C450
0.1U_0402_16V7K
C453
1 1 1 1
and DIFFCLKN(AF33,AF34,AG34) COUGARPOINT_FCBGA989 C41
4 0.1U_0402_16V4Z 4
18mil width(DIFFCLKN)
10mil (SSC) 2 2 2 2
Place
Dr-Bios.com
near BJ8 Near P32
Near A22
2011/06/24 2012/07/12 Title
A B C D E
A B C D E
U13I
AY4 VSS[159] VSS[259] H46

AY42 VSS[160] VSS[260] K18
AY46 VSS[161] VSS[261] K26
AY8 VSS[162] VSS[262] K39
B11 VSS[163] VSS[263] K46
1 U13H 1
B15 VSS[164] VSS[264] K7
H5 VSS[0] B19 VSS[165] VSS[265] L18
B23 VSS[166] VSS[266] L2
AA17 VSS[1] VSS[80] AK38 B27 VSS[167] VSS[267] L20
AB11 VSS[6] VSS[85] AL16 F45 VSS[172] VSS[272] M12
AB14 VSS[7] VSS[86] AL17 BB12 VSS[173] VSS[273] P16
AB39 VSS[8] VSS[87] AL19 BB16 VSS[174] VSS[274] M18
AC19 VSS[13] VSS[92] AL27 BB30 VSS[179] VSS[279] M34
AC33 VSS[17] VSS[96] AL48 BC14 VSS[183] VSS[283] M46
AC34 VSS[18] VSS[97] AM11 BC18 VSS[184] VSS[284] M8
AC48 VSS[19] VSS[98] AM14 BC2 VSS[185] VSS[285] N18
AD10 VSS[20] VSS[99] AM36 BC22 VSS[186] VSS[286] P30
AD11 VSS[21] VSS[100] AM39 BC26 VSS[187] VSS[287] N47
AD19 VSS[24] VSS[103] AM46 BC36 VSS[190] VSS[290] T33
AD26 VSS[26] VSS[105] AN2 BC42 VSS[192] VSS[292] P43
AD27 VSS[27] VSS[106] AN29 BC48 VSS[193] VSS[293] P47
AD33 VSS[28] VSS[107] AN3 BD46 VSS[194] VSS[294] P7
AD34 VSS[29] VSS[108] AN31 BD5 VSS[195] VSS[295] R2
2 2
AD36 VSS[30] VSS[109] AP12 BE22 VSS[196] VSS[296] R48
AD37 VSS[31] VSS[110] AP19 BE26 VSS[197] VSS[297] T12
AD38 VSS[32] VSS[111] AP28 BE40 VSS[198] VSS[298] T31
AD39 VSS[33] VSS[112] AP30 BF10 VSS[199] VSS[299] T37
AD40 VSS[35] VSS[114] AP38 BF16 VSS[201] VSS[301] W34
AD46 VSS[39] VSS[118] AP8 BF26 VSS[205] VSS[305] V11
AD8 VSS[40] VSS[119] AR2 BF28 VSS[206] VSS[306] V17
AE2 VSS[41] VSS[120] AR48 BD3 VSS[207] VSS[307] V26
AE3 VSS[42] VSS[121] AT11 BF30 VSS[208] VSS[308] V27
AF10 VSS[43] VSS[122] AT13 BF38 VSS[209] VSS[309] V29
AF12 VSS[44] VSS[123] AT18 BF40 VSS[210] VSS[310] V31
AD14 VSS[45] VSS[124] AT22 BF8 VSS[211] VSS[311] V36
AD16 VSS[46] VSS[125] AT26 BG17 VSS[212] VSS[312] V39
AF16 VSS[47] VSS[126] AT28 BG21 VSS[213] VSS[313] V43
AF19 VSS[48] VSS[127] AT30 BG33 VSS[214] VSS[314] V7
AF24 VSS[49] VSS[128] AT32 BG44 VSS[215] VSS[315] W17
AF26 VSS[50] VSS[129] AT34 BG8 VSS[216] VSS[316] W19
AF27 VSS[51] VSS[130] AT39 BH11 VSS[217] VSS[317] W2
AF38 VSS[54] VSS[133] AT7 BH19 VSS[220] VSS[320] Y12
AF4 VSS[55] VSS[134] AU24 H10 VSS[221] VSS[321] Y38
AF42 VSS[56] VSS[135] AU30 BH27 VSS[222] VSS[322] Y4
AF46 VSS[57] VSS[136] AV16 BH31 VSS[223] VSS[323] Y42
AF8 VSS[60] VSS[139] AV30 BH39 VSS[226] VSS[328] BG29
AG19 VSS[61] VSS[140] AV38 BH43 VSS[227] VSS[329] N24
3 3
AG2 VSS[62] VSS[141] AV4 BH7 VSS[228] VSS[330] AJ3
AG31 VSS[63] VSS[142] AV43 D3 VSS[229] VSS[331] AD47
AG48 VSS[64] VSS[143] AV8 D12 VSS[230] VSS[333] B43
AH11 VSS[65] VSS[144] AW14 D16 VSS[231] VSS[334] BE10
AH3 VSS[66] VSS[145] AW18 D18 VSS[232] VSS[335] BG41
AH36 VSS[67] VSS[146] AW2 D22 VSS[233] VSS[337] G14
AH39 VSS[68] VSS[147] AW22 D24 VSS[234] VSS[338] H16
AH40 VSS[69] VSS[148] AW26 D26 VSS[235] VSS[340] T36
AH7 VSS[72] VSS[151] AW34 D34 VSS[238] VSS[344] C22
AJ19 VSS[73] VSS[152] AW36 D38 VSS[239] VSS[345] AP13
AJ21 VSS[74] VSS[153] AW40 D42 VSS[240] VSS[346] M14
AJ24 VSS[75] VSS[154] AW48 D8 VSS[241] VSS[347] AP3
AJ33 VSS[76] VSS[155] AV11 E18 VSS[242] VSS[348] AP1
AJ34 VSS[77] VSS[156] AY12 E26 VSS[243] VSS[349] BE16
AK12 VSS[78] VSS[157] AY22 G18 VSS[244] VSS[350] BC16
AK3 VSS[79] VSS[158] AY28 G20 VSS[245] VSS[351] BG28
G26 VSS[246] VSS[352] BJ28
COUGARPOINT_FCBGA989 G28 VSS[247]
G36 VSS[248]
G48 VSS[249]
H12 VSS[250]
H18 VSS[251]
H22 VSS[252]
H24 VSS[253]
H26 VSS[254]
H30 VSS[255]
H32 VSS[256]
H34 VSS[257]
F3 VSS[258]
4 4
A
Dr-Bios.com B
Compal Secret Data
C D
Date:
4019J1
SCHEMATIC MB A8203

E
Sheet 21 of 56
Rev
C
A B C D E
+3VSDGPU +3VSDGPU
U14A GPIO I/O USAGE
1
4 PEG_HTX_C_GRX_P0 AN12 Part 1 of 7
PEX_RX0 VID_4 R488 R583
4 PEG_HTX_C_GRX_N0 AM12 PEX_RX0_N GPIO0 P6
VID_3 10K_0402_5% 10K_0402_5%
GPIO0 O GPU_VID4
4 PEG_HTX_C_GRX_P1 AN14 PEX_RX1 GPIO1 M3
4 PEG_HTX_C_GRX_N1 AM14 L6 DIS@ DIS@
PEX_RX1_N GPIO2
4 PEG_HTX_C_GRX_P2 AP14 P5 GPIO1 O GPU_VID3
2 2
PEX_RX2 GPIO3
4 PEG_HTX_C_GRX_N2 AP15 PEX_RX2_N GPIO4 P7
4 PEG_HTX_C_GRX_P3 AN15 L7 VID_1
PEX_RX3 GPIO5 VID_2
4 PEG_HTX_C_GRX_N3 AM15 PEX_RX3_N GPIO6 M7
GPIO8_OVERT
GPIO2 O LCD_BL_PWM
4 PEG_HTX_C_GRX_P4 AN17 PEX_RX4 GPIO7 N8 1 6
AM17 M1 GPIO8_OVERT DIS@ GPU_OVERT 36
4 PEG_HTX_C_GRX_N4 PEX_RX4_N GPIO8
4 PEG_HTX_C_GRX_P5 AP17 M2 GPIO9_ALERT DMN66D0LDW-7_SOT363-6 GPIO3 O LCD_VCC
1 PEX_RX5 GPIO9 MEM_VREF 1
4 PEG_HTX_C_GRX_N5 AP18 PEX_RX5_N GPIO10 L1 Q49A
AN18 M5 VID_0 MEM_VREF 27,28
4 PEG_HTX_C_GRX_P6
GPIO
PEX_RX6 GPIO11 ACIN_BUF +3VSDGPU +3VSDGPU
4 PEG_HTX_C_GRX_N6 AM18 PEX_RX6_N GPIO12 N3 GPIO4 O LCD_BLEN
1
4 PEG_HTX_C_GRX_P7 AN20 M4 VID_5
PEX_RX7 GPIO13 R667
4 PEG_HTX_C_GRX_N7 AM20 PEX_RX7_N GPIO14 N4
1
4 PEG_HTX_C_GRX_P8 AP20 P2 10K_0402_5% GPIO5 O GPU_VID1
PEX_RX8 GPIO15 GPU_GPIO16 DIS@ R486 R485
4 PEG_HTX_C_GRX_N8 AP21 PEX_RX8_N GPIO16 R8
4 PEG_HTX_C_GRX_P9 AN21 M6 10K_0402_5% 10K_0402_5%
2
PEX_RX9 GPIO17 DIS@ DIS@
4 PEG_HTX_C_GRX_N9 AM21 PEX_RX9_N GPIO18 R1 GPIO6 O GPU_VID2
4 PEG_HTX_C_GRX_P10 AN23 P3
5 2
PEX_RX10 GPIO19
4 PEG_HTX_C_GRX_N10 AM23 PEX_RX10_N GPIO20 P4
4 PEG_HTX_C_GRX_P11 AP23 PEX_RX11 GPIO21 P1 GPIO7 O 3D Vision
4 PEG_HTX_C_GRX_N11 AP24 PEX_RX11_N
AN24 GPIO20,21 GPIO9_ALERT 4 3
4 PEG_HTX_C_GRX_P12 PEX_RX12 N13P/M = NC; DIS@ GPU_ALERT 36
4 PEG_HTX_C_GRX_N12 AM24 PEX_RX12_N N13P-PES = GPIO20,21 DMN66D0LDW-7_SOT363-6
GPIO8 I/O OVERT
4 PEG_HTX_C_GRX_P13 AN26 PEX_RX13
4 PEG_HTX_C_GRX_N13 AM26 PEX_RX13_N Q49B
4 PEG_HTX_C_GRX_P14 AP26 PEX_RX14 +3VSDGPU GPIO9 I/O ALERT
4 PEG_HTX_C_GRX_N14 AP27 PEX_RX14_N
4 PEG_HTX_C_GRX_P15 AN27 PEX_RX15 DACA_RED AK9
4 PEG_HTX_C_GRX_N15 AM27 PEX_RX15_N DACA_GREEN AL10 GPIO10 O MEM_VREF_CTL
DACA_BLUE AL9
1
DACs
AK14 R206 MEM_VDD_CTL(PES)
4 PEG_GTX_HRX_P0 PEX_TX0
AJ14 AM9 DIS@ GPIO11 O
4 PEG_GTX_HRX_N0 PEX_TX0_N DACA_HSYNC
5
AH14 AN9 10K_0402_5% U17 GPU_VID0(Real N13P)
4 PEG_GTX_HRX_P1 PEX_TX1 DACA_VSYNC
AG14 2
P
4 PEG_GTX_HRX_N1
2
PEX_TX1_N ACIN_BUF B GPU_ACIN 36
4 PEG_GTX_HRX_P2 AK15 PEX_TX2 4 Y
4 PEG_GTX_HRX_N2 AJ15 PEX_TX2_N DACA_VDD AG10 2 DIS@ 1 A 1 GPIO12 I PWR_LEVEL
G
PCI EXPRESS
AL16 AP9 R241 10K_0402_5% @
4 PEG_GTX_HRX_P3 PEX_TX3 DACA_VREF
AK16 AP8 NC7SZ08P5X_NL_SC70-5
4 PEG_GTX_HRX_N3
3
PEX_TX3_N DACA_RSET
4 PEG_GTX_HRX_P4 AK17 PEX_TX4 GPIO13 O THERM_LOAD_STEP_DOWN
2 2
4 PEG_GTX_HRX_N4 AJ17 PEX_TX4_N
4 PEG_GTX_HRX_P5 AH17 PEX_TX5
4 PEG_GTX_HRX_N5 AG17 PEX_TX5_N D16
2 1 GPIO14 I HPD_AB
4 PEG_GTX_HRX_P6 AK18 PEX_TX6
AJ18 RB751V-40_SOD323-2
4 PEG_GTX_HRX_N6 PEX_TX6_N
AL19 DIS@ GPIO15 I HPD_C
AK19 R4 VGA_DDC_CLK
4 PEG_GTX_HRX_N7 PEX_TX7_N I2CA_SCL +3VSDGPU
AK20 R5 VGA_DDC_DATA
4 PEG_GTX_HRX_P8 PEX_TX8 I2CA_SDA
4 PEG_GTX_HRX_N8 AJ20 PEX_TX8_N GPIO16 O THERM_LOAD_STEP_UP
AH20 R7 I2CB_SCL VGA_DDC_CLK R493 1 DIS@ 2 2.2K_0402_5%
4 PEG_GTX_HRX_P9 PEX_TX9 I2CB_SCL
AG20 R6 I2CB_SDA VGA_DDC_DATA R490 1 DIS@ 2 2.2K_0402_5%
4 PEG_GTX_HRX_N9 PEX_TX9_N I2CB_SDA
GPIO17 I HPD_D
I2C
4 PEG_GTX_HRX_P10 AK21 PEX_TX10
AJ21 R2 VGA_LCD_CLK I2CB_SCL R487 1 DIS@ 2 2.2K_0402_5%
4 PEG_GTX_HRX_N10 PEX_TX10_N I2CC_SCL
AL22 R3 VGA_LCD_DATA I2CB_SDA R209 1 DIS@ 2 2.2K_0402_5%
4 PEG_GTX_HRX_P11 PEX_TX11 I2CC_SDA
4 PEG_GTX_HRX_N11 AK22 PEX_TX11_N I2CS_SCL VGA_LCD_CLK R213
GPIO18 I HPD_E
4 PEG_GTX_HRX_P12 AK23 PEX_TX12 I2CS_SCL T4 1 DIS@ 2 2.2K_0402_5%
AJ23 T3 I2CS_SDA VGA_LCD_DATA R211 1 DIS@ 2 2.2K_0402_5%
4 PEG_GTX_HRX_N12 PEX_TX12_N I2CS_SDA
4 PEG_GTX_HRX_P13 AH23 PEX_TX13 I2CS_SCL R494
GPIO19 I HPD_F
4 PEG_GTX_HRX_N13 AG23 PEX_TX13_N 1 DIS@ 2 2.2K_0402_5%
AK24 I2CS_SDA R491 1 DIS@ 2 2.2K_0402_5%
4 PEG_GTX_HRX_N14 AJ24 PEX_TX14_N GPIO20 Reserved
4 PEG_GTX_HRX_P15 AL25 PEX_TX15 Place Near AD8
4 PEG_GTX_HRX_N15 AK25 PEX_TX15_N DIS@ GPIO21 Reserved
AD8 +PLLVDD 1 2
PLLVDD C195 0.1U_0402_16V4Z
AJ11 PEX_WAKE_N SM010019400 3000ma 33ohm@100mhz DCR 0.05
SP_PLLVDD AE8 GPIO22 I/O SLI_RASTER_SYNC
1 DIS@ 2 AL13 +1.05VSDGPU
+3VSDGPU 14 CLK_PEG_VGA PEX_REFCLK
R515 10K_0402_5% AK13 AD7 +GPU_PLLVDD DIS@
14 CLK_PEG_VGA# PEX_REFCLK_N VID_PLLVDD +PLLVDD GPIO23 O SLI_SWAPRDY
CLK
14 PEG_CLKREQ# AK12 PEX_CLKREQ_N 1 2

1 1 L38 BLM18PG330SN1_2P
PEX_TSTCLK_OUT+ AJ26 H3 XTALIN C206 C210 1 C534
3 PEX_TSTCLK_OUT XTAL_IN 3
2 DIS@ 1 PEX_TSTCLK_OUT- AK26 PEX_TSTCLK_OUT_N XTAL_OUT H2 XTALOUT DIS@ DIS@ 22U_0805_6.3V6M GPIO24
R239 200_0402_1% 0.1U_0402_16V4Z 0.1U_0402_16V4Z DIS@
XTAL_OUTBUFF 2 2
17 PLTRST_VGA# AJ12 PEX_RST_N XTAL_OUTBUFF J4
PEX_TREMP XTAL_SSIN 2
2 DIS@ 1 AP29 PEX_TERMP XTAL_SSIN H1
R511 2.49K_0402_1% Place Near AE8,AD7
SM010028480 1500ma 180ohm@100mhz DCR 0.18 XTAL_SSIN XTAL_OUTBUFF
1
DIS@
N13P-GL-A1_FCBGA908 NV DG PLL_VDD 150mA DIS@ R193
+GPU_PLLVDD 1 2 DIS@ R197 DIS@ 10K_0402_5%
0.1Ux1 L28 BLM18PG181SN1D_2P 10K_0402_5%
1 1
2
22Ux1 33ohm(ESR0.05)x1 C197
DIS@
C198
DIS@
4.7U_0603_6.3V6K 22U_0805_6.3V6M
2 2
NV DG SP_PLLVDD,VID_PLLVDD +3VSDGPU
0.1Ux2 Under GPU
2
4.7Ux1,22Ux1 XTALOUT @ XTALIN
180ohm(ESR0.2)x1 R464 1M_0402_5% I2CS_SCL 1
DIS@
6 EC_SMB_CK2 12,14,27,36
GPU_GPIO16 R202 1 @ 2 0_0402_5% 27MHZ_10PF_7V27000050 DMN66D0LDW-7_SOT363-6
Q40A
VGA Chipset Default VID0 VID1 VID2 VID3 VID4 VID5 VID6 3 3 1 1
+3VSDGPU
VID_0 R200 1 DIS@ 2 0_0402_5% 1 1
VID_1 R198 1 DIS@ 2 0_0402_5%
GPU_VID0 50 Voltage GND GND
GPU_VID1 50
5
VID_2 R199 1 DIS@ 2 0_0402_5%
GPU_VID2 50 N13P-GS 29*29 TBD DIS@ C520 Y4
4 DIS@ 2
C514 DIS@
VID_3 R205 1 DIS@ 2 0_0402_5% 10P_0402_50V8J 10P_0402_50V8J
GPU_VID3 50 2 2
4 VID_4 R204 1 DIS@ 2 0_0402_5%
GPU_VID4 50 N13P GV 29*29 0.9V 0 0 0 0 1 1 0 I2CS_SDA 4 3 EC_SMB_DA2 12,14,27,36
4
VID_5 R201 1 DIS@ 2 0_0402_5% DIS@
GPU_VID5 50 N13M-GS 29*29 DMN66D0LDW-7_SOT363-6
Dr-Bios.com
Q40B

Issued Date 2011/06/24 Deciphered Date 2012/07/12 Title
SCHEMATIC MB A8203
A B C D E
A
VRAM Interface U14B U14C

CMDA[31..0] 27 CMDC[31..0] 28
Part 2 of 7 Part 3 of 7
MDA0 L28 U30 CMDA0 MDC0 G9 D13 CMDC0
MDA1 FBA_D0 FBA_CMD0 CMDA1 MDC1 FBB_D0 FBB_CMD0 CMDC1
M29 FBA_D1 FBA_CMD1 T31 E9 FBB_D1 FBB_CMD1 E14
MDA2 L29 U29 CMDA2 MDC2 G8 F14 CMDC2
M28 FBA_D3 FBA_CMD3 R34 F9 FBB_D3 FBB_CMD3 A12
MDA4 N31 R33 CMDA4 MDC4 F11 B12 CMDC4
P29 FBA_D5 FBA_CMD5 U32 G11 FBB_D5 FBB_CMD5 C14
MDA6 R29 U33 CMDA6 MDC6 F12 B14 CMDC6
P28 FBA_D7 FBA_CMD7 U28 G12 FBB_D7 FBB_CMD7 G15
MDA8 J28 V28 CMDA8 MDC8 G6 F15 CMDC8
H29 FBA_D9 FBA_CMD9 V29 F5 FBB_D9 FBB_CMD9 E15
MDA10 J29 V30 CMDA10 MDC10 E6 D15 CMDC10
H28 FBA_D11 FBA_CMD11 U34 F6 FBB_D11 FBB_CMD11 A14
MDA12 G29 U31 CMDA12 MDC12 F4 D14 CMDC12
E31 FBA_D13 FBA_CMD13 V34 G4 FBB_D13 FBB_CMD13 A15
MDA14 E32 V33 CMDA14 MDC14 E2 B15 CMDC14
F30 FBA_D15 FBA_CMD15 Y32 F3 FBB_D15 FBB_CMD15 C17
MDA16 C34 AA31 CMDA16 MDC16 C2 D18 CMDC16
D32 FBA_D17 FBA_CMD17 AA29 D4 FBB_D17 FBB_CMD17 E18
MDA18 B33 AA28 CMDA18 MDC18 D3 F18 CMDC18
C33 FBA_D19 FBA_CMD19 AC34 C1 FBB_D19 FBB_CMD19 A20
MDA20 F33 AC33 CMDA20 MDC20 B3 B20 CMDC20
F32 FBA_D21 FBA_CMD21 AA32 C4 FBB_D21 FBB_CMD21 C18
MDA22 H33 AA33 CMDA22 MDC22 B5 B18 CMDC22
H32 FBA_D23 FBA_CMD23 Y28 C5 FBB_D23 FBB_CMD23 G18
MEMORY INTERFACE
MDA24 P34 Y29 CMDA24 MDC24 A11 G17 CMDC24
P32 W31 C11 F17
MEMORY INTERFACE B
P31 FBA_D26 FBA_CMD26 Y30 D11 FBB_D26 FBB_CMD26 D16
MDA27 P33 AA34 CMDA27 MDC27 B11 A18 CMDC27
L31 FBA_D28 FBA_CMD28 Y31 D8 FBB_D28 FBB_CMD28 D17
MDA29 L34 Y34 CMDA29 MDC29 A8 A17 CMDC29
L32 FBA_D30 FBA_CMD30 Y33 C8 FBB_D30 FBB_CMD30 B17
MDA31 L33 V31 CMDA31 MDC31 B8 E17 CMDC31
MDA32 FBA_D31 FBA_CMD31 MDC32 FBB_D31 FBB_CMD31
AG28 FBA_D32 F24 FBB_D32
MDA33 AF29 MDC33 G23
MDA34 FBA_D33 MDC34 FBB_D33
AG29 FBA_D34 E24 FBB_D34
MDA35 AF28 R32 MDC35 G24 C12
MDA36 FBA_D35 FBA_CMD_RFU0 MDC36 FBB_D35 FBB_CMD_RFU0
AD30 FBA_D36 FBA_CMD_RFU1 AC32 D21 FBB_D36 FBB_CMD_RFU1 C20
MDA37 AD29 MDC37 E21
MDA38 FBA_D37 +1.5VSDGPU MDC38 FBB_D37 +1.5VSDGPU
AC29 FBA_D38 G21 FBB_D38
MDA39 AD28 MDC39 F21
FBA_D39 FBB_D39
A
MDA40 AJ29 R28 FBA_DEBUG0 R208 2 DIS@ 1 60.4_0402_1% MDC40 G27 G14 FBB_DEBUG0 R191 2 DIS@ 1 60.4_0402_1%
MDA41 FBA_D40 FBA_DEBUG0 FBB_D40 FBB_DEBUG0
AK29 FBA_D41 FBA_DEBUG1 AC28 FBA_DEBUG1 R220 2 DIS@ 1 60.4_0402_1% MDC41 D27 FBB_D41 FBB_DEBUG1 G20 FBB_DEBUG1 R190 2 DIS@ 1 60.4_0402_1%
MDA42 AJ30 MDC42 G26
AK28 FBA_D43 E27 FBB_D43
MDA44 AM29 MDC44 E29
AM31 FBA_D45 FBA_CLK0 R30 CLKA0 27 F29 FBB_D45 FBB_CLK0 D12 CLKC0 28
MDA46 AN29 R31 CLKA0# 27 MDC46 E30 E12 CLKC0# 28
MDA47 FBA_D46 FBA_CLK0_N MDC47 FBB_D46 FBB_CLK0_N
AM30 FBA_D47 FBA_CLK1 AB31 CLKA1 27 D30 FBB_D47 FBB_CLK1 E20 CLKC1 28
MDA48 AN31 AC31 CLKA1# 27 MDC48 A32 F20 CLKC1# 28
MDA49 FBA_D48 FBA_CLK1_N MDC49 FBB_D48 FBB_CLK1_N
AN32 FBA_D49 C31 FBB_D49
MDA50 AP30 MDC50 C32
AP32 FBA_D51 B32 FBB_D51
MDA52 AM33 K31 FBA_WCK01 MDC52 D29 F8 FBB_WCK01
FBA_D52 FBA_WCK01 FBA_WCK01 27 FBB_D52 FBB_WCK01 FBB_WCK01 28
MDA53 AL31 L30 FBA_WCK01# MDC53 A29 E8 FBB_WCK01#
FBA_D53 FBA_WCK01_N FBA_WCK01# 27 FBB_D53 FBB_WCK01_N FBB_WCK01# 28
MDA54 AK33 H34 FBA_WCK23 MDC54 C29 A5 FBB_WCK23
MDA55 AK32 J34 FBA_WCK23# MDC55 B29 A6 FBB_WCK23#
MDA56 AD34 AG30 FBA_WCK45 MDC56 B21 D24 FBB_WCK45
1 MDA57 AD32 AG31 FBA_WCK45# MDC57 C23 D25 FBB_WCK45#
FBA_WCK45# 27 FBB_WCK45# 28
1
MDA58 FBA_D57 FBA_WCK45_N FBA_WCK67 MDC58 FBB_D57 FBB_WCK45_N FBB_WCK67

AC30 FBA_D58 FBA_WCK67 AJ34 FBA_WCK67 27 A21 FBB_D58 FBB_WCK67 B27 FBB_WCK67 28
MDA59 AD33 AK34 FBA_WCK67# MDC59 C21 C27 FBB_WCK67#
MDA60 AF31 MDC60 B24
AG34 FBA_D61 C24 FBB_D61
MDA62 AG32 MDC62 B26
AG33 FBA_D63 FBA_WCKB01 J30 C26 FBB_D63 FBB_WCKB01 D6
27 DQMA[3..0] FBA_WCKB01_N J31 28 DQMC[3..0] FBB_WCKB01_N D7
DQMA0 P30 J32 DQMC0 E11 C6
DQMA1 FBA_DQM0 FBA_WCKB23 DQMC1 FBB_DQM0 FBB_WCKB23
F31 FBA_DQM1 FBA_WCKB23_N J33 E3 FBB_DQM1 FBB_WCKB23_N B6
DQMA2 F34 AH31 NC DQMC2 A3 F26 NC
27 DQMA[7..4] M32 FBA_DQM3 FBA_WCKB45_N AJ31 28 DQMC[7..4] C9 FBB_DQM3 FBB_WCKB45_N E26
DQMA4 AD31 AJ32 DQMC4 F23 A26 SM010019400 3000ma 33ohm@100mhz DCR 0.05
AL29 FBA_DQM5 FBA_WCKB67_N AJ33 F27 FBB_DQM5 FBB_WCKB67_N A27
DQMA6 AM32 DQMC6 C30
DQMA7 FBA_DQM6 DQMC7 FBB_DQM6 +1.05VSDGPU
AF34 FBA_DQM7 A24 FBB_DQM7 300mA
DIS@
27 DQSA[3..0] 28 DQSC[3..0]
DQSA0 M31 E1 FB_CLAMP DQSC0 D10 +FB_PLLAVDD L40 1 2
DQSA1 FBA_DQS_WP0 FB_CLAMP DQSC1 FBB_DQS_WP0 BLM18PG330SN1_2P
G31 FBA_DQS_WP1 D5 FBB_DQS_WP1
DQSA2 E33 100mA DQSC2 C3 100mA 1
DQSA3 FBA_DQS_WP2 DQSC3 FBB_DQS_WP2 C578
27 DQSA[7..4] M33 FBA_DQS_WP3 28 DQSC[7..4] B9 FBB_DQS_WP3
DQSA4 AE31 K27 +FB_PLLAVDD DQSC4 E23 H17 +FB_PLLAVDD DIS@
DQSA5 FBA_DQS_WP4 FB_DLL_AVDD DQSC5 FBB_DQS_WP4 FBB_PLL_AVDD 22U_0805_6.3V6M
AK30 FBA_DQS_WP5 E28 FBB_DQS_WP5
DQSA6 DQSC6 2
AN33 FBA_DQS_WP6 1 B30 FBB_DQS_WP6
DQSA7 AF33 C188 1 C174 DQSC7 A23
FBA_DQS_WP7 DIS@ DIS@ FBB_DQS_WP7
FBA_PLL_AVDD U27 1 C169 Place Near GPU
M30 0.1U_0402_16V4Z 0.1U_0402_16V4Z D9 0.1U_0402_16V4Z
FBA_DQS_RN0 2 FBB_DQS_RN0 DIS@
H30 FBA_DQS_RN1 E4 FBB_DQS_RN1
2
E34 FBA_DQS_RN2 B2 FBB_DQS_RN2 2
M34 FBA_DQS_RN3 FB_VREF H26 A9 FBB_DQS_RN3 Place Near H17
AF30 FBA_DQS_RN4 Place Near U27 Place Near K27 D22 FBB_DQS_RN4
AK31 FBA_DQS_RN5 D28 FBB_DQS_RN5
AM34 FBA_DQS_RN6 A30 FBB_DQS_RN6
AF32 FBA_DQS_RN7 B23 FBB_DQS_RN7
FBx_PLL_AVDD,FB_DLL_AVDD
MDA[15..0]
DIS@
N13P-GL-A1_FCBGA908
DIS@
N13P-GL-A1_FCBGA908
0.1Ux1 1 Per pin Under GPU
27 MDA[15..0]
MDA[31..16] 22Ux1 Near GPU
27 MDA[31..16]
27 MDA[47..32]
MDA[47..32] 30ohm@100Mhz(ESR0.01ohm) x1 Near GPU
MDA[63..48]
27 MDA[63..48]
MDC[15..0]
28 MDC[15..0]
MDC[31..16]
28 MDC[31..16]
MDC[47..32]
28 MDC[47..32]
Dr-Bios.com
MDC[63..48]
28 MDC[63..48]

SCHEMATIC MB A8203
A
5 4 3 2 1
U14D
Part 4 of 7 MULTI LEVEL STRAPS

AM6 IFPA_TXC +3VSDGPU +3VSDGPU
AN6 IFPA_TXC_N NC P8 Straps
AP3 IFPA_TXD0 NC AC6
AN3 IFPA_TXD0_N NC AJ28
AN5 IFPA_TXD1 NC AJ4
1
AM5 IFPA_TXD1_N NC AJ5
AL6 AL11 R476 R187 R184 R182 R579 R468 R466 R195
IFPA_TXD2 NC DIS@ @ @ @ @ @ DIS@ DIS@
AK6 IFPA_TXD2_N NC C15
NC
AJ6 D19 45.3K_0402_1% 4.99K_0402_1% 20K_0402_1% 4.99K_0402_1% 10K_0402_1% 4.99K_0402_1% 10K_0402_1% 4.99K_0402_1%
IFPA_TXD3 NC
AH6 D20
2
D IFPA_TXD3_N NC D
NC D23
NC D26
AJ9 H31 STRAP0
IFPB_TXC NC STRAP1 ROM_SI
AH9 IFPB_TXC_N NC T8
AP6 V32 STRAP2 ROM_SO
IFPB_TXD4 NC STRAP3 ROM_SCLK
AP5 IFPB_TXD4_N
AM7 STRAP4
IFPB_TXD5
AL7 IFPB_TXD5_N
AN8 IFPB_TXD6
1
AM8 IFPB_TXD6_N
AK8 R477 R186 R183 R181 R473 R469 R467 R194
IFPB_TXD7 @ DIS@ DIS@ DIS@ DIS@ HYNMFR@ @ @
AL8 IFPB_TXD7_N
L4 VCCSENSE_VGA_R 1 DIS@ 2 0_0402_5% 4.99K_0402_1% 4.99K_0402_1% 15K_0402_1% 4.99K_0402_1% 45.3K_0402_1% 4.99K_0402_1% 30K_0402_1% 15K_0402_1%
VDD_SENSE R480 VCCSENSE_VGA 50
2
AK1 64M*32*4
IFPC_L0 1GB
AJ1 IFPC_L0_N
AJ3 L5 VSSSENSE_VGA_R 1 DIS@ 2 0_0402_5%
IFPC_L1 GND_SENSE VSSSENSE_VGA 50
AJ2 R478 N13P-GS QS Hynix
IFPC_L1_N SA0000518A0 N13P-GS QS GEN3 SA00004GD30
AH3 IFPC_L2
AH4 IFPC_L2_N
AG5
AG4
IFPC_L3 VRAM BOM Config VRAM P/N
R469
IFPC_L3_N HYNAFR@
X76364BOL03: 64Mx32x4 HYN 64*32 2000M SA00004GD30 (S IC D5 64M32/2.5G H5GQ2H24MFR-T2C ABO!)
TEST 24.9K_0402_1%
AM1 AK11 R508 1 DIS@ 2 10K_0402_5%
IFPD_L0 TESTMODE 64M*32*4
AM2 IFPD_L0_N X76364BOL04: 64Mx32x4 HYN 64*32 2000M SA00004GD50(S IC D5 64M32/2.5G H5GQ2H24AFR-T2C ABO!)
AM3 AM10 JTAG_TCK R509 1 DIS@ 2 10K_0402_5% 1GB
IFPD_L1 JTAG_TCK JTAG_TDI
AM4 IFPD_L1_N JTAG_TDI AM11
AL3 AP12 JTAG_TDO Hynix
IFPD_L2 JTAG_TDO JTAG_TMS SA00004GD50
AL4 IFPD_L2_N JTAG_TMS AP11
AK4 AN11 JTAG_RST R510 1 DIS@ 2 10K_0402_5%
IFPD_L3 JTAG_TRST_N
AK5 IFPD_L3_N GDDR5 Vendor Strap ROM_SI
LVDS/TMDS
C C
Hynix(M) Ox0 PD 5K
AD2 IFPE_L0
AD3 IFPE_L0_N 64M x 32 Samsung Ox1 PD 10K
AD1 IFPE_L1 SERIAL Hynix(A) Ox4 PD 25K
AC1
AC2
IFPE_L1_N
H6 ROM_CS# R484 1 DIS@ 2 10K_0402_5%
For N13P-GS-A1(ES2) A2(QS) strap table Decive ID : 0x0FD2
IFPE_L2 ROM_CS_N +3VSDGPU
AC3 IFPE_L2_N ROM_SCLK H4 ROM_SCLK Hynix Ox2 PD 15K
AC4 H5 ROM_SI GPU Frenq. Memory Size Memory Config strap0 strap1 strap2 strap3 strap4 ROM_SI ROM_SO ROM_SCLK
IFPE_L3 ROM_SI
AC5 IFPE_L3_N ROM_SO H7 ROM_SO 32M x 32 Samsung Ox3 PD 20K
N13P-GS 2000 MHZ 64M* 32* 4 Hynix R
AE3 1GB SA00004GD30 PD 5K
IFPF_L0
AE4 IFPF_L0_N
AF4 R R R R R R R R
IFPF_L1
AF5 IFPF_L1_N GENERAL N13P-GS 2000 MHZ 64M* 32* 4 Samsung PU 45K PD 5K PD 15K PD 5K PD 45K PD 10K PU 5K PU 5K
AD4 1GB
IFPF_L2 R482 @
AD5 IFPF_L2_N BUFRST_N L2 1 2 10K_0402_5%
AG1 R
IFPF_L3
AF1 IFPF_L3_N CEC L3 R207 1 DIS@ 2 10K_0402_5% +3VSDGPU N13P-GS 2000 MHZ 64M* 32* 4 Hynix PD 25K
1GB SA00004GD50
J1 MULTI_STRAP_REF0_GND 1 DIS@ 2
MULTI_STRAP_REF0_GND R481 40.2K_0402_1%
AG3 IFPC_AUX_I2CW_SCL
AG2 IFPC_AUX_I2CW_SDA_N
STRAP0 J2 STRAP0 Resistor Values Pull-up to +3V Pull-down to Gnd
J7 STRAP1
STRAP1
AK3 IFPD_AUX_I2CX_SCL STRAP2 J6 STRAP2 5K 1000 0000
AK2 J5 STRAP3
IFPD_AUX_I2CX_SDA_N STRAP3
STRAP4 J3 STRAP4 10K 1001 0001
B
AB3 IFPE_AUX_I2CY_SCL 15K 1010 0010 B
AB4 IFPE_AUX_I2CY_SDA_N
THERMDP K3 20K 1011 0011
THERMDN K4
AF3 IFPF_AUX_I2CZ_SCL 25K 1100 0100
AF2 IFPF_AUX_I2CZ_SDA_N
30K 1101 0101
35K 1110 0110
DIS@ 45K 1111 0111
N13P-GL-A1_FCBGA908
STRAP0 USER[3:0]
STRAP1 3GIO_PADCFG_LUT_ADR[3:0]
STRAP2 PCI_DEVID[3:0]
STRAP3 SOR[3:0]
STRAP4 PEX_MAX_SPEED,
DP_PLLVDD33V
ROM_SCLK PCI_DEV[4:5],
SUB_VENDOR,PEX_PLL_EN_TERM
ROM_SI RAM_CFG[3:0]
ROM_SO FB_BAR_SIZE[1:0],SMB_
ALT_ADOOR, VGA_DEVICE
A A
5
Dr-Bios.com 4
Compal Secret Data
3 2
Custom
Title
Date:
4019J1
SCHEMATIC MB A8203

1
Sheet 24 of 56
Rev
C
5 4 3 2 1
NV DG FBVDDQ(DDR3)
NV DG PEX_IOVVD/Q combined
0.1Ux8,1Ux2,4.7Ux2 Under GPU +1.05VSDGPU
1Ux4 Under GPU
10Ux4 Near GPU
4.7Ux2 Near GPU
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0805_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@ C220
DIS@ C219
DIS@ C214
DIS@ C215
DIS@C233
C233
NV DG FBVDDQ(GDDR5) 10Ux4,22Ux4 Midway GPU & Power supply
1 1 1
C213
1 1 1 1
C232
DIS@
DIS@ DIS@
0.1Ux6(3@),1Ux6(3@),Under GPU 2 2 2
4.7U_0603_6.3V6K
2 2 2 2
22U_0805_6.3V6M
4.7Ux6(3@) ,10Ux4(2@),22Ux4(2@) Near GPU U14E
+1.5VSDGPU 7200mA Part 5 of 7 Under GPU Near GPU Midway GPU & Power supply
D D
AA27 AG19 +1.05VSDGPU
FBVDDQ_0 PEX_IOVDD_0
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
@ C525 AA30 FBVDDQ_1 PEX_IOVDD_1 AG21
DIS@ C165
DIS@ C194
@ C167
DIS@ C172
DIS@ C205
1 1 1 1 1 1 AB27 FBVDDQ_2 PEX_IOVDD_2 AG22
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0805_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
AB33 FBVDDQ_3 PEX_IOVDD_3 AG24
DIS@ C226
DIS@ C223
DIS@ C540
DIS@ C654
DIS@ C546
AC27 FBVDDQ_4 PEX_IOVDD_4 AH21 2700 mA 1 1 1
C541
1 1 1 1
C545
AD27 FBVDDQ_5 PEX_IOVDD_5 AH25
2 2 2 2 2 2
AE27 FBVDDQ_6 total 2700mA DIS@ DIS@
AF27 4.7U_0603_6.3V6K 22U_0805_6.3V6M
FBVDDQ_7 Design guide page.68 2 2 2 2 2 2 2
Under GPU AG27 FBVDDQ_8 PEX_IOVDDQ_0 AG13
B13 FBVDDQ_9 PEX_IOVDDQ_1 AG15
B16 FBVDDQ_10 PEX_IOVDDQ_2 AG16
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
B19 FBVDDQ_11 PEX_IOVDDQ_3 AG18 Under GPU Near GPU
@ C523
@ C186
DIS@ C192
@ C171
@ C182
DIS@ C166
1 1 1 1 1 1 E13 FBVDDQ_12 PEX_IOVDDQ_4 AG25
E16 FBVDDQ_13 PEX_IOVDDQ_5 AH15
E19 AH18 +3VSDGPU
2 2 2 2 2 2
H10
FBVDDQ_14
FBVDDQ_15
PEX_IOVDDQ_6
PEX_IOVDDQ_7 AH26 PEX_SVDD/PLL_HVDD connect to NV3V3
H11 AH27
H12
FBVDDQ_16
FBVDDQ_17
PEX_IOVDDQ_8
PEX_IOVDDQ_9 AJ27 0.1Ux1,4.7Ux2 Near GPU
Under GPU H13 FBVDDQ_18 PEX_IOVDDQ_10 AK27 1
C526
1
C524
H14 AL27
POWER
FBVDDQ_19 PEX_IOVDDQ_11
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
H15 AM28 DIS@ DIS@
FBVDDQ_20 PEX_IOVDDQ_12
DIS@ C218
DIS@ C170
@ C175
DIS@ C176
@ C178
1 1 1 1 1 1 @ C181 H16 AN28 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K

FBVDDQ_21 PEX_IOVDDQ_13 2 2
H18 FBVDDQ_22 150mA
H19 FBVDDQ_23 Near GPU
2 2 2 2 2 2
H20 FBVDDQ_24 +PEX_PLL_HVDD
370mA
H21 FBVDDQ_25 PEX_PLL_HVDD AH12 SM010028800 2000ma 120ohm@100mhz DCR 0.1
H22 FBVDDQ_26
H23 C224 DIS@ 1 2 0.1U_0402_16V4Z
FBVDDQ_27 +1.05VSDGPU
Near GPU H24 FBVDDQ_28 DIS@
H8 FBVDDQ_29 PEX_SVDD_3V3 AG12
H9 C225 DIS@ 1 2 0.1U_0402_16V4Z L39 1 2
C FBVDDQ_30 BLM18PG121SN1D_0603 C
L27 FBVDDQ_31
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0805_6.3V6M 22U_0805_6.3V6M
22U_0805_6.3V6M 22U_0805_6.3V6M
M27 FBVDDQ_32 150mA 1 1 1

@ C159
@ C158
DIS@ C191
DIS@ C187
@ C528
@ C527
1 1 1 1 1 1 N27 AG26 +PEX_PLLVDD C227 C554 C557

FBVDDQ_33 PEX_PLLVDD DIS@ DIS@ DIS@
P27 FBVDDQ_34 0.1U_0402_16V4Z 1U_0402_6.3V6K 4.7U_0603_6.3V6K
if use N13P-GL,use bead 120ohm@100MHz(ESR=0.18)
R27 FBVDDQ_35
T27 120mA
2 2 2 if use N13P-GV,stuff with a 0 ohm.
2 2 2 2 2 2 FBVDDQ_36 +VDD33
T30 FBVDDQ_37 VDD33_0 J8 Under GPU Near GPU
T33 FBVDDQ_38 VDD33_1 K8
V27 FBVDDQ_39 VDD33_2 L8
W27 M8 +3VSDGPU
FBVDDQ_40 VDD33_3
DIS@ C533
DIS@ C532
1 1 W30 FBVDDQ_41
Near GPU W33 FBVDDQ_42
1U_0402_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Y27 FBVDDQ_43
DIS@ C173
DIS@ C168
DIS@ C177
DIS@ C179
DIS@ C180
AH8 +IFPAB_PLLVDD R507 1 DIS@ 2 10K_0402_5% 1 1 1 1 1 1
2 2 IFPAB_PLLVDD C183
IFPAB_RSET AJ8
DIS@
+1.5VSDGPU AG8 +IFPAB_IOVDD R236 1 DIS@ 2 10K_0402_5% 4.7U_0603_6.3V6K
IFPA_IOVDD 2 2 2 2 2 2
IFPB_IOVDD AG9
R470 2 DIS@ 1 10_0402_5% FB_VDDQ_SENSE F1 FB_VDDQ_SENSE
AF7 +IFPC_PLLVDD R503 1 DIS@ 2 10K_0402_5%
R474 IFPC_PLLVDD
2 DIS@ 1 10_0402_5% FB_GND_SENSE F2 FB_GND_SENSE IFPC_RSET AF8 Under GPU (one per pin) Near GPU
+1.5VSDGPU
AF6 +IFPC_IOVDD R581 1 DIS@ 2 10K_0402_5%
R196 IFPC_IOVDD
2 DIS@ 1 40.2_0402_1% FB_CAL_PD_VDDQ J27 FB_CAL_PD_VDDQ
IFPD_PLLVDD AG7 +IFPD_PLLVDD R506 1 DIS@ 2 10K_0402_5% NV DG PEX_PLLVDD

R189 2 DIS@ 1 40.2_0402_1% FB_CAL_PU_GND H27 AN2
FB_CAL_PU_GND IFPD_RSET
+IFPD_IOVDD R582 1 DIS@
0.1Ux1 Under GPU
IFPD_IOVDD AG6 2 10K_0402_5%
R192 2 DIS@ 1 60.4_0402_1% FB_CAL_TERM_GND H25
FB_CAL_TERM_GND 1Ux1,4.7Ux1 Near GPU
B +IFPEF_PLLVDD R215 1 DIS@ B
IFPEF_PLVDD AB8 2 10K_0402_5%
AD6
IFPEF_RSET NV DG VDD33/3VSMISC
AC7 +IFPEF_IOVDD R222 1 DIS@ 2 10K_0402_5%
IFPE_IOVDD
IFPF_IOVDD AC8 0.1Ux4 Under GPU 1Per pin
9/22 NV Remove IFPC_RSET, 1Ux1,4.7Ux1 Near GPU
IFPD_RSET,IFPEF_RSET
DIS@
N13P-GL-A1_FCBGA908
A A
5
Dr-Bios.com 4
Compal Secret Data
Deciphered Date
3 2
2012/07/12 Title
Date:
4019J1
SCHEMATIC MB A8203

1
Sheet 25 of 56
Rev
C
5 4 3 2 1
U14F U14G
+VGA_CORE +VGA_CORE
Part 6 of 7
50A
A2 D2 Part 7 of 7 V17
GND_0 GND_100 VDD_56
AA17 GND_1 GND_101 D31 AA12 VDD_0 VDD_57 V18
AA18 GND_2 GND_102 D33 AA14 VDD_1 VDD_58 V20
AA20 GND_3 GND_103 E10 AA16 VDD_2 VDD_59 V22
AA22 GND_4 GND_104 E22 AA19 VDD_3 VDD_60 W12
AB12 GND_5 GND_105 E25 AA21 VDD_4 VDD_61 W14
AB14 GND_6 GND_106 E5 AA23 VDD_5 VDD_62 W16
AB16 GND_7 GND_107 E7 AB13 VDD_6 VDD_63 W19
D AB19 GND_8 GND_108 F28 AB15 VDD_7 VDD_64 W21 D
AB2 GND_9 GND_109 F7 AB17 VDD_8 VDD_65 W23
AB21 GND_10 GND_110 G10 AB18 VDD_9 VDD_66 Y13
A33 GND_11 GND_111 G13 AB20 VDD_10 VDD_67 Y15
AB23 GND_12 GND_112 G16 AB22 VDD_11 VDD_68 Y17
AB28 GND_13 GND_113 G19 AC12 VDD_12 VDD_69 Y18
AB5 GND_16 GND_116 G25 AC19 VDD_15
AB7 GND_17 GND_117 G28 AC21 VDD_16
AC13 GND_18 GND_118 G3 AC23 VDD_17 XVDD_1 U1
AC15 GND_19 GND_119 G30 M12 VDD_18 XVDD_2 U2
POWER
AA13 GND_22 GND_122 G5 M19 VDD_21 XVDD_5 U5
AC22 GND_24 GND_124 K2 M23 VDD_23 XVDD_7 U7
AE2 GND_25 GND_125 K28 N13 VDD_24 XVDD_8 U8
AE28 GND_26 GND_126 K30 N15 VDD_25
AE30 GND_27 GND_127 K32 N17 VDD_26
AE32 GND_28 GND_128 K33 N18 VDD_27 XVDD_9 V1
AE7 GND_31 GND_131 M13 P12 VDD_30 XVDD_12 V4
AH10 GND_32 GND_132 M15 P14 VDD_31 XVDD_13 V5
AA15 GND_33 GND_133 M17 P16 VDD_32 XVDD_14 V6
AH19 GND_36 GND_136 M22 P23 VDD_35
C AH2 N12 R13 C
GND_37 GND_137 VDD_36
AH22 GND_38 GND_138 N14 R15 VDD_37 XVDD_17 W2
GND
AH32 GND_43 GND_143 N23 T12 VDD_42 XVDD_22 W8

AH33 GND_44 GND_144 N28 T14 VDD_43
AH5 GND_45 GND_145 N30 T16 VDD_44
AH7 GND_46 GND_146 N32 T19 VDD_45 XVDD_23 Y1
AJ7 GND_47 GND_147 N33 T21 VDD_46 XVDD_24 Y2
AK10 GND_48 GND_148 N5 T23 VDD_47 XVDD_25 Y3
AK7 GND_49 GND_149 N7 U13 VDD_48 XVDD_26 Y4
AL12 GND_50 GND_150 P13 U15 VDD_49 XVDD_27 Y5
AL18 GND_54 GND_154 P20 U22 VDD_53
AL2 GND_55 GND_155 P22 V13 VDD_54
AL20 GND_56 GND_156 R12 V15 VDD_55 XVDD_31 AA1
AL21 GND_57 GND_157 R14 XVDD_32 AA2
AL30 GND_62 GND_162 T13 XVDD_37 AA7
AL32 GND_63 GND_163 T15 XVDD_38 AA8
AL33 GND_64 GND_164 T17
AL5 GND_65 GND_165 T18
B B
AM13 GND_66 GND_166 T2
AM16 T20 DIS@
GND_67 GND_167 N13P-GL-A1_FCBGA908
AM19 GND_68 GND_168 T22
AM22 GND_69 GND_169 AG11
AM25 GND_70 GND_170 T28
AN1 GND_71 GND_171 T32
AN16 GND_74 GND_174 U12
AN19 GND_75 GND_175 U14
AN22 GND_76 GND_176 U16
AN25 GND_77 GND_177 U19
AN30 GND_78 GND_178 U21
AN34 GND_79 GND_179 U23
AN4 GND_80 GND_180 V12
AN7 GND_81 GND_181 V14
AP2 GND_82 GND_182 V16
AP33 GND_83 GND_183 V19
B1 GND_84 GND_184 V21
B10 GND_85 GND_185 V23
B22 GND_86 GND_186 W13
B25 GND_87 GND_187 W15
B28 GND_88 GND_188 W17
B31 GND_89 GND_189 W18
B34 GND_90 GND_190 W20
B4 GND_91 GND_191 W22
B7 GND_92 GND_192 W28
C10 GND_93 GND_193 Y12
A C13 GND_94 GND_194 Y14 A
C19 GND_95 GND_195 Y16
C22 GND_96 GND_196 Y19
Dr-Bios.com
C25 GND_97 GND_197 Y21
C28 GND_98 GND_198 Y23
C7 GND_99 GND_199 AH11
C16
GND_OPT
W32
GND_OPT
SCHEMATIC MB A8203
DIS@ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
N13P-GL-A1_FCBGA908 Custom C
5 4 3 2 1
5 4 3 2 1
Memory Partition A - 64 bits U9 U10
+1.5VSDGPU 23 MDA[15..0]
MDA[15..0] MF=0 MF=1 MF=1 MF=0 MF=0 MF=1 MF=1 MF=0 GDDR5 Mode H Mapping
23 MDA[31..16]
MDA[31..16]
DQ24 DQ0 A4 MDA0
DQ24 DQ0 A4 MDA56 DATA Bus
CKE# CMDA14 1 DIS@ 2 DQSA0 C2 A2 MDA1 DQSA7 C2 A2 MDA57
EDC0 EDC3 DQ25 DQ1 EDC0 EDC3 DQ25 DQ1 Address
R642 10K_0402_5%
23 MDA[47..32]
MDA[47..32] DQSA1 C13 EDC1 EDC2 DQ26 DQ2 B4 MDA2 DQSA6 C13 EDC1 EDC2 DQ26 DQ2 B4 MDA58 0..31 32..63
DQSA2 R13 EDC2 EDC1 DQ27 DQ3 B2 MDA3 BYTE0 DQSA5 R13 EDC2 EDC1 DQ27 DQ3 B2 MDA59
RESET# CMDA13 1 DIS@ 2 23 MDA[63..48]
MDA[63..48] DQSA3 R2 EDC3 EDC0 DQ28 DQ4 E4 MDA4 DQSA4 R2 EDC3 EDC0 DQ28 DQ4 E4 MDA60 BYTE7 CMD0 CS#
R641 10K_0402_5% E2 MDA5 E2 MDA61
DQ29 DQ5 DQ29 DQ5
23 DQMA[3..0]
DQMA[3..0]
DQ30 DQ6 F4 MDA6
DQ30 DQ6 F4 MDA62 CMD1 A3_BA3
DQMA0 D2 F2 MDA7 DQMA7 D2 F2 MDA63
DBI0# DBI3# DQ31 DQ7 DBI0# DBI3# DQ31 DQ7
23 CMDA[31..0]
CMDA[31..0] DQMA1 D13 DBI1# DBI2# DQ16 DQ8 A11 MDA8 DQMA6 D13 DBI1# DBI2# DQ16 DQ8 A11 MDA48 CMD2 A2_BA0
DQMA2 P13 A13 MDA9 DQMA5 P13 A13 MDA49
DBI2# DBI1# DQ17 DQ9 DBI2# DBI1# DQ17 DQ9
D
+1.5VSDGPU
23 DQMA[7..4]
DQMA[7..4] DQMA3 P2 DBI3# DBI0# DQ18 DQ10 B11 MDA10 DQMA4 P2 DBI3# DBI0# DQ18 DQ10 B11 MDA50 CMD3 A4_BA2 D
DQ19 DQ11 B13 MDA11 BYTE1 DQ19 DQ11 B13 MDA51
CKE# CMDA30 1 DIS@ 2 23 DQSA[3..0]
DQSA[3..0] CLKA0 J12 CK DQ20 DQ12 E11 MDA12 CLKA1 J12 CK DQ20 DQ12 E11 MDA52 BYTE6 CMD4 A5_BA1
R623 10K_0402_5% CLKA0# J11 E13 MDA13 CLKA1# J11 E13 MDA53
CK# DQ21 DQ13 CK# DQ21 DQ13
23 DQSA[7..4]
DQSA[7..4] CMDA14 J3 CKE# DQ22 DQ14 F11 MDA14 CMDA30 J3 CKE# DQ22 DQ14 F11 MDA54 CMD5 WE#
RESET# CMDA29 1 DIS@ 2 F13 MDA15 F13 MDA55
DQ23 DQ15 DQ23 DQ15
R580 10K_0402_5%
DQ8 DQ16 U11 MDA16
DQ8 DQ16 U11 MDA40 CMD6 A7_A8
CMDA2 H11 U13 MDA17 CMDA19 H11 U13 MDA41
BA0/A2 BA2/A4 DQ9 DQ17 BA0/A2 BA2/A4 DQ9 DQ17
CMDA4 K10 BA1/A5 BA3/A3 DQ10 DQ18 T11 MDA18 CMDA17 K10 BA1/A5 BA3/A3 DQ10 DQ18 T11 MDA42 CMD7 A6_A11
CMDA3 K11 BA2/A4 BA0/A2 DQ11 DQ19 T13 MDA19 CMDA18 K11 BA2/A4 BA0/A2 DQ11 DQ19 T13 MDA43 BYTE5
CMDA1 H10 BA3/A3 BA1/A5 DQ12 DQ20 N11 MDA20 BYTE2 CMDA20 H10 BA3/A3 BA1/A5 DQ12 DQ20 N11 MDA44 CMD8 ABI#
N13 MDA21 N13 MDA45
DQ13 DQ21 DQ13 DQ21
23 CLKA0
CLKA0 1 DIS@ 2 DQ14 DQ22 M11 MDA22
DQ14 DQ22 M11 MDA46 CMD9 A12_RFU
R625 40.2_0402_1% CMDA6 K4 M13 MDA23 CMDA26 K4 M13 MDA47
A8/A7 A10/A0 DQ15 DQ23 A8/A7 A10/A0 DQ15 DQ23
CMDA11 H5 A9/A1 A11/A6 DQ0 DQ24 U4 MDA24 CMDA23 H5 A9/A1 A11/A6 DQ0 DQ24 U4 MDA32 CMD10 A0_A10
CLKA0# 1 2 CMDA10 H4 U2 MDA25 CMDA22 H4 U2 MDA33
23 CLKA0# A10/A0 A8/A7 DQ1 DQ25 A10/A0 A8/A7 DQ1 DQ25
R462 DIS@ 40.2_0402_1% CMDA7 K5 A11/A6 A9/A1 DQ2 DQ26 T4 MDA26 CMDA27 K5 A11/A6 A9/A1 DQ2 DQ26 T4 MDA34 CMD11 A1_A9
1
C395 CMDA9 J5 A12/RFU/NC DQ3 DQ27 T2 MDA27 CMDA25 J5 A12/RFU/NC DQ3 DQ27 T2 MDA35 BYTE4
0.01U_0402_16V7K
DQ4 DQ28 N4 MDA28 BYTE3 +1.5VSDGPU DQ4 DQ28 N4 MDA36 CMD12 RAS#
DIS@ A5 N2 MDA29 A5 N2 MDA37
2
VPP/NC DQ5 DQ29 VPP/NC DQ5 DQ29

R471 U5 VPP/NC DQ6 DQ30 M4 MDA30 R463 U5 VPP/NC DQ6 DQ30 M4 MDA38 CMD13 RST#
1 DIS@ 2 M2 MDA31 1 DIS@ 2 M2 MDA39
DQ7 DQ31 DQ7 DQ31
1K_0402_1%
+1.5VSDGPU
1K_0402_1%
+1.5VSDGPU
CMD14 CKE#
CLKA1 1 DIS@ 2 J1 J1
23 CLKA1 MF MF
R643 40.2_0402_1% R637 1 DIS@ 2 1K_0402_1% J10 SEN
R624 1 DIS@ 2 1K_0402_1% J10 SEN CMD15 CAS#
R639 1 DIS@ 2 121_0402_1% J13 B1 R634 1 DIS@ 2 121_0402_1% J13 B1
ZQ VDDQ ZQ VDDQ
23 CLKA1#
CLKA1# 1 2 VDDQ D1 VDDQ D1 CMD16 CS#
R644 DIS@ 40.2_0402_1% F1 F1
VDDQ VDDQ
1
C506 CMDA8 J4 ABI# VDDQ M1 CMDA24 J4 ABI# VDDQ M1 CMD17 A3_BA3

0.01U_0402_16V7K CMDA12 G3 P1 CMDA31 G3 P1
RAS# CAS# VDDQ RAS# CAS# VDDQ
DIS@ CMDA0 G12 T1 CMDA21 G12 T1 CMD18 A2_BA0
2
CMDA15 CS# WE# VDDQ CMDA28 CS# WE# VDDQ

L3 CAS# RAS# VDDQ G2 L3 CAS# RAS# VDDQ G2
CMDA5 L12 WE# CS# VDDQ L2 CMDA16 L12 WE# CS# VDDQ L2 CMD19 A4_BA2
VDDQ B3 VDDQ B3
VDDQ D3 VDDQ D3 CMD20 A5_BA1
VDDQ F3 VDDQ F3
U9 U9
23 FBA_WCK01#
FBA_WCK01# D5 WCK01# WCK23# VDDQ H3 23 FBA_WCK67#
FBA_WCK67# D5 WCK01# WCK23# VDDQ H3 CMD21 WE#
FBA_WCK01 D4 K3 FBA_WCK67 D4 K3
23 FBA_WCK01 WCK01 WCK23 VDDQ 23 FBA_WCK67 WCK01 WCK23 VDDQ
VDDQ M3 VDDQ M3 CMD22 A7_A8
HYNMFR@ SA00004GD30 HYNAFR@ SA00004GD50 FBA_WCK23# P5 P3 FBA_WCK45# P5 P3
23 FBA_WCK23# WCK23# WCK01# VDDQ 23 FBA_WCK45# WCK23# WCK01# VDDQ
C
23 FBA_WCK23
FBA_WCK23 P4 WCK23 WCK01 VDDQ T3 23 FBA_WCK45
FBA_WCK45 P4 WCK23 WCK01 VDDQ T3 CMD23 A6_A11 C
VDDQ E5 VDDQ E5
S IC D5 64M32/2.5G H5GQ2H24MFR-T2C ABO! S IC D5 64M32/2.5G H5GQ2H24AFR-T2C ABO!
VDDQ N5 VDDQ N5 CMD24 ABI#
U10 U10 +FBA_VREFD1 A10 E10 +FBA_VREFD2 A10 E10
VREFD VDDQ VREFD VDDQ
U10 VREFD VDDQ N10 U10 VREFD VDDQ N10 CMD25 A12_RFU
+FBA_VREFC1 J14 B12 +FBA_VREFC2 J14 B12
VREFC VDDQ VREFC VDDQ
HYNMFR@ SA00004GD30 HYNAFR@ SA00004GD50
VDDQ D12 VDDQ D12 CMD26 A0_A10
VDDQ F12 VDDQ F12
VDDQ H12 VDDQ H12 CMD27 A1_A9
S IC D5 64M32/2.5G H5GQ2H24MFR-T2C ABO! S IC D5 64M32/2.5G H5GQ2H24AFR-T2C ABO! CMDA13 J2 K12 CMDA29 J2 K12
RESET# VDDQ RESET# VDDQ
U11 U11
VDDQ M12 VDDQ M12 CMD28 RAS#
VDDQ P12 VDDQ P12
VDDQ T12 VDDQ T12 CMD29 RST#
HYNMFR@ SA00004GD30 HYNAFR@ SA00004GD50 G13 G13
VDDQ VDDQ
H1 VSS VDDQ L13 H1 VSS VDDQ L13 CMD30 CKE#
K1 VSS VDDQ B14 K1 VSS VDDQ B14
S IC D5 64M32/2.5G H5GQ2H24MFR-T2C ABO! S IC D5 64M32/2.5G H5GQ2H24AFR-T2C ABO! B5 VSS VDDQ D14 B5 VSS VDDQ D14 CMD31 CAS#
U12 U12 G5 F14 G5 F14
VSS VDDQ VSS VDDQ
L5 VSS VDDQ M14 L5 VSS VDDQ M14
T5 VSS VDDQ P14 T5 VSS VDDQ P14
HYNMFR@ SA00004GD30 HYNAFR@ SA00004GD50 B10 T14 B10 T14
VSS VDDQ VSS VDDQ
D10 VSS D10 VSS
G10 VSS G10 VSS
S IC D5 64M32/2.5G H5GQ2H24MFR-T2C ABO! S IC D5 64M32/2.5G H5GQ2H24AFR-T2C ABO! L10 A1 L10 A1
VSS VSSQ VSS VSSQ
P10 VSS VSSQ C1 P10 VSS VSSQ C1
T10 VSS VSSQ E1 T10 VSS VSSQ E1
H14 VSS VSSQ N1 H14 VSS VSSQ N1
+1.5VSDGPU K14 R1 K14 R1
+1.5VSDGPU VSS VSSQ +1.5VSDGPU VSS VSSQ
VSSQ U1 VSSQ U1
VSSQ H2 VSSQ H2
1
G1 K2 +1.5VSDGPU G1 K2
R638 VDD VSSQ VDD VSSQ
L1 VDD VSSQ A3 L1 VDD VSSQ A3
DIS@ G4 C3 G4 C3
549_0402_1% VDD VSSQ VDD VSSQ
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
4.7U_0603_6.3V6K
L4 VDD VSSQ E3 L4 VDD VSSQ E3
C5 N3 1 1 1 1 1 1 C5 N3
2
VDD VSSQ VDD VSSQ
C501
C500
C203
C184
C193
C189
+FBA_VREFA1 1 2 +FBA_VREFC1 R5 R3 R5 R3
R475 DIS@ 931_0402_1% VDD VSSQ VDD VSSQ
C10 VDD VSSQ U3 C10 VDD VSSQ U3
1
D 16 mil R10 VDD VSSQ C4 R10 VDD VSSQ C4

1
R635 C407 2 2 2 2 2 2
D11 VDD VSSQ R4 D11 VDD VSSQ R4
2 Q48 DIS@ 0.01U_0402_16V7K G11 F5 DIS@ @ DIS@ DIS@ DIS@ DIS@ G11 F5
B 22,28 MEM_VREF G 2N7002K_SOT23-3 1.33K_0402_1% DIS@ VDD VSSQ VDD VSSQ B
L11 M5 L11 M5
2
VDD VSSQ VDD VSSQ

S DIS@ P11 F10 P11 F10
3
VDD VSSQ VDD VSSQ
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
G14 VDD VSSQ M10 G14 VDD VSSQ M10
L14 VDD VSSQ C11 1 1 1 1 L14 VDD VSSQ C11
Near ball
C505
C504
C502
C503
VSSQ R11 VSSQ R11
VSSQ A12 VSSQ A12
VSSQ C12 VSSQ C12
E12 2 2 2 2 E12
+1.5VSDGPU VSSQ DIS@ DIS@ DIS@ DIS@ VSSQ
VSSQ N12 VSSQ N12
VSSQ R12 VSSQ R12
170-BALL U12 170-BALL U12
VSSQ VSSQ
1
VSSQ H13 VSSQ H13

R640 SGRAM GDDR5 K13 SGRAM GDDR5 K13
DIS@ VSSQ VSSQ
VSSQ A14 VSSQ A14
549_0402_1% C14 C14
VSSQ VSSQ
E14 E14
2
+FBA_VREFA1 1 DIS@ 2 +FBA_VREFD1 VSSQ VSSQ

VSSQ N14 VSSQ N14
R636 931_0402_1% R14 R14
VSSQ VSSQ
1
VSSQ U14 VSSQ U14

1
R479 C406 C297

DIS@ DIS@ DIS@ @ @
1.33K_0402_1% 0.01U_0402_16V7K 0.01U_0402_16V7K
2
SA00004GD30 H5GQ1H24AFR-T2L_BGA170 SA00004GD30 H5GQ1H24AFR-T2L_BGA170

2
Near ball Near ball

External VRAM Thermal Sensor
+1.5VSDGPU +1.5VSDGPU +3VS SA00003PU00
+1.5VSDGPU C142
0.1U_0402_16V4Z S IC W83L771AWG-2 TSSOP 8P SENSOR
建議線路
1
1
1 2
R660 R657 DIS@
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
0.1ux6,1ux4,10ux1 FBVDDQ 1 1 1 1 1 1 1 DIS@ DIS@

C391
C209
C278
C212
C211
C230
C204
549_0402_1% 549_0402_1%
1ux4,10ux1 FBVDD
2
2
+FBA_VREFA2 1 2 +FBA_VREFC2 +FBA_VREFA2 1 DIS@ 2 +FBA_VREFD2 U16
2 2 2 2 2 2 2
for 2pcs VRAM R658 DIS@ 931_0402_1% R656 931_0402_1% 1 VDD SCLK 8 EC_SMB_CK2 12,14,22,36
1
1
DIS@ @ @ DIS@ DIS@ DIS@ DIS@
D 16 mil
1
1
A R659 C542 R655 C538 C536 2 7 A
D+ SDATA EC_SMB_DA2 12,14,22,36
MEM_VREF Q52 DIS@ 0.01U_0402_16V7K DIS@ DIS@ DIS@
目前 2
G 2N7002K_SOT23-3 1.33K_0402_1% DIS@ 1.33K_0402_1% 0.01U_0402_16V7K 0.01U_0402_16V7K 3 6 1 DIS@ 2 +3VS
2
2
D- ALERT#
S DIS@ R167 10K_0402_5%
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1ux8+1ux8+4.7ux3(@)+10ux2
Dr-Bios.com
3
1 1 1 1 4 THERM# GND 5
C392
C315
C376
C369
Near ball Near ball Near ball

W83L771AWG-2 TSSOP8P
2 2 2 2 SA00003PU00
DIS@ DIS@ DIS@ DIS@ DIS@
Classification Compal Secret Data Compal Electronics, Inc.
VRAM BOM Config THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A8203
X76364BOL01: 1G HYN 128*16 2.5G SA00004GD30 (S IC D5 64M32/2.5G H5GQ2H24MFR-T2C ABO!) Custom C
4019J1
5 4 3 2 1
5 4 3 2 1
Memory Partition C -
U11 U12
MF=0 MF=1 MF=1 MF=0 MF=0 MF=1 MF=1 MF=0

MDC[15..0]
23 MDC[15..0]
64 bits A4 MDC0 A4 MDC56

MDC[31..16] DQSC0 DQ24 DQ0 MDC1 DQSC7 DQ24 DQ0 MDC57
23 MDC[31..16] C2 EDC0 EDC3 DQ25 DQ1 A2 C2 EDC0 EDC3 DQ25 DQ1 A2
DQSC1 C13 B4 MDC2 DQSC6 C13 B4 MDC58
EDC1 EDC2 DQ26 DQ2 EDC1 EDC2 DQ26 DQ2
23 MDC[47..32]
MDC[47..32] DQSC2 R13 EDC2 EDC1 DQ27 DQ3 B2 MDC3 BYTE0 DQSC5 R13 EDC2 EDC1 DQ27 DQ3 B2 MDC59
MDC[63..48]
DQSC3 R2 EDC3 EDC0 DQ28 DQ4 E4 MDC4 DQSC4 R2 EDC3 EDC0 DQ28 DQ4 E4 MDC60 BYTE7
E2 MDC5 E2 MDC61
23 MDC[63..48] DQ29 DQ5 DQ29 DQ5
F4 MDC6 F4 MDC62
DQMC[3..0] DQMC0 DQ30 DQ6 MDC7 DQMC7 DQ30 DQ6 MDC63
23 DQMC[3..0] D2 DBI0# DBI3# DQ31 DQ7 F2 D2 DBI0# DBI3# DQ31 DQ7 F2
DQMC1 D13 A11 MDC8 DQMC6 D13 A11 MDC48
CMDC[31..0] DQMC2 DBI1# DBI2# DQ16 DQ8 MDC9 DQMC5 DBI1# DBI2# DQ16 DQ8 MDC49
23 CMDC[31..0] P13 DBI2# DBI1# DQ17 DQ9 A13 P13 DBI2# DBI1# DQ17 DQ9 A13
DQMC3 P2 B11 MDC10 DQMC4 P2 B11 MDC50
+1.5VSDGPU DBI3# DBI0# DQ18 DQ10 DBI3# DBI0# DQ18 DQ10
23 DQMC[7..4]
DQMC[7..4]
DQ19 DQ11 B13 MDC11 BYTE1 DQ19 DQ11 B13 MDC51
DQSC[3..0]
CLKC0 J12 CK DQ20 DQ12 E11 MDC12 CLKC1 J12 CK DQ20 DQ12 E11 MDC52 BYTE6
D CLKC0# J11 E13 MDC13 CLKC1# J11 E13 MDC53 D
23 DQSC[3..0] CK# DQ21 DQ13 CK# DQ21 DQ13
CMDC14 J3 F11 MDC14 CMDC30 J3 F11 MDC54
CKE# CMDC14 DQSC[7..4] CKE# DQ22 DQ14 CKE# DQ22 DQ14
1 DIS@ 2 23 DQSC[7..4] DQ23 DQ15 F13 MDC15
DQ23 DQ15 F13 MDC55
R627 10K_0402_5% U11 MDC16 U11 MDC40
CMDC2 DQ8 DQ16 MDC17 CMDC19 DQ8 DQ16 MDC41
H11 BA0/A2 BA2/A4 DQ9 DQ17 U13 H11 BA0/A2 BA2/A4 DQ9 DQ17 U13
RESET# CMDC13 1 DIS@ 2 CMDC4 K10 T11 MDC18 CMDC17 K10 T11 MDC42
BA1/A5 BA3/A3 DQ10 DQ18 BA1/A5 BA3/A3 DQ10 DQ18
R483 10K_0402_5% CMDC3 K11 BA2/A4 BA0/A2 DQ11 DQ19 T13 MDC19 CMDC18 K11 BA2/A4 BA0/A2 DQ11 DQ19 T13 MDC43 BYTE5
CMDC1 H10 BA3/A3 BA1/A5 DQ12 DQ20 N11 MDC20 BYTE2 CMDC20 H10 BA3/A3 BA1/A5 DQ12 DQ20 N11 MDC44
N13 MDC21 N13 MDC45
DQ13 DQ21 MDC22 DQ13 DQ21 MDC46
DQ14 DQ22 M11 DQ14 DQ22 M11
CMDC6 K4 M13 MDC23 CMDC26 K4 M13 MDC47
+1.5VSDGPU CMDC11 A8/A7 A10/A0 DQ15 DQ23 MDC24 CMDC23 A8/A7 A10/A0 DQ15 DQ23 MDC32
H5 A9/A1 A11/A6 DQ0 DQ24 U4 H5 A9/A1 A11/A6 DQ0 DQ24 U4
CMDC10 H4 U2 MDC25 CMDC22 H4 U2 MDC33
CMDC7 A10/A0 A8/A7 DQ1 DQ25 MDC26 CMDC27 A10/A0 A8/A7 DQ1 DQ25 MDC34
K5 A11/A6 A9/A1 DQ2 DQ26 T4 K5 A11/A6 A9/A1 DQ2 DQ26 T4
CKE#
CMDC9 J5 A12/RFU/NC DQ3 DQ27 T2 MDC27 CMDC25 J5 A12/RFU/NC DQ3 DQ27 T2 MDC35 BYTE4
CMDC30 1 DIS@ 2 DQ4 DQ28 N4 MDC28 BYTE3 +1.5VSDGPU DQ4 DQ28 N4 MDC36
R651 10K_0402_5% A5 N2 MDC29 A5 N2 MDC37
R492 VPP/NC DQ5 DQ29 MDC30 R633 VPP/NC DQ5 DQ29 MDC38
U5 VPP/NC DQ6 DQ30 M4 U5 VPP/NC DQ6 DQ30 M4
RESET# CMDC29 1 DIS@ 2 1 DIS@ 2 M2 MDC31 1 DIS@ 2 M2 MDC39
R650 10K_0402_5% 1K_0402_1% DQ7 DQ31 1K_0402_1% DQ7 DQ31
J1 +1.5VSDGPU J1 +1.5VSDGPU
R630 1 DIS@ MF MF
2 1K_0402_1% J10 SEN
R502 1 DIS@ 2 1K_0402_1% J10 SEN
R631 1 DIS@ 2 121_0402_1% J13 B1 R632 1 DIS@ 2 121_0402_1% J13 B1
ZQ VDDQ ZQ VDDQ
VDDQ D1 VDDQ D1
VDDQ F1 VDDQ F1
CLKC0 1 DIS@ 2 CMDC8 J4 M1 CMDC24 J4 M1
23 CLKC0 ABI# VDDQ ABI# VDDQ
R646 40.2_0402_1% CMDC12 G3 P1 CMDC31 G3 P1
CMDC0 RAS# CAS# VDDQ CMDC21 RAS# CAS# VDDQ
G12 CS# WE# VDDQ T1 G12 CS# WE# VDDQ T1
CMDC15 L3 G2 CMDC28 L3 G2
CLKC0# CAS# RAS# VDDQ CAS# RAS# VDDQ
23 CLKC0# 1 DIS@ 2 CMDC5 L12 WE# CS# VDDQ L2 CMDC16 L12 WE# CS# VDDQ L2
R647 40.2_0402_1% B3 B3
VDDQ VDDQ
1
C512 D3 D3
0.01U_0402_16V7K VDDQ VDDQ
VDDQ F3 VDDQ F3
DIS@ FBB_WCK01# D5 H3 FBB_WCK67# D5 H3
23 FBB_WCK01# 23 FBB_WCK67#
2
FBB_WCK01 WCK01# WCK23# VDDQ FBB_WCK67 WCK01# WCK23# VDDQ

23 FBB_WCK01 D4 WCK01 WCK23 VDDQ K3 23 FBB_WCK67 D4 WCK01 WCK23 VDDQ K3
VDDQ M3 VDDQ M3
FBB_WCK23# P5 P3 FBB_WCK45# P5 P3
23 FBB_WCK23# WCK23# WCK01# VDDQ 23 FBB_WCK45# WCK23# WCK01# VDDQ
C CLKC1 1 DIS@ 2 FBB_WCK23 P4 T3 FBB_WCK45 P4 T3 C
23 CLKC1 23 FBB_WCK23 WCK23 WCK01 VDDQ 23 FBB_WCK45 WCK23 WCK01 VDDQ
R648 40.2_0402_1% E5 E5
VDDQ VDDQ
VDDQ N5 VDDQ N5
+FBB_VREFD1 A10 E10 +FBB_VREFD2 A10 E10
CLKC1# VREFD VDDQ VREFD VDDQ
23 CLKC1# 1 DIS@ 2 U10 VREFD VDDQ N10 U10 VREFD VDDQ N10
R649 40.2_0402_1% +FBB_VREFC1 J14 B12 +FBB_VREFC2 J14 B12
VREFC VDDQ VREFC VDDQ
1
C521 D12 D12

0.01U_0402_16V7K VDDQ VDDQ
VDDQ F12 VDDQ F12
DIS@ H12 H12
2
CMDC13 VDDQ CMDC29 VDDQ

J2 RESET# VDDQ K12 J2 RESET# VDDQ K12
VDDQ M12 VDDQ M12
VDDQ P12 VDDQ P12
+1.5VSDGPU T12 T12
VDDQ VDDQ
VDDQ G13 VDDQ G13
H1 VSS VDDQ L13 H1 VSS VDDQ L13
1
K1 VSS VDDQ B14 K1 VSS VDDQ B14

R500 B5 D14 B5 D14
DIS@ VSS VDDQ VSS VDDQ
G5 VSS VDDQ F14 G5 VSS VDDQ F14
549_0402_1% L5 M14 L5 M14
VSS VDDQ VSS VDDQ
T5 P14 T5 P14
2
+FBB_VREFB1 1 +FBB_VREFC1 VSS VDDQ VSS VDDQ

2 B10 VSS VDDQ T14 B10 VSS VDDQ T14
R645 DIS@ 931_0402_1% 16 mil D10 VSS D10 VSS
1
G10 VSS G10 VSS

1
R626 C229 L10 A1 L10 A1

D VSS VSSQ VSS VSSQ
1
DIS@ DIS@ P10 C1 P10 C1

Q51 1.33K_0402_1% 0.01U_0402_16V7K VSS VSSQ VSS VSSQ
2 T10 E1 T10 E1
2
22,27 MEM_VREF G 2N7002K_SOT23-3 VSS VSSQ VSS VSSQ

H14 N1 H14 N1
2
DIS@ VSS VSSQ VSS VSSQ

S K14 R1 K14 R1
3
+1.5VSDGPU VSS VSSQ +1.5VSDGPU VSS VSSQ

VSSQ U1 VSSQ U1
Near ball VSSQ H2 VSSQ H2
G1 VDD VSSQ K2 G1 VDD VSSQ K2
+1.5VSDGPU L1 A3 L1 A3
VDD VSSQ +1.5VSDGPU VDD VSSQ
G4 VDD VSSQ C3 G4 VDD VSSQ C3
L4 VDD VSSQ E3 L4 VDD VSSQ E3
1
C5 VDD VSSQ N3 C5 VDD VSSQ N3
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
R495
4.7U_0603_6.3V6K
R5 VDD VSSQ R3 R5 VDD VSSQ R3
DIS@ C10 U3 1 1 1 1 1 1 C10 U3
VDD VSSQ VDD VSSQ
C239
C241
C489
C491
C492
C493
B 549_0402_1% R10 C4 R10 C4 B
VDD VSSQ VDD VSSQ
D11 R4 D11 R4
2
+FBB_VREFB1 1 +FBB_VREFD1 VDD VSSQ VDD VSSQ

2 G11 VDD VSSQ F5 G11 VDD VSSQ F5
R628 DIS@ 931_0402_1% 2 2 2 2 2 2
L11 VDD VSSQ M5 L11 VDD VSSQ M5
1
0.01U_0402_16V7K
C236
P11 F10 DIS@ @ DIS@ DIS@ DIS@ DIS@ P11 F10

VDD VSSQ VDD VSSQ
1
R629 C237 G14 M10 G14 M10

DIS@ DIS@ VDD VSSQ VDD VSSQ
L14 VDD VSSQ C11 L14 VDD VSSQ C11
DIS@
1.33K_0402_1% 0.01U_0402_16V7K R11 R11

2
VSSQ VSSQ
A12 A12
2
VSSQ VSSQ
VSSQ C12 VSSQ C12
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
VSSQ E12 VSSQ E12
Near ball VSSQ N12 1 1 1 1 VSSQ N12
C494
C495
C496
C497
VSSQ R12 VSSQ R12
170-BALL U12 170-BALL U12
VSSQ VSSQ
VSSQ H13 VSSQ H13
+1.5VSDGPU SGRAM GDDR5 2 2 2 2 SGRAM GDDR5
VSSQ K13 VSSQ K13
A14 DIS@ DIS@ DIS@ DIS@ A14
VSSQ VSSQ
VSSQ C14 VSSQ C14
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
VSSQ E14 VSSQ E14

1 1 1 1 1 1 1 VSSQ N14 VSSQ N14
C185
C196
C511
C260
C507
C238
C508
建議線路 VSSQ
VSSQ
R14
U14
VSSQ
VSSQ
R14
U14
0.1ux6,1ux4,10ux1 FBVDDQ 2
DIS@
2
@
2
@
2
DIS@
2
DIS@
2
DIS@
2
DIS@
@ @ H5GQ1H24AFR-T2L_BGA170
SA00004GD30
1ux4,10ux1 FBVDD SA00004GD30 H5GQ1H24AFR-T2L_BGA170
+1.5VSDGPU +1.5VSDGPU
for 2pcs VRAM
1
1
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
目前 1 1 1 1 R664 R661
C515
C513
C518
C516
DIS@ DIS@
0.1ux8+1ux8+4.7ux3(@)+10ux2 549_0402_1% 549_0402_1%
2
2
2 2 2 2 +FBB_VREFB2 1 +FBB_VREFC2 +FBB_VREFB2 1 +FBB_VREFD2
2 2
DIS@ DIS@ DIS@ DIS@ R666 DIS@ 931_0402_1% 16 mil R662 DIS@ 931_0402_1%
1
0.01U_0402_16V7K
C549
A A
1
1
R665 C551 R663 C550
D
1
DIS@ DIS@ DIS@ DIS@
Dr-Bios.com DIS@
MEM_VREF 2 Q53 1.33K_0402_1% 0.01U_0402_16V7K 1.33K_0402_1% 0.01U_0402_16V7K
2
2
G 2N7002K_SOT23-3
2
2
S DIS@
3
Near ball Near ball

SCHEMATIC MB A8203
Custom C
4019J1
5 4 3 2 1
A B C D E
LCD POWER CIRCUIT +LED_VOUT L14 +LG_VOUT

+LCDVDD FBMA-L11-201209-221LMA30T_0805
+3VS W=60mils
2 1
+3VALW L15
W=60mils
1
FBMA-L11-201209-221LMA30T_0805
2 1
R129 1
1
300_0603_5% C43 1 1
R133 4.7U_0603_6.3V6K C27 C28 SM010014520 3000ma
3 2
10K_0402_5% 680P_0402_50V7K 68P_0402_50V8J
2 220ohm@100mhz
1 1
2 2 DCR 0.04
3
1K_0402_5% S
DMN66D0LDW-7_SOT363-6 Q6
5 2 1 2
Q7B R134 G AO3419L_SOT23-3
4 1 D
1
C70
0.047U_0402_16V7K
+LCDVDD
LCD/LED PANEL Conn.
2
W=60mils
6
+LED_VOUT
1 1 JLVDS1
DMN66D0LDW-7_SOT363-6 C50 C36
16 PCH_ENVDD 2 1 1
Q7A 4.7U_0603_6.3V6K 0.1U_0402_16V4Z 2 2
1
W=60mils 3
1
R125 2 2 3
4 4
100K_0402_5% FB1 5
53 FB1 5
FB2 6
53 FB2 6
FB3 7
53 FB3
2
FB4 7
53 FB4 8 8
9 9
10 10
11 11
12 12
U31 @ +3VS 13
@ 13
1 2 1 14
2
R410 100K_0402_5% OE# 5 15
14 2
VCC 15
16 16
16 DPST_PWM 2 IN 17 17
18 18
4 INVTPWM 19
OUT INVTPWM 53 19
3 GND 20 20
21 21
74AHC1G125GW_SOT353-5 22 22
23 23
1 @ 2 +3VS 24
R422 0_0402_5% EDP_HPD 24
25 25
+LCDVDD 26 26
27 27
C35 1 2 0.1U_0402_16V7K EDP_AUXN_C 28
eDP 4
4
EDP_AUXN
EDP_AUXP C34 1 2 0.1U_0402_16V7K EDP_AUXP_C 29
30
28
29
30
C59 1 2 0.1U_0402_16V7K EDP_TXP0_C 31
4 EDP_TXP0 31
C58 1 2 0.1U_0402_16V7K EDP_TXN0_C 32
4 EDP_TXN0 32
33 33
4 EDP_HPD# 34 34
35 35
6
36 36 G1 41
+3VS 37 37 G2 42
USB20_P10_R 38 43
Q55A EDP_HPD USB20_N10_R 38 G3
2 39 39 G4 44
40 40 G5 45
1
3 DMN66D0LDW-7_SOT363-6 3
1
D12 ACES_50398-04071-001
R76 1 6 CONN@
100K_0402_5% I/O1 I/O4
2 5 +3VS
2
REF1 REF2
USB20_P10_R 3 4 USB20_N10_R
I/O2 I/O3
@ AZC099-04S_SOT23
R117 1 2 0_0402_5%
+LCDVDD
L17 @ +3VS
USB20_P10_R
Place closed to JLVDS1
17 USB20_P10 2 2 1 1
1 1 1
3 4 USB20_N10_R C31 C44 C30
17 USB20_N10 3 4
WCM2012F2SF-670T04_0805 0.1U_0402_16V4Z 10U_0603_6.3V6M 0.1U_0402_16V4Z
2 2 2
R116 1 2 0_0402_5%
W=60mils
4 4
A
Dr-Bios.com B
Compal Secret Data
C D
Custom
Title
Date:
4019J1
SCHEMATIC MB A8203

E
29 of 56
Rev
C
A B C D E
SM070001310 400ma 90ohm@100mhz DCR 0.3

R28
0_0603_5% HDMI_CLK+ R19 1 2 0_0402_5% HDMI_R_CK+
1 @ 2 W=40mils
1 1 2 2
L4
+HDMI_5V_OUT WCM-2012-900T_0805
+5VS 2 F1 @4 3
+HDMI_5V 4 3
1 1 2
3 1 HDMI_CLK- R20 1 2 0_0402_5% HDMI_R_CK-
D2 1.1A_6V_SMD1812P110TF
1 RB491D-YS_SOT23-3 C4 1
0.1U_0402_16V4Z HDMI_TX0+ R15 1 2 0_0402_5% HDMI_R_D0+
2
1 1 2 2
L2
WCM-2012-900T_0805
@4 3
C7 4 3
16 PCH_DPB_N0 2 1 0.1U_0402_16V7K HDMI_TX2-
16 PCH_DPB_P0 C6 2 1 0.1U_0402_16V7K HDMI_TX2+ HDMI_TX0- R16 1 2 0_0402_5% HDMI_R_D0-
16 PCH_DPB_N1 C11 2 1 0.1U_0402_16V7K HDMI_TX1-

16 PCH_DPB_P1 C10 2 1 0.1U_0402_16V7K HDMI_TX1+ HDMI_TX1+ R17 1 2 0_0402_5% HDMI_R_D1+
16 PCH_DPB_N2 C9 2 1 0.1U_0402_16V7K HDMI_TX0- 1 2

C8 1 2
16 PCH_DPB_P2 2 1 0.1U_0402_16V7K HDMI_TX0+ L3
WCM-2012-900T_0805
16 PCH_DPB_N3 C13 2 1 0.1U_0402_16V7K HDMI_CLK- @4 3
C12 4 3
16 PCH_DPB_P3 2 1 0.1U_0402_16V7K HDMI_CLK+
HDMI_TX1- R18 1 2 0_0402_5% HDMI_R_D1-
HDMI_TX2+ R13 1 2 0_0402_5% HDMI_R_D2+
1 1 2 2
+3VS L1
2 WCM-2012-900T_0805 2
@4 3
4 3
HDMI_TX2- R14 1 2 0_0402_5% HDMI_R_D2-
1
R385
1M_0402_5% HDMI_TX2- R365 1 2 680_0402_5% HDMI_GND
HDMI_TX2+ R366 1 2 680_0402_5%
2
2
HDMI_TX1- R361 1 2 680_0402_5%
16 PCH_DPB_HPD 1 6 HDMI_HPD HDMI_TX1+ R362 1 2 680_0402_5%
1 HDMI_TX0- R363 1 2 680_0402_5%

Q30A
1
HDMI_TX0+ R364 1 2 680_0402_5%
DMN66D0LDW-7_SOT363-6 R354 C437
100K_0402_5% 220P_0402_50V7K HDMI_CLK- R359 1 2 680_0402_5%
2 HDMI_CLK+ R360 1 2 680_0402_5%
3
+HDMI_5V_OUT DMN66D0LDW-7_SOT363-6
+3VS 5
Q30B
4
3 3
+3VS
HDMI connector
2
R388 1 2 2.2K_0402_5% SDVO_SCLK HDMI_HPD 19

D25 D24 HP_DET
+HDMI_5V_OUT 18 +5V
R387 1 2 2.2K_0402_5% SDVO_SDATA RB751V-40_SOD323-2 RB751V-40_SOD323-2 17
HDMI_SDATA DDC/CEC_GND
16
2 1
2 1
HDMI_SCLK SDA
15 SCL
+3VS 14
R353 R352 Reserved
13 CEC
2.2K_0402_5% 2.2K_0402_5% HDMI_R_CK- 12 20
CK- GND
11 CK_shield GND 21
2
G
HDMI_R_CK+ 10 22
1
CK+ GND
RF request HDMI_R_D0- 9 D0- GND 23
SDVO_SCLK 3 1 HDMI_SCLK 8
16 SDVO_SCLK D0_shield
HDMI_R_D0+
S
1 7 D0+
2
G
HDMI_R_D1- 6
Q32 C435 D1-
5 D1_shield
SDVO_SDATA 3 1 2N7002K_SOT23-3 HDMI_SDATA @ 47P_0402_50V8J HDMI_R_D1+ 4
16 SDVO_SDATA 2 D1+
HDMI_R_D2-
S
1 3 D2-
2 D2_shield
Q31 C436 HDMI_R_D2+ 1
2N7002K_SOT23-3 @ 47P_0402_50V8J D2+
2 LOTES_ABA-HDM-022-K01
Place closed to JHDMI1 CONN@
4 JHDMI1 4
A
Dr-Bios.com B
Compal Secret Data
C D
Title

Custom
Date:
SCHEMATIC MB A8203
4019J1
E
30 of 56
Rev
C
A B C D E
SATA HDD1 Conn.

JHDD1 +3VS
1 1 1
C603 1 1
13 SATA_PTX_DRX_P0 SATA_PTX_DRX_P0 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P0 2 2 1
13 SATA_PTX_DRX_N0 SATA_PTX_DRX_N0 C602 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N0 3 C290
3
4 4
SATA_PRX_DTX_N0 C600 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N0 5 0.1U_0402_16V4Z
13 SATA_PRX_DTX_N0 SATA_PRX_DTX_P0 C598 1 5 2
13 SATA_PRX_DTX_P0 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P0 6 6
7 7
+3VS 8 8
9 9
10 10
11 +5VS_HDD
+5VS +5VS_HDD 11
12 12
+5VS +5VS_ODD J13 @ 13 100mils
R169 13
1 1 2 2 14 14
0_0805_5% 15
+VSB 15
0.1U_0402_16V4Z
C283
1000P_0402_50V7K
C285
1 @ 2 JUMP_43X118 16 1 1 1 1
16
1U_0603_10V6K
C282
17 C279
17
18 18
D
6 19 10U_0805_10V4Z
S
19
2
2 2 2 2
1 5 4 20 20
R460 2 21
470K_0402_5% C141 Q12 G1
1 22 G2
2 SI3456DDV-T1-GE3_TSOP6 2
23
G
2 G3
24
1
3
1U_0603_10V6K G4
ACES_50406-02071-001
ODD_EN CONN@
SP010016L00
D
1
2
1
2 Q37 R461 C490
18 ODD_EN#
G 2N7002K_SOT23-3
S 1.5M_0402_5% 0.1U_0603_25V7K
3
2
1
SATA ODD Conn. +5VS_ODD

JODD1 80mils
1 GND
1U_0603_10V6K
C152
0.1U_0402_16V4Z
C149
1000P_0402_50V7K
C150
13 SATA_PTX_DRX_P2 C116 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P2 2 1 1 1 1
C117 1 A+
13 SATA_PTX_DRX_N2 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N2 3 A-
C148
3 4 3
C118 1 GND
13 SATA_PRX_DTX_N2 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N2 5 B-
10U_0805_10V4Z
C120 1 2 2 2 2
13 SATA_PRX_DTX_P2 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P2 6 B+
7 GND
1 @ 2 ODD_DETECT#_R 8
18 ODD_DETECT# DP
+5VS_ODD R165 0_0402_5% +5VS_ODD 9 +5V
10 +5V GND 14
1 @ 2 ODD_DA#_R 11 15
17 ODD_DA# MD GND
R177 0_0402_5% 12 16
GND GND
13 GND GND 17
2
D21
AZ5125-02S.R7G_SOT23-3 SANTA_20140X-X
CONN@
3/14 EMI request add ESD diode
prevent PCH crack
1
4 4
Dr-Bios.com
SCHEMATIC MB A8203
Custom C
4019J1
A B C D E
A B C D E
U62 +3V_LAN
091211 EMI add 1000P +LAN_BIASVDDH
+3V_LAN 42 VDDC BIASVDDH 25
+1.2V_LAN
2
0.1U_0402_16V4Z 1000P_0402_50V7K 6 14 +LAN_XTALVDDH R446 R444
VDDC XTALVDDH U33 @
1 1 1 1 1 1 15 VDDC 1K_0402_1% 1K_0402_1%
C93 C84 C82 C94 C102 C78 41 @ 8 1
VDDC +LAN_AVDDH VCC A0
30 7 2
1
AVDDH SPROM_CLK WP A1
6 SCL NC 3
4.7U_0603_6.3V6K 2 2 2 2 2 2
36 SPROM_DOUT 5 4
0.1U_0402_16V4Z 0.1U_0402_16V4Z 1000P_0402_50V7K AVDDH SDA GND
2
+LAN_AVDDL 27 AT24C02_SO8
AVDDL LAN_MIDI3- R447 R445
33 AVDDL TRD3_N 37
39 AVDDL 1K_0402_1% 1K_0402_1%
38 LAN_MIDI3+ @
TRD3_P
1 1
1
35 LAN_MIDI2- +3VALW_PCH
+3V_LAN TRD2_N R449
34 LAN_MIDI2+ 0_1206_5%
+LAN_GPHYPLLVDDL TRD2_P +3V_LAN @
24 GPHY_PLLVDDL 2 1
1 2 LAN_PME#
R154 4.7K_0402_5% 31 LAN_MIDI1- +3VALW
TRD1_N
1 1
LAN_MIDI1+ C474 C472
S
TRD1_P 32 1 3
+LAN_PCIEPLLVDD 4.7U_0603_6.3V6K 0.1U_0402_16V4Z Q39
G
18 PCIE_PLLVDDL LAN_MIDI0- 2 2 AO3419L_SOT23-3
29
2
TRD0_N
21 PCIE_PLLVDDL
28 LAN_MIDI0+
TRD0_P
R620
1K_0402_5%
SM010005500 500ma 600ohm@100mhz DCR 0.38 36 LAN_PWR_EN# 1 2
1
LINKLED# 48 1 @ 2 LAN_LINK# L22 C547
R143 0_0402_5% +LAN_PCIEPLLVDD 1 2 +1.2V_LAN 0.1U_0402_16V7K
47 BLM18AG601SN1D_2P
2
SPD100LED#
14 PCIE_PRX_DTX_P1 C83 1 2 0.1U_0402_16V7K PCIE_PRX_DTX_P1_C 17 PCIE_TXD_P 20mil 1 1
14 PCIE_PRX_DTX_N1 C85 1 2 0.1U_0402_16V7K PCIE_PRX_DTX_N1_C 16 PCIE_TXD_N SPD1000LED# 46 C473 C74
14 PCIE_PTX_C_DRX_P1 22 PCIE_RXD_P
14 PCIE_PTX_C_DRX_N1 23 PCIE_RXD_N TRAFFICLED# 45 1 @ 2 LAN_ACTIVITY# 0.1U_0402_16V4Z 4.7U_0603_6.3V6K
2 2
34,36 EC_PME# R150 1 @ 2 0_0402_5% LAN_PME# 4 WAKE#
R142 0_0402_5%
17,34 PLT_RST_BUF#
R149 1 2 0_0402_5% PLT_RST_LAN# 2 REST#
14 CLK_PCIE_LAN 20 PCIE_REFCLK_P
19 L18
14 CLK_PCIE_LAN# PCIE_REFCLK_N SPROM_CLK SPROM_DOUT +LAN_GPHYPLLVDDL 1 2 +1.2V_LAN
(EECLK) (EEDATA) BLM18AG601SN1D_2P
On chip 1 0
20mil C63
1 1
C48
0215 Reserve
MODE 5
1 @ 2 PLT_RST_LAN# 0.1U_0402_16V4Z 4.7U_0603_6.3V6K
5,17,33,36,37 PLT_RST# AT24C02 1 1 2 2
R163 0_0402_5%
2 2
L36
+3VS 43 SPROM_DOUT +LAN_AVDDL 1 2
EEDATA +1.2V_LAN
BLM18AG601SN1D_2P
44 SPROM_CLK 20mil 1 1
R137 1 EECLK
2 1K_0402_5% 40 VMAIN_PRSINT
C467 C469
R148 1 2 10K_0402_5% 1 0.1U_0402_16V4Z 4.7U_0603_6.3V6K

LOW_PWR L24 2 2
40mil 4.7UH_TLPC4012C-4R7M_20%
11 +1.2V_LAN_OUT 1 2 +1.2V_LAN
SR_LX
SM010005500 500ma 600ohm@100mhz DCR 0.38
LAN_XTALO_R 13 8
XTALO SR_VFB L37
1 1
LAN_XTALI 12 C101 +LAN_XTALVDDH 1 2 +3V_LAN
XTALI C105 BLM18AG601SN1D_2P
1
0.1U_0402_16V4Z 10U_0603_6.3V6M 20mil C477
2 2 0.1U_0402_16V4Z
R113
LAN_RDAC 2 L35
1 2 26 RDAC
10 +3V_LAN +LAN_BIASVDDH 1 2
SR_VDDP BLM18AG601SN1D_2P
1.24K_0402_1% 1 1 1
9 C484 C483 20mil C470
SR_VDD 0.1U_0402_16V4Z 0.1U_0402_16V4Z
4.7U_0603_6.3V6K
2 2 2
14 LAN_CLKREQ# 3 CLKREQ# L34
7 +LAN_AVDDH 1 2
NC BLM18AG601SN1D_2P
1 1
20mil C465 C466
PAD
LAN_XTALI 0.1U_0402_16V4Z 0.1U_0402_16V4Z

2 2
49
LAN_XTALO_R BCM57780A0KMLG_QFN48_7X7
1
3 3
R144 2 1
+3V_LAN
Y1 200_0402_1% R396 1K_0402_5% 1
25MHZ_10PF_7V25000014
C449
C448
220P_0402_50V7K
LAN Connector
2
3 1 LAN_XTALO 68P_0402_50V8J JRJ45

3 1 2
2 1 9 Green LED+
GND GND LAN_ACTIVITY# RJ45_GND @
1 1
LAN_LINK# LANGND LAN_LINK# 10
C100 4 2 C99 Green LED-
15P_0402_50V8J 15P_0402_50V8J
20120410 RJ45_MIDI0+ 1 PR1+ SHLD1 14
2 2 follow ESD cost down 13
SHLD2
2
RJ45_MIDI0- 2
remove D28 D11 PR1-
L30ESDL5V0C3-2_SOT23 L30ESDL5V0C3-2_SOT23 RJ45_MIDI1+ 3
T24 PR2+
RJ45_MIDI2+ 4 PR3+
1 TCT1 MCT1 24
LAN_MIDI0+ 2 23 RJ45_MIDI0+ RJ45_MIDI2- 5
LAN_MIDI0- TD1+ MX1+ RJ45_MIDI0- @ PR3-
3 TD1- MX1- 22
RJ45_MIDI1- 6
1
PR2-
4 TCT2 MCT2 21
LAN_MIDI1+ 5 20 RJ45_MIDI1+ RJ45_MIDI3+ 7
LAN_MIDI1- TD2+ MX2+ RJ45_MIDI1- PR4+
6 TD2- MX2- 19
RJ45_MIDI3- 8 PR4-
7 TCT3 MCT3 18
LAN_MIDI2+ 8 17 RJ45_MIDI2+ +3V_LAN 2 1 11
LAN_MIDI2- TD3+ MX3+ RJ45_MIDI2- R379 1K_0402_5% Yellow LED+
9 TD3- MX3- 16 1
LAN_ACTIVITY# 12
220P_0402_50V7K @ Yellow LED-
10 TCT4 MCT4 15
LAN_MIDI3+ 11 14 RJ45_MIDI3+ C442 2 1 SANTA_130452-0P
LAN_MIDI3- TD4+ MX4+ RJ45_MIDI3- 2 C444 68P_0402_50V8J CONN@
12 TD4- MX4- 13
RJ45_GND C17 100P_0402_50V8J LANGND

40mil
1 2
S X'FORM_ IH-160 LAN 40mil
1
SP050006F00
1
4 1 1 1 1 @ D9 4
C462 C460 C463 C461 R384 R383 D10 1 2 LSE-200NX3216TRLF_1206-2
75_0402_1% 75_0402_1% @
0.1U_0402_16V4Z 0.1U_0402_16V4Z LSE-200NX3216TRLF_1206-2
2 2 2 2
2
Dr-Bios.com
1
0.1U_0402_16V4Z R382 R381

0.1U_0402_16V4Z 75_0402_1% 75_0402_1%
2
Place close to TCT pin Security Classification Compal Secret Data Compal Electronics, Inc.
RJ45_GND
BOTHHAND: S X'FORM_ GST5009-D LF LAN, SP050006B00 40mil SCHEMATIC MB A8203
TIMAG:S X'FORM_ IH-160 LAN , SP050006F00 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Custom C
4019J1
A B C D E
A B C D E
+3VS +3VS_CARD
Card Reader 1
J1
2
RTS5209-GR_LQFP48_7X7 JUMP_43X118
40 mils @
40 mils
U26 +3VS_CARD
10 mils
14 PCIE_PTX_C_DRX_P3 PCIE_PTX_C_DRX_P3 1 48 RREF R270 2 1 6.2K_0603_1%
HSIP RREF
1
PCIE_PTX_C_DRX_N3 2 47
40 mils 2 1
1
14 PCIE_PTX_C_DRX_N3 HSIN 3V3_IN C357 0.1U_0402_16V7K
14 CLK_PCIE_CARD CLK_PCIE_CARD 3 46 CARD_CLKREQ#
REFCLKP CLK_REQ# CARD_CLKREQ# 14
14 CLK_PCIE_CARD# CLK_PCIE_CARD# 4 45 PLT_RST#

REFCLKN PERST# PLT_RST# 5,17,32,36,37
1 2 AV12
20 mils 5 44
C334 4.7U_0603_6.3V6K AV12 EEDO
PCIE_PRX_DTX_P3 1 2 PCIE_PRX_C_DTX_P3 6 43
14 PCIE_PRX_DTX_P3 HSOP EECS
C333 0.1U_0402_16V7K
PCIE_PRX_DTX_N3 1 2 PCIE_PRX_C_DTX_N3 7 42
14 PCIE_PRX_DTX_N3 HSON EESK
C332 0.1U_0402_16V7K
8 GND GPIO/EEDI 41
+ODR_PWR 1 2 DV12
20 mils 9 40
DV12 MS_INS# +3VS_CARD
+3VS_CARD
C331 0.1U_0402_16V7K
40 mils 10 39 SD_CD#
Card1_3V3 SD_CD#
40 mils 11
1
38 SP15_SDWP_XDD7 SD_CD#
3V3_IN SP15 R319
6
1 1 12 Card2_3V3 SP14 37 200K_0402_5%
C327 C330
0.1U_0402_16V7K 13 36
2
XD_CD# SP13
10U_0603_6.3V6M
2 2 20 mils DV33_18 14 35
2 SD_CD#_R
2 DV33_18 SP12 2
Q25A
1
1 1 15 34 DMN66D0LDW-7_SOT363-6
C358 C356 GND SP11
@ 0.1U_0402_16V7K 16 33
4.7U_0603_6.3V6K SP1 SP10
2 2
17 SP2 SP9 32
18 SP3 SP8 31
+3VS_CARD
19 SP4 SP7 30
1
SD_D1_R 1 @ 2 SD_D1 20 29
R278 0_0402_5% SD_D1 SP6 SP15_SDWP_XDD7 R327
1 2
SD_D0_R 1 @ 2 SD_D0 21 28 C386 4.7U_0603_6.3V6K 200K_0402_5%
SD_D0 SP5
3
1
@
2 SD_CLK_R
R280
1 2
0_0402_5%
SD_CLK 22 27 DV12_S
20 mils 1 2
2
R287 10_0402_5% SD_CLK DV12_S C384 0.1U_0402_16V7K
C366 SD_CMD_R 1 @ 2 SD_CMD 23 26 5 SP15_SDWP_XDD7_R
5P_0402_50V8C R291 0_0402_5% SD_CMD GND
SD_D3_R 1 @ 2 SD_D3 24 25 SD_D2 1 @ 2 SD_D2_R Q25B
4
R295 0_0402_5% SD_D3 SD_D2 R298 0_0402_5% DMN66D0LDW-7_SOT363-6
Reserve for EMI please close to IC
RTS5209-GR_LQFP48_7X7
3 3
Pin No. Name

1 DAT2 +ODR_PWR JREAD1
2 DAT3 5 VDD
3 CMD SD_CMD_R
SD_CLK_R
3
6
CMD
1 1 CLK
4 VSS C381 C383 4
7
VSS
VSS
5 VDD 10U_0603_6.3V6M
2 2
0.1U_0402_16V7K
SD_D0_R 8 DAT0
6 CLK SD_D1_R
SD_D2_R
9
1
DAT1
DAT2
7 VSS SD_D3_R 2 CD/DAT3
8 DAT0 Close to connector 12

SP15_SDWP_XDD7_R GND SW
10 WP SW GND SW 13
9 DAT1 SD_CD#_R 11 CD SW
10 WP Pin (Normal close) T-SOL_156-2000302604

11 CD Pin (Normal close) CONN@
4 4
Dr-Bios.com
SCHEMATIC MB A8203
Custom C
4019J1
A B C D E
A B C D E
WLAN&BT Combo module circuits

For Wireless LAN
+3VS_WLAN +1.5VS
+3VS 60mil +3VS_WLAN
BT BT
on module on module @ J9
Place near Q47.3 1 2 1 1 1 1 1 1
Enable Disable C454 C3 C464 C458 C438 C446
JUMP_43X118 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
+3VALW 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K
2 2 2 2 2 2
BT_CTRL H L
1 0.1U_0402_16V4Z
BT_ON# C91
L H @ 4.7U_0603_6.3V6K
1
2 Mini Card Power Rating 1
R454 1 @ 2 BT_CTRL 1 @ 2 PCH_PCIE_WAKE#_R

36 WLAN_PME# +1.5VS +3VS_WLAN
R584 0_0402_5%
3
0_0402_5% 1 @ 2
32,36 EC_PME#
R489 0_0402_5% JMINI1
1 @ 2 1 2
+3VALW +3VS_WLAN 15 PCH_PCIE_WAKE# 1 2
5 Q55B R436 0_0402_5% 3 4
36 BT_ON# 3 4
DMN66D0LDW-7_SOT363-6 Q47 D35 5 6
AO3419L_SOT23-3 +3VS_WLAN 5 6
14 MINI1_CLKREQ# 2 1 7 8
4
7 8
9 9 10 10
3 1 RB751V-40_SOD323-2 11 12
D
14 CLK_PCIE_MINI1# 11 12
40mil(1A) 1 2 PCH_PCIE_WAKE#_R 13 14
14 CLK_PCIE_MINI1 13 14
R328 10K_0402_5% 15 16
G
15 16
17 18
2
17 18
2
19 20 WL_OFF#
19 20 WL_OFF# 36
+3VALW 1 23VSWLAN_GATE_R 1 2 3VSWLAN_GATE R590 21 21 22 22 PLT_RST_BUF#
PLT_RST_BUF# 17,32
R373 100K_0402_5% R472 1K_0402_5% 470_0603_5% 14 PCIE_PRX_DTX_N2 23 24
23 24
14 PCIE_PRX_DTX_P2 25 25 26 26
1 2 DISASSOCIATE# 27 28
1
27 28
1
C539 R455 10K_0402_5% 29 30 MINI1_SMBCLK R386 1 @ 2 0_0402_5% PCH_SMBCLK 14
29 30
3
0.1U_0402_16V7K +3VS_WLAN_R 31 32 MINI1_SMBDATA R380 1 @ 2 0_0402_5% PCH_SMBDATA 14

14 PCIE_PTX_C_DRX_N2 31 32
R185 14 PCIE_PTX_C_DRX_P2 33 34
2
33 34
1K_0402_5%
Q54B
35 35 36 36 USB20_N8 17 Need Check
36 WLAN_ON 1 2 5 37 37 38 38 USB20_P8 17
DMN66D0LDW-7_SOT363-6 39 40
39 40
1
6
C499 +3VS_WLAN 41 42
4
0.1U_0402_16V7K 41 42
43 43 44 44
45 46 DISASSOCIATE# 1 2 AD_PID0 36
2
3VSWLAN_GATE 45 46 R456 0_0402_5%

2 47 47 48 48
R4 1 2 0_0402_5% E51TXD_P80DATA_R 49 50
36 E51TXD_P80DATA 49 50
2 Q54A R1 1 2 0_0402_5% E51RXD_P80CLK_R 51 52 2
36 E51RXD_P80CLK
1
DMN66D0LDW-7_SOT363-6 51 52
53 GNDGND 54
1
R2 ACES_51700-0520W-001
R5 1K_0402_5%
+3VS 100K_0402_5%
CONN@
2
R338 1 @ 2 4.7K_0402_5% APE0 BT_CTRL
R335 1 @ 2 4.7K_0402_5% BPE0
R332 1 @ 2 4.7K_0402_5% APE1 MSATA pin define

R337 1 @ 2 4.7K_0402_5% BPE1 +3VS_FULL
For mSATA +1.5VS Need Check
1 Reserved 2 +3.3V
3 Reserved 4 GND
R334 1 @ 2 4.7K_0402_5% TEST 5 Reserved 6 +1.5V
1 1 1 1 1 1 7 Reserved 8 Reserved
C419 C429 C430 C432 C428 C431 9 GND 10 Reserved
R586 1 @ 2 4.7K_0402_5% APE0 0.1U_0402_16V4Z 0.1U_0402_16V4Z @ @ @ 11 Reserved 12 Reserved
4.7U_0603_6.3V6K 4.7U_0603_6.3V6K 0.1U_0402_16V4Z 0.1U_0402_16V4Z 13 Reserved 14 Reserved
R339 1 @ BPE0 2 2 2 2 2 2 15 GND 16 Reserved
2 4.7K_0402_5%
+3VS 17 Reserved 18 GND
R588 1 @ 2 4.7K_0402_5% APE1 +3VS 19 Reserved 20 Reserved
21 GND 22 Reserved
R587 1 @ 2 4.7K_0402_5% BPE1 Co-lay Pin20 +1.5VS +3VS_FULL 23 SATA_RX_P 24 +3.3V
1
2
25 SATA_RX_N 26 GND
0.01U_0402_16V7K
@
0.1U_0402_16V7K
@
1 1
R351 1 @ 2 4.7K_0402_5% TEST R589 R585 Parade PD JMINI2 27 GND 28 +1.5V
4.7K_0402_5% 0_0402_5% Pericom/TI PH VDD 60mil 1 1 2 2 29 GND 30 SMB CLK
+3VS +3VS_FULL 31 SATA_TX_N 32 SMB DATA
C410
C404
@ @ 3 4
2 2 Pin 10 3 4
U30 J6 5 6 33 SATA_TX_P 34 GND
2
1
5 6
3 7 EN VDD 6 Parade NC 1 2 7 7 8 8 35 GND 36 Reserved 3
VDD 16 9 9 10 10 37 GND 38 Reserved
13 SATA_PTX_DRX_P1 SATA_PTX_DRX_P1 @ C401 2 1 SATA_PTX_C_DRX_P1 0.01U_0402_16V7K 1 Pericom/TI VDD JUMP_43X118 11 12 39 +3.3V 40 GND
A_INp 11 12
13 SATA_PTX_DRX_N1 SATA_PTX_DRX_N1 @ C400 2 1 SATA_PTX_C_DRX_N1 0.01U_0402_16V7K 2 A_INn NC 10 @ 13 13 14 14 41 +3.3V 42 Reserved
REXT 20 REXT 1 @ 2 15 15 16 16 43 Device Type 44 Reserved
13 SATA_PRX_DTX_P1
SATA_PRX_DTX_P1 @ C398 2 1 SATA_PRX_C_DTX_P1 0.01U_0402_16V7K 5 B_OUTp
R329 4.99K_0402_1% 17 17 18 18 45 Vender define 46 Reserved
13 SATA_PRX_DTX_N1
SATA_PRX_DTX_N1 @ C399 2 1 SATA_PRX_C_DTX_N1 0.01U_0402_16V7K 4 B_OUTn A_PRE0 9 APE0 19 19 20 20 47 Vender define 48 +1.5V
B_PRE0 8 BPE0 21 21 22 22 49 DAS 50 GND
BPE1 17 B_PRE1
MSATA_PRX_DTX_P1 C628 1 2 0.01U_0402_16V7K MSATA_PRX_C_DTX_P1 23 23 24 24 51 Detect 52 +3.3V
APE1 19 15 MSATA_PTX_DRX_P1 MSATA_PRX_DTX_N1 C629 1 2 0.01U_0402_16V7K MSATA_PRX_C_DTX_N1 25 26
A_PRE1 A_OUTp MSATA_PTX_DRX_N1 25 26
A_OUTn 14 27 27 28 28
TEST 18 29 30
C401 0_0402_5% TEST MSATA_PRX_DTX_P1 MSATA_PTX_DRX_N1 C417 1 29 30
3 GND B_INp 11 2 0.01U_0402_16V7K MSATA_PTX_C_DRX_N1 31 31 32 32
C400 0_0402_5% 13 12 MSATA_PRX_DTX_N1 MSATA_PTX_DRX_P1 C418 1 2 0.01U_0402_16V7K MSATA_PTX_C_DRX_P1 33 34
C398 0_0402_5% GND B_INn 33 34
21 EPAD 35 35 36 36 USB20_N12 17
C399 0_0402_5% 37 38
37 38 USB20_P12 17
PS8520BTQFN20GTR2_TQFN20_4X4 39 40
@ 39 40
+3VS_FULL 41 41 42 42
SA00004WF00 43 44
43 44
45 45 46 46
SATA_PTX_C_DRX_P1 R562 1 2 0_0402_5% SATA_PTX_R_DRX_P1 R567 1 2 0_0402_5% MSATA_PTX_DRX_P1 47 48
SATA_PTX_C_DRX_N1 R563 1 47 48
2 0_0402_5% SATA_PTX_R_DRX_N1 R568 1 2 0_0402_5% MSATA_PTX_DRX_N1 49 49 50 50
MSATA_DET# 51 52
18 MSATA_DET# 51 52
SATA_PRX_C_DTX_P1 R565 1 2 0_0402_5% SATA_PRX_R_DTX_P1 R570 1 2 0_0402_5% MSATA_PRX_DTX_P1
SATA_PRX_C_DTX_N1 R564 1 2 0_0402_5% SATA_PRX_R_DTX_N1 R569 1 2 0_0402_5% MSATA_PRX_DTX_N1 53 54
GNDGND
ACES_51700-0520W-001
MSATA SATA3.0 Repeater CONN@
4 4
A Dr-Bios.com B
Compal Secret Data
Deciphered Date
C D
2012/07/12

Custom
Title
Date:
4019J1
SCHEMATIC MB A8203

E
Sheet 34 of 56
Rev
C
A B C D E
R63 1 @ 2 0_0402_5% For ESD request +5VALW +USB3_VCCA

SM070000S80 WCM2012F2SF-670T04 67ohm L10 D8
17 PCH_USB3_TX1_P 2 1 PCH_USB3_TX1_P_C 2 2 1 1 U3TXDP1 U3RXDN1 1 1 109 U3RXDN1 C26 U42 W=60mils
C24 0.1U_0402_16V7K 0.01U_0402_16V7K 1 8
U3RXDP1 U3RXDP1 GND VOUT
2 2 98 1 2 2 VIN VOUT 7
17 PCH_USB3_TX1_N 2 1 PCH_USB3_TX1_N_C 3 4 U3TXDN1 3 6
C23 0.1U_0402_16V7K 3 4 U3TXDN1 U3TXDN1 VIN VOUT USB_OC0#
4 4 77 36 USB_CHARGE_2A# 4 EN FLG 5 1 @ 2
WCM2012F2SF-670T04_0805 R65 0_0402_5%
U3TXDP1 5 5 66 U3TXDP1 G547I2P81U_MSOP8
R62 1 @ 2 0_0402_5%
3 3
R61 1 @ 2 0_0402_5% 1
8 C16
SM070000S80 WCM2012F2SF-670T04 67ohm L9 @
PCH_USB3_RX1_P 2 1 U3RXDP1 L05ESDL5V0NA-4 SLP2510P8 @ 0.1U_0402_16V4Z
17 PCH_USB3_RX1_P 2 1 2
For USB2.0 ESD request +USB3_VCCA
1 PCH_USB3_RX1_N 3 4 U3RXDN1 1
17 PCH_USB3_RX1_N 3 4 D27
WCM2012F2SF-670T04_0805 1 6 W=100mils SF000002Y00
USB Host Charger R60 1 @ 2 0_0402_5% 2
I/O1
REF1 REF2
I/O4
5 +USB3_VCCA 1 2 220U 6.3V OSCON
470P_0402_50V7K
C14
U2DP0_L U2DN0_L C456 + ESR 17mohm@100Khz
CB SELCDP 3 I/O2 I/O3 4
AZC099-04S_SOT23 220U_6.3V_M 1
0 X DCP(Dedicated Charging Port)
autodetect with mouse/keyboard wakeup +3VALW U2DN0 1 @ 2 U2DN0_L
2
USB3.0 Conn.
1 0 S0 charging with SDP(Standard Downstream Port) only R39 0_0402_5%
L5 JUSB1
1
1 1 S0 charging with CDP(Charging Downstream Port) or 2 2 1 1 1 VBUS
R40 U2DN0_L 2
SDP only U2DP0_L D-
10K_0402_5% 3 D+
3 3 4 4 4 GND
U41 U3RXDN1 5
2
R91 USB_CEN U3RXDP1 StdA-SSRX-
36 USB_CHARGE_CB0 1 2 10K_0402_5% 8 CB CEN 1 USB_CEN 36
WCM2012F2SF-670T04_0805 6 StdA-SSRX+ GND 10
7 2 U2DN0 U2DP0 1 @ 2 U2DP0_L 7 11
17 USB20_N0 TDM DM GND-DRAIN GND
6 3 U2DP0 R38 0_0402_5% U3TXDN1 8 12
17 USB20_P0 TDP DP StdA-SSTX- GND
+5VALW 1 @ 2 5 4 1 2 SELCDP 36 U3TXDP1 9 13
R86 0_0402_5% VDD SELCDP R64 10K_0402_5% StdA-SSTX+ GND
1 Thermal Pad 9 SM070000S80 WCM2012F2SF-670T04 67ohm LOTES_AUSB0015-P001A
C25 SLG55584AVTR_TDFN8_2X2 1 @ 2 +5VALW CONN@
0.1U_0402_16V4Z R37 10K_0402_5%
2
DC23300AI00
2 2
+5VALW +USB3_VCCB
For ESD request

SM070000S80 WCM2012F2SF-670T04 67ohm R59 1 @ 2 0_0402_5%
D7
C18 U20 W=60mils
0.01U_0402_16V7K 1 8
L8 U3RXDN2 U3RXDN2 GND VOUT
1 1 109 1 2 2 VIN VOUT 7
17 PCH_USB3_TX2_P 2 1 PCH_USB3_TX2_P_C 2 1 U3TXDP2 3 6
C22 0.1U_0402_16V7K 2 1 U3RXDP2 U3RXDP2 VIN VOUT
2 2 98
36 USB_PWR_EN# 4 EN FLG 5 1 @ 2 USB_OC0# 17
R31 0_0402_5%
17 PCH_USB3_TX2_N 2 1 PCH_USB3_TX2_N_C 3 4 U3TXDN2 U3TXDN2 4 4 77 U3TXDN2 G547I2P81U_MSOP8 1
C21 0.1U_0402_16V7K 3 4 C15 @
1 2 USB_OC1# 17
WCM2012F2SF-670T04_0805 U3TXDP2 5 5 66 U3TXDP2 @ R160 0_0402_5%
0.1U_0402_16V4Z
R58 @ 2
1 2 0_0402_5% 3 3
8
R57 @ 2 0_0402_5% @ W=100mils +USB3_VCCB
SM070000S80 WCM2012F2SF-670T04 67ohm 1
L05ESDL5V0NA-4 SLP2510P8
L7
PCH_USB3_RX2_P 2 1 U3RXDP2 1 2 SF000002Y00
17 PCH_USB3_RX2_P 2 1
For USB2.0 ESD request
470P_0402_50V7K
C441
C447 + 220U 6.3V OSCON
PCH_USB3_RX2_N 3 4 U3RXDN2 D5
17 PCH_USB3_RX2_N 3 4 220U_6.3V_M 1 ESR 17mohm@100Khz
1 I/O1 I/O4 6
WCM2012F2SF-670T04_0805 2
R56 1 @ 2 0_0402_5%
2 REF1 REF2 5 +USB3_VCCB USB3.0 Conn.
U2DN1 3 4 U2DP1 JUSB2
I/O2 I/O3
1 VBUS
1 @ 2 U2DN1 AZC099-04S_SOT23 U2DN1 2
3 17 USB20_N1 D- 3
R55 0_0402_5% U2DP1 3
L6 D+
4 GND
2 1 U3RXDN2 5
2 1 U3RXDP2 StdA-SSRX-
6 StdA-SSRX+ GND 10
SM070000S80 WCM2012F2SF-670T04 67ohm U3TXDN2
7 GND-DRAIN GND 11
3 3 4 4 8 StdA-SSTX- GND 12
U3TXDP2 9 13
WCM2012F2SF-670T04_0805 StdA-SSTX+ GND
1 @ 2 U2DP1 LOTES_AUSB0015-P001A
17 USB20_P1 +USB3_VCCB +USB3_VCCC
R54 0_0402_5% CONN@
DC23300AI00 @ J14
1 2
+USB3_VCCC JUMP_43X118
W=100mils
+5VALW +USB3_VCCC
1 2
470P_0402_50V7K
C5
C522 + SF000002Y00
C19 U32 W=60mils 220U 6.3V OSCON
0.01U_0402_16V7K 220U_6.3V_M 1
1 GND VOUT 8 ESR 17mohm@100Khz
2
1 2 2 VIN VOUT 7
3 6 R619 0_0402_5%
4
VIN VOUT
EN FLG 5 1 @ 2 USB_OC4# 17 USB2.0 Conn.
USB_PWR_EN# G547I2P81U_MSOP8 1 JUSB3
C20 1
@ U2DN9_L VBUS
2 D-
0.1U_0402_16V4Z U2DP9_L 3
2 D+
4 GND
5 StdA-SSRX-
6 StdA-SSRX+ GND 10
7 GND-DRAIN GND 11
8 StdA-SSTX- GND 12
9 StdA-SSTX+ GND 13
LOTES_AUSB0015-P001A
4 CONN@ 4
DC23300AI00
Dr-Bios.com
17 USB20_N9 1 @ 2 U2DN9_L For USB2.0 ESD request
R78 0_0402_5%
L11 D4
2 2 1 1 1 I/O1 I/O4 6
SM070000S80 WCM2012F2SF-670T04 67ohm 2 REF1 REF2 5 +USB3_VCCC

3 3 4 4
U2DN9_L 3 4 U2DP9_L
WCM2012F2SF-670T04_0805 I/O2 I/O3 Security Classification Compal Secret Data
1 @ 2 U2DP9_L AZC099-04S_SOT23 2011/06/24 2012/07/12 Title
17 USB20_P9
R77 0_0402_5%
Issued Date Deciphered Date
SCHEMATIC MB A8203
Custom C
4019J1
A B C D E
A B C D E
+3VALW L42 SM010015410 300ma 80ohm@100mhz DCR 0.3 +3VALW

FBMA-L11-160808-800LMT_0603 +3VS
1 @ 2 +3VALW_EC 1 2 +EC_VCCA LID_SW# R540 1 2 100K_0402_5%
C322 R450 1 1 1 1 2 2 1
0.1U_0402_16V4Z
C623
0.1U_0402_16V4Z
C359
0.1U_0402_16V4Z
C344
0.1U_0402_16V4Z
C346
1000P_0402_50V7K
C611
1000P_0402_50V7K
C621
22P_0402_50V8J 0_0603_5% +3VS
2
2 1 2 @ 1 CLK_PCI_LPC +EC_VCC C622
@ R262 33_0402_5% +3VLP 0.1U_0402_16V4Z TP_CLK R553 1 2 4.7K_0402_5%
2 2 2 2 1 1 2
ECAGND
14 SMB_ALERT# 6 1 SMB_ALERT#_R 37
1 @ 2 TP_DATA R552 1 2 4.7K_0402_5%
R593 0_0603_5% Q50A @
DMN66D0LDW-7_SOT363-6 EC_MUTE# R560 1 @ 2 10K_0402_5%
111
125
R277 2 1 47K_0402_5% EC_RST#
22
33
96
67
+3VALW_EC U27
9
GPU_ALERT R537 1 2 10K_0402_5%
C362 2 1 0.1U_0402_16V4Z 2012/04/03 remove Q50
EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/AVCC
GPU_OVERT R571 1 2 10K_0402_5%
1 for connection wrong 1
GATEA20 1 21 BT_ON#
18 GATEA20 GATEA20/GPIO00 GPIO0F BT_ON# 34
EC_KBRST# 2 23 BEEP#
18 EC_KBRST# KBRST#/GPIO01 BEEP#/GPIO10 BEEP# 38
SERIRQ 3 26 FAN_PWM
13,37 SERIRQ SERIRQ GPIO12 FAN_PWM 39
LPC_FRAME# 4 27 ACOFF R538
13,37 LPC_FRAME# LPC_FRAME# ACOFF/GPIO13 ACOFF 42
LPC_AD3 5 0_0402_5%
+3VALW_EC 13,37 LPC_AD3 LPC_AD3
LPC_AD2 7 PWM Output C620 2 1 100P_0402_50V8J ECAGND 2 1 H_PROCHOT# 5,43
13,37 LPC_AD2 LPC_AD2 49 VR_HOT#
LPC_AD1 8 63 BATT_TEMP 2012/04/03 remove Q50
13,37 LPC_AD1 LPC_AD1 BATT_TEMP/GPIO38 BATT_TEMP 43
R556 1 2 2.2K_0402_5% EC_SMB_DA1 LPC_AD0 10 LPC & MISC 64
13,37 LPC_AD0 LPC_AD0 GPIO39 BI_DET 37 for connection wrong
4
65 ADP_I
ADP_I/GPIO3A ADP_I 43,44
R557 1 2 2.2K_0402_5% EC_SMB_CK1 CLK_PCI_LPC 12 AD Input 66 AD_BID0 H_PROCHOT#_EC 5 Q50B
17 CLK_PCI_LPC CLK_PCI_EC GPIO3B 43 H_PROCHOT#_EC
PLT_RST# 13 75 AD_PID0 DMN66D0LDW-7_SOT363-6
5,17,32,33,37 PLT_RST# PCIRST#/GPIO05 GPIO42
EC_RST# 37 76 ACPRESENT ACPRESENT @
+3VALW EC_RST# IMON/GPIO43 ACPRESENT 15
EC_SCI# 20
18 EC_SCI# EC_SCII#/GPIO0E
WLAN_ON 38 Latest design guide suggest change to
34 WLAN_ON
3
GPIO1D SUSACK#
DAC_BRIG/GPIO3C 68 SUSACK# 15
R259 1 @ 2 100K_0402_5% EC_PME# 70 WLAN_PME#
WLAN_PME# 34
74LVC1G06.
EN_DFAN1/GPIO3D
PU at LAN side DA Output IREF/GPIO3E 71 SELCDP
SELCDP 35
+3VS KSI0 55 72 LAN_PWR_EN#
KSI0/GPIO30 CHGVADJ/GPIO3F LAN_PWR_EN# 32 +3VLP
KSI1 56
R555 EC_SMB_CK2 KSI2 KSI1/GPIO31
1 2 2.2K_0402_5% 57 KSI2/GPIO32
KSI3 58 83 EC_MUTE# 2 9012@ 1
R554 KSI3/GPIO33 EC_MUTE#/GPIO4A EC_MUTE# 38
1 2 2.2K_0402_5% EC_SMB_DA2 KSI4 59 KSI4/GPIO34 USB_EN#/GPIO4B 84 USB_CHARGE_CB0
USB_CHARGE_CB0 35
R300 200K_0402_5%
KSI5 SLP_SUS# +3VALW
60 KSI5/GPIO35 CAP_INT#/GPIO4C 85 SLP_SUS# 15 PWR_SAVE_LED#
KSI6 61 PS2 Interface 86 EAPD
KSI6/GPIO36 EAPD/GPIO4D EAPD 38
R260 1 2 10K_0402_5% EC_SCI# KSI7 62 87 TP_CLK 2 930@ 1
KSI7/GPIO37 TP_CLK/GPIO4E TP_CLK 37
KSO0 39 88 TP_DATA R301 200K_0402_5%
KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA 37
KSO1 40 D18
C345 KSO1/GPIO21
1 2 0.01U_0402_16V7K PLT_RST# KSO2 41 KSO2/GPIO22
ENBKL 2 1 ACIN 15,40,41,44,45
KSI[0..7] KSO3 42 97 USB_CEN
37 KSI[0..7] KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00
1
2 KSO4 43 98 GPU_OVERT USB_CEN 35 RB751V-40_SOD323-2 2
KSO4/GPIO24 WOL_EN/GPXIOA01 GPU_OVERT 22
ESD request 37 KSO[0..17]
KSO[0..17] KSO5 44 KSO5/GPIO25 Int. K/B HDA_SDO/GPXIOA02 99 HDA_SDO
HDA_SDO 13
R618 EC_ACIN C377 2 1 100P_0402_50V8J
KSO6 45 109 VCIN0_PH_R 100K_0402_5%
KSO7 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00
46 KSO7/GPIO27 SPI Device Interface
KSO8 47
2
X1 KSO9 KSO8/GPIO28 EC_SI_SPI_SO
48 KSO9/GPIO29 SPIDI/GPIO5B 119
32.768K 12.5PF 1TJF125DP1A000D KSO10 49 120 EC_SO_SPI_SI KB930&9012 Co-Layout Item
EC_XCLK1 2 KSO10/GPIO2A SPIDO/GPIO5C
1 EC_XCLK0 KSO11 50 KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58 126 EC_SPICLK
@ KSO12 51 128 EC_SPICS#/FSEL#
KSO13 KSO12/GPIO2C SPICS#/GPIO5A +EC_VCC
1 1 52 KSO13/GPIO2D 1 930@ 2 +3VALW
KSO14 53 R542 0_0402_5%
C372 C367 KSO15 KSO14/GPIO2E ENBKL
54 KSO15/GPIO2F ENBKL/GPIO40 73 ENBKL 16 1 9012@ 2 +3VLP
@ 15P_0402_50V8J 15P_0402_50V8J @ KSO16 81 74 USB_PWR_EN# USB_PWR_EN# R545 0_0402_5%
2 2 KSO16/GPIO48 PECI_KB930/GPIO41 USB_PWR_EN# 35
KSO17 82 89 FSTCHG Pin 111 is a power source for HW operation of KB9012.
KSO17/GPIO49 FSTCHG/GPIO50 FSTCHG 44
90 BATT_AMB_LED#
BATT_CHG_LED#/GPIO52 EC_RST_GATE
BATT_AMB_LED# 37 So, power plan will be different between KB930 and KB9012.
CAPS_LED#/GPIO53 91 EC_RST_GATE 6 CAPS_LED#
EC_SMB_CK1 77 GPIO 92 PWR_LED# PWR_LED# 37 USB_PWR_EN# 1 930@ 2
43,44 EC_SMB_CK1 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 H_PECI 5,18
EC_SMB_DA1 78 93 BATT_BLUE_LED# ON/OFF R561 43_0402_1%
43,44 EC_SMB_DA1 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 BATT_BLUE_LED# 37
EC_SMB_CK2 79 SM Bus 95 SYSON
12,14,22,27 EC_SMB_CK2 EC_SMB_CK2/GPIO46 SYSON/GPIO56 SYSON 40,46
12,14,22,27 EC_SMB_DA2
EC_SMB_DA2 80 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 121 VR_ON
VR_ON 49 0201 1 9012_PECI 1 9012@ 2
127 PM_SLP_S4# C420 R536 43_0402_1%
PM_SLP_S4#/GPIO59 PM_SLP_S4# 15 For ESD 0.1U_0402_16V4Z
Place close 2
Pin74(KB930),Pin118(KB9012) are with different PECI pin location,
PM_SLP_S3# 6 100 PCH_RSMRST#
15 PM_SLP_S3#
PM_SLP_S5# 14
PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03
101 EC_LID_OUT#
PCH_RSMRST# 15 pin114 so HW must co-layout for it.
15 PM_SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 EC_LID_OUT# 18 Please make sure which EC pin will be connected to PECI circuit.
EC_SMI# 15 102 IRST_RST#
18 EC_SMI# EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 IRST_RST# 17
PCH_PWR_EN 16 103 H_PROCHOT#_EC
40 PCH_PWR_EN GPIO0A H_PROCHOT#_EC/GPXIOA06
GPU_ACIN 17 104 GPXIOA07 11/15 Power modify 9012_PCH_PWROK 2 9012@ 1
22 GPU_ACIN GPIO0B VCOUT0_PH/GPXIOA07 GPXIOA07 37
USB_CHARGE_2A# 18 GPO BKOFF#/GPXIOA08 105 BKOFF# R258 0_0402_5%
35 USB_CHARGE_2A# GPIO0C BKOFF# 53
Need check EC_DPWROK 19 GPIO 106 PBTN_OUT# GPXIOA07 2 930@ 1
GPIO0D PBTN_OUT#/GPXIOA09 PBTN_OUT# 15 PCH_PWROK 15
EC_SPOK 25 107 SUSWARN# WLAN_LED#+3VALW_EC R304 0_0402_5%
43 EC_SPOK EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 SUSWARN# 15
FAN_SPEED1 28 108 SA_PGOOD SA_PGOOD 48 2 @ 1
3 39 FAN_SPEED1 FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11 MAINPWON 37,43,45 3
EC_PME# 29 R307 0_0402_5%
32,34 EC_PME# EC_PME#/GPIO15
E51TXD_P80DATA 30
34 E51TXD_P80DATA EC_TX/GPIO16
E51RXD_P80CLK 31 110 EC_ACIN Pin104 This co-layouted circuit is for power fail function of
34 E51RXD_P80CLK EC_RX/GPIO17 AC_IN/GPXIOD01
9012_PCH_PWROK 32 112 EC_ON
PCH_PWROK/GPIO18 EC_ON/GPXIOD02 EC_ON 37,45 KB930 and KB9012.At KB930, PCH_PWROK will be connected to pin 104.
1
PWR_SUSP_LED# 34 114 ON/OFF
37 PWR_SUSP_LED# SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 ON/OFF 37 At KB9012,PCH_PWROK will be connected to pin 32,
WL_OFF# 36 GPI 115 LID_SW# R592 R591
34 WL_OFF# NUM_LED#/GPIO1A LID_SW#/GPXIOD04 LID_SW# 37
NUM_LED# SUSP#/GPXIOD05 116 SUSP#
SUSP# 40,44,46,47
10K_0402_5% 10K_0402_5% and VCOUT0_PH will be connected to pin 104.
117 GPU_ALERT
+3VALW_EC GPXIOD06 9012_PECI GPU_ALERT 22
118
2
PECI_KB9012/GPXIOD07
AGND/AGND
EC_XCLK1 122 VCIN0_PH_R R547 1 @ 2 0_0402_5%

Board ID EC_XCLK0 XCLKI/GPIO5D VCIN0_PH 43
GND/GND
GND/GND
GND/GND
GND/GND
1 2 123 124 +V18R

15 SUSCLK XCLKO/GPIO5E V18R
2
Analog Board ID definition, R284 0_0402_5% 1

GND0
R549 2 1 IRST_RST# R551 1 @ 2 0_0402_5%

Please see page 3. VCIN1_PROCHOT 43
Ra 100K_0402_5% R285 100K_0402_5% C612
1
4.7U_0603_6.3V6K
9012@ KB9012QF-A3_LQFP128_14X14 2 R653 +3VALW_EC
1 2
1
11
24
35
94
113
69
AD_BID0 C368 20P_0402_50V8 20mil 10K_0402_5%

L41 @ KSO1 R283 2 930@ 1 47K_0402_5%
1
1 Follow KB930 checking List ECAGND 2 1
2
R559 C619 FBMA-L11-160808-800LMT_0603 KSO2 R290 2 930@ 1 47K_0402_5%
Rb 56K_0402_5% 0.1U_0402_16V4Z
2
KB930&9012 Co-Layout Item KB930 use 128KB ROM
2
+3VALW +3VALW SM010015410 300ma 80ohm@100mhz DCR 0.3 +3VALW_EC

KB9012 Embedded 128KB ROM 930@
1 2 0.1U_0402_16V4Z
1
1 U23 C323
+3VALW_EC R572 C498 EC_SPICS#/FSEL# 1 8
100K_0402_5% 0.1U_0402_16V4Z EC_SI_SPI_SO CS# VCC SPI_HOLD# R255 1 930@
2 7 2 4.7K_0402_5%
Project ID +3VALW_EC R274 1 930@ 2 4.7K_0402_5% SPI_WP# 3
SO
WP#
HOLD#
SCLK 6 EC_SPICLK
+3VALW_EC
2
2 EC_SO_SPI_SI
Analog Board ID definition, 4 5
2
GND SI
5
4 R548 U19 4
Ra 100K_0402_5% Please see page 3. 2 B W25X10BVSNIG_SO8
P
43,45 SPOK
@ 4 SA00003FL10
PCH_DPWROK 15
Dr-Bios.com
EC_DPWROK Y 930@
1
1
A
G
AD_PID0 EC_SPICLK 2 @ 1 @
AD_PID0 34
MC74VHC1G08DFT2G_SC70-5 R263 0_0402_5% C347 33P_0402_50V8K
3
1
1
R558 C618
Rb 0_0402_5% 0.1U_0402_16V4Z Security Classification Compal Secret Data Compal Electronics, Inc.
@ @ 2011/06/24 2012/07/12 Title
2 Issued Date Deciphered Date
SCHEMATIC MB A8203
2
Custom C
4019J1
A B C D E
A B C D E
JKB1 R256
KSO0
KSO1
KSO2
1
2
1
2
KB KSI[0..7]
Conn. BI_RESET 510K_0402_5%
1 2 BI_DET 36
3 3 KSI[0..7] 36 1
KSO3 4 4 KSO[0..17]
0201 C421 BI
BI 43
KSO4 5 0.1U_0402_16V4Z
KSO5 6
5 KSO[0..17] 36 For ESD
6
3
2 S
KSO6
KSO7
7
8
7
8
KSO16 C641 1 2 100P_0402_50V8J +RTCVCC 2
G
Q21
AO3419L_SOT23-3 Debug SW
KSO8 9 9
R524 Need Check Gate Threshold Voltage
KSO9 10 KSO17 C640 1 2 100P_0402_50V8J 1K_0402_5% D Battery BI Low voltage is 0.8V
1
KSO10 10
11 11 1 2 SW3
KSO11 KSO15 C642 1 100P_0402_50V8J BI_RESET 1 2 BI_R
10
1 12 12 2 1
9
KSO12 13 R525 SW2 R257 @ 0_0402_5% MSS6-Q-T-R_6P
KSO13 13 KSO14 C643 1 100P_0402_50V8J 1K_0402_5%
14 2
G
KSO14 14 EC_ON_R @ BI_GATE
15 15 1 2 1 2
KSO15 16 KSO13 C644 1 2 100P_0402_50V8J 3 6
16 3 6
KSO16 17 17
R252
Power Off
1
KSO17 18 KSO12 C645 1 2 100P_0402_50V8J SKPMAME010_2P 1 0_0402_5% 2 5
KSI0 18 C341 EC_ON_R @ 2 5
19 19 2 1 MAINPWON 36,43,45
KSI1
KSI2
20
21
20 KSI0 C639 1 2 100P_0402_50V8J
R526
100K_0402_5%
0.1U_0402_16V4Z
BI_R 1 4
Power ON
21 D 1 4
1
KSI3 2 @
22 2 1 EC_ON 36,45
2
22
G
KSI4 23 KSO11 C646 1 2 100P_0402_50V8J 2 R253
KSI5 23 G 0_0402_5%
24 27
7
24 G1
KSI6 25 28 KSO10 C630 1 2 100P_0402_50V8J
Reset Button Q20 S
3
KSI7 25 G2 2N7002K_SOT23-3
26 26 3
KSI1 C638 1 2 100P_0402_50V8J 1 @
HB_A802619-SBHR21 2 H17
CONN@ BI_R 1 2
45 BI_GATE 1 2
D17
KSI2 C637 1 2 100P_0402_50V8J KSO7 C426 1 2 100P_0402_50V8J BAV70W_SOT323-3 CLIP_SHAPE5P0BC4P0
KSO9 C422 1 2 100P_0402_50V8J KSO6 C647 1 2 100P_0402_50V8J

Disable +3VALW/+5VALW Combo Jack
KSI3 C636 1 2 100P_0402_50V8J KSO5 C425 1 2 100P_0402_50V8J
KSO8 C631 1 2 100P_0402_50V8J KSO4 C648 1 2 100P_0402_50V8J +3VALW

+3VS
KSO0 C650 1 2 100P_0402_50V8J KSO3 C424 1 2 100P_0402_50V8J

Lid Switch
1
2 2
(Hall Effect Switch) 2
2
KSI5 C634 1 2 100P_0402_50V8J KSI4 C635 1 2 100P_0402_50V8J R9 U21 C2
1
47K_0402_5%
VDD
KSI6 C633 1 2 100P_0402_50V8J KSO2 C649 1 2 100P_0402_50V8J 0.1U_0402_16V4Z R622
D1 1
10K_0402_5%
2
KSI7 C632 1 2 100P_0402_50V8J KSO1 C423 1 2 100P_0402_50V8J 36 LID_SW# 2 1 3 OUTPUT TP_CLK JTP1
2
RB751V-40_SOD323-2
TP Conn. TP_DATA 8
GND
SMB_ALERT#_R 8
1 36 SMB_ALERT#_R 7 7 G2 10
3
C1 D_CK_SCLK 6 9
11,14 D_CK_SCLK 6 G1
D32 D_CK_SDATA 5
11,14 D_CK_SDATA
1
10P_0402_50V8J AH180WG-7_SC59-3 +3VS 5
4 4
+5VALW 2
36 TP_DATA 3 3
1 36 TP_CLK 2 2
C403 1 1 1
0.1U_0402_16V4Z 1
1
+5VS C626 C627 ACES_51524-0080N-001

JBL1 2 @ 100P_0402_50V8J 100P_0402_50V8J CONN@
1
R318 +5VS_BL AZ5125-02S.R7G_SOT23-3 2 2
3 1 4 6
S
100K_0402_5% 4 G2 +3VALW +3VLP

3 3 G1 5
Q43 2
G
2
AO3419L_SOT23-3 2
1
2
1 +3VALW
Power Board BATT_AMB_LED# BATT_BLUE_LED#
2
+3VALW
ACES_50504-0040N-001
CONN@ ON/OFF BTN R574
100K_0402_5%
R573
100K_0402_5%
8
JLED1
8 1
C552
1
C556
7 7 G2 10
930@ 9012@ 36 BATT_AMB_LED# BATT_AMB_LED# 6 9 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1
GPXIOA07_R BATT_BLUE_LED# 6 G1 C580
Test Only 36 BATT_BLUE_LED# 5
1
1
SW1 D33 PWR_SUSP_LED# 5 2 2 0.1U_0402_16V4Z
36 PWR_SUSP_LED# 4 4
3 SMT1-05-A_4P PWR_LED# 3
2 ON/OFF 36 36 PWR_LED# 3 3
ON/OFFBTN# ON/OFFBTN# PWR_SUSP_LED# PWR_LED# 2
D 1 3 1 2 2
1
3 1 1
36 GPXIOA07 2 Q26 2 4 1 1 1
G 2N7002K_SOT23-3 BAV70W_SOT323-3 0201 C416 ACES_51524-0080N-001 C558 C581
S @ 0.1U_0402_16V4Z CONN@ 0.1U_0402_16V4Z 0.1U_0402_16V4Z
For ESD
3
6
5
2 2 2 0315
For ESD
JTPM1 CONN@
15 CLKRUN# CLKRUN# 1 2 LPC_AD3 LPC_AD3 13,36

5,17,32,33,36 PLT_RST# PLT_RST# 1 2 LPC_AD2 LPC_AD2 13,36
3 3 4 4
5 6 CLK_PCI_TPM
5 6 CLK_PCI_TPM 17
7 8 LPC_FRAME#
7 8 LPC_FRAME# 13,36 +3VS
+3VALW 9 10 LPC_AD1
9 10 LPC_AD1 13,36 R286
+3VS 11 12 LPC_AD0
11 12 LPC_AD0 13,36
13 14 LPCPD# 2 1
13 14 SERIRQ
15 15 16 16 SERIRQ 13,36
10K_0402_5%
12/9 modify pin define
FOX_NQT510166-LOAO-7F
TPM Board
4 4
A
Dr-Bios.com B
Compal Secret Data
Deciphered Date
C
2012/07/12

Custom
D
Title
Date:
4019J1
SCHEMATIC MB A8203

E
Sheet 37 of 56
Rev
C
A B C D E
+5VS +VDDA
60mil 1
J2
2 40mil Int. Speaker Conn.
1
C325 JUMP_43X118 4.75V
@ 40mil
0.1U_0402_16V4Z SPKR+ R316 1 2 0_0603_5% SPK_R+
2 SPKR- R315 1 SPK_R-
2 0_0603_5%
3
2 1 BEEP#_R 1 2 MONO_IN
36 BEEP#
C389 1U_0402_6.3V6K D20
R322 AZ5125-02S.R7G_SOT23-3 JSPK1
(output = 300 mA) 47K_0402_5% SPK_R+ 1
1 1 1
2
2 1 1 SPK_R- 2
13 PCH_SPKR C405 R321 SPK_L+ 2
3 3 G1 5
R323 4.7K_0402_5% SPK_L- 4 6
47K_0402_5% 100P_0402_50V8J 4 G2
2 ACES_88266-04001
1
CONN@
SPKL+ R314 1
40mil SPK_L+
2 0_0603_5%
SPKL- R313 1 2 0_0603_5% SPK_L-
2
D19
SM010014520 3000ma 220ohm@100mhz DCR 0.04 +PVDD_HDA
AZ5125-02S.R7G_SOT23-3
40mil
L30 2 1 0.1U_0402_16V4Z 0.1U_0402_16V4Z
+VDDA
FBMA-L11-201209-221LMA30T_0805 1 1 1
C364 C363
C360
HD Audio Codec
1
10U_0805_10V4Z
2 2 2
SM010028800 2000ma 120ohm@100mhz DCR 0.1

Place near Pin39 Place near Pin46
L31
SM010028800 2000ma 120ohm@100mhz DCR 0.1
20mil +3VS_DVDD 10U_0603_6.3V6M 1 2
+AVDD_HDA +3VS
BLM18PG121SN1D_0603
L29
0.1U_0402_16V4Z 20mil 1
C373
1
C379
1
C370 C427
2 2
C433
Headphone Out
+VDDA 1 2
BLM18PG121SN1D_0603 1 1 1 JHP1
2 0.1U_0402_16V4Z 330P_0402_50V7K 330P_0402_50V7K COM_MIC 2
2 2 2
SM010015410 300ma 80ohm@100mhz DCR 0.3 1 1
4
C361 C393 C365
10U_0805_10V4Z 0.1U_0402_16V4Z FBMA-L11-160808-800LMT_0603 3
2 2 2 L32
Place near Pin1, 9
0.1U_0402_16V4Z HP_LEFT R341 1 2 47_0603_5% HPOUT_L_1 1 2 HPOUT_L_2 1
L33
25
38
39
46
9
Place near Pin25, 38 U28 HP_RIGHT R342 1 2 47_0603_5% HPOUT_R_1 1 2 HPOUT_R_2 2
FBMA-L11-160808-800LMT_0603 5
DVDD
DVDD_IO
AVDD1
AVDD2
PVDD1
PVDD2
14 LINE2_L
Internal MIC
HP_PLUG#
15 LINE2_R 35mA SPKL+
6 7
C396 1 2 MIC2_C_L 16
68mA 600mA SPK_OUT_L+ 40
SINGA_2SJ3052-003111F
COM_MIC MIC2_L
Combo MIC 2 1 COM_MIC_R 4.7U_0603_6.3V6K CONN@
R330 1K_0402_5% C397 1 2 MIC2_C_R 17 41 SPKL-
4.7U_0603_6.3V6K MIC2_R SPK_OUT_L-
23 45 SPKR+
LINE1_L SPK_OUT_R+
24 EAPD 1 281@ 2
LINE1_R SPKR- R578 0_0402_5%
SPK_OUT_R- 44
21 +MIC2_VREFO
MIC1_L HP_LEFT
External MIC HPOUT_L 32
22 COM_MIC
MIC1_R
1
33 HP_RIGHT reseve for EMI
HPOUT_R +3VS MIC2JD R575 HP_PLUG#
1 35 CBN
8 HDA_SDIN0_AUDIO 1 R303 2 HDA_SDIN0 13 2.2K_0402_5%
SDATA_IN
2
C371 33_0402_5% R577
D
1
2.2U_0603_6.3V6K 36 5 HDA_SDOUT_AUDIO 13 R317 22K_0402_5% D34
2
2 CBP SDATA_OUT 4.7K_0402_5% MIC2JD_R COM_MIC
2 1 2 AZ5125-02S.R7G_SOT23-3
Combo MIC 29 10 HDA_SYNC_AUDIO 13 @ Q44 G
+MIC2_VREFO MIC2_VREFO SYNC
10mil BSS138_G_SOT23-3 S 1
2
11 HDA_RST_AUDIO# HDA_RST_AUDIO# C651
RESET# HDA_RST_AUDIO# 13
Internal MIC 30 1 R576
3 MIC1_VREFO_R C387 10U_0603_6.3V6M 3
10mil BCLK 6 HDA_BITCLK_AUDIO 13
@ 2
22K_0402_5%
External MIC 31
1
MIC1_VREFO_L @ 0.1U_0402_16V7K
10mil
1
@ 2
1 2 1 2 C374
R299 0_0402_5% 22P_0402_50V8J
C378 1 2 28
10U_0603_6.3V6M LDD_CAP DMIC_DATA
GPIO0/DMIC_DATA 2 For EMI
SM010017710 200ma 300ohm@100mhz DCR 0.5
3 DMIC_CLK
R326 2 GPIO1/DMIC_CLK
1 20K_0402_1% 19 JDREF
4 L20
PD# EC_MUTE# 36 FBMA-L10-160808-301LMT_2P
DMIC_CLK 1
Digital MIC CONN
Place near 2 DMIC_CLK_R
L21
codec C375 1 2 2.2U_0603_6.3V6K CPVEE 34 CPVEE PCBEEP 12 MONO_IN FBMA-L10-160808-301LMT_2P SM010028800 2000ma 120ohm@100mhz DCR 0.1
10mil DMIC_DATA 1 2 DMIC_DATA_R
HP_PLUG# R324 2 1 39.2K_0402_1% SENSE_A 13 20 +3VS
MIC2JD R325 20K_0402_1% SENSE_B SENSE A MONO_OUT L19
2 1 18 SENSE B AVSS2 37
3
36 EAPD 1 @ 2 47 1 2 +3VS_DMIC
R279 0_0402_5% EAPD CODEC_VREF C385 1
VREF 27 2 0.1U_0402_16V4Z D13 BLM18PG121SN1D_0603
48 10mil AZ5125-02S.R7G_SOT23-3
SPDIFO C388 1 2 2.2U_0603_6.3V6K JDMIC1
7 26 @ +3VS_DMIC 1
DVSS AVSS1 C382 1 DMIC_CLK_R 1
PVSS2 43 2 10U_0603_6.3V6M 20120410 2 2
49 42 @ DMIC_DATA_R 3 5
GND PVSS1 follow ESD cost down 3 G1
Place next pin27 4 4 G2 6
remove
1
J4 J3 DGND ALC271X-VB6-CG_QFN48_6X6 ACES_88266-04001
JUMP_43X39 JUMP_43X39 CONN@
1 1 2 2 1 1 2 2
@ @ @ C69 R124
J7 J5 100P_0402_50V8J 1 2 C62 DMIC_CLK_R <EMI> 2 1 2 @ 1 DMIC_CLK
JUMP_43X39 JUMP_43X39 @ 10K_0402_5%
1 1 12/7 Add C1107=@100pF(Avoid noise) 1000P_0402_50V7K <EMI>
4
@ 2 2 1 1
@ 2 2 4
J11 J8
Dr-Bios.com
JUMP_43X39 JUMP_43X39
1 1 2 2 1 1 2 2
@ @
GND GNDA GND GNDA

SCHEMATIC MB A8203
Custom C
4019J1
A B C D E
+5VS
FAN1 Conn WLAN+MSATA Stand off
1
H1 H2 H3
D31 H_3P4 H_3P4 H_3P4
@ 1SS355_SOD323-2
1
+5VS D30
40mil @ BAS16_SOT23-3
2 @ 1 +VCC_FAN1 1 2
R497 0_0603_5% @ @ @
1
C537 C529 H8 H9 H10 H11 H12 H13 H14 H15
10U_0805_10V4Z H_3P0 H_3P0 H_2P8 H_2P8 H_3P0 H_3P0 H_3P0 H_3P0
10U_0805_10V4Z 1 2
2
C530
1
1000P_0402_50V7K
1 2
+3VS
@ @ @ @ @ @ @ @
1
H19 H20 H21 H22 H23

R496
10K_0402_5%
H_4P0 H_4P0 H_4P0 H_4P0 H_4P0 CPU,VGA support plate
JFAN1
2
1
+VCC_FAN1 1
FAN_SPEED1 1
36 FAN_SPEED1 2 2
FAN_PWM 3
36 FAN_PWM 3 @ @ @ @ @
4 4
1
C531
1000P_0402_50V7K 5 GND1
6
locate MB
2
GND2 H25 H26

CONN@ H_3P0N H_3P5X3P0N
E-T_3806K-F04N-03R
1
@
@
FD2 FD4
@ @
1
FIDUCIAL_C40M80 FIDUCIAL_C40M80
FD1 FD3
@ @
1
FIDUCIAL_C40M80 FIDUCIAL_C40M80
Dr-Bios.com
SCHEMATIC MB A8203
Custom C
4019J1
A B C D E
+5VALW TO +5VS +3VALW TO +3VALW(PCH AUX Power)

+5VALW +5VS
U24 Short J5 for PCH VCCSUS3.3
AO4478L_SO8 +5VALW
8 1 +3VALW +3VALW_PCH
7 2
2
4.7U_0603_10V6K
C319
6 3 1 1 C324
4.7U_0603_10V6K
C610
4.7U_0603_10V6K
C609
1U_0603_10V6K
1 1 5 R271 R87
470_0603_5% 100K_0402_5%
40mil
4
2 2 U37
1
2 2 +5VS_R AO4478L_SO8 SUSP
1 46,47 SUSP 1
8 1
6
7 2
6
4.7U_0603_6.3V6K
C95
2 6 3 2
1
1U_0402_6.3V6K
C97
5 R140
+VSB 2 1 5VS_GATE 2 SUSP C115 470_0603_5% Q5A
R264 2 DMN66D0LDW-7_SOT363-6
36,44,46,47 SUSP#
2
100K_0402_1% 1 Q22A 4.7U_0603_6.3V6K 1 1
6 1
3
1
C342 DMN66D0LDW-7_SOT363-6 +3VALW_PCH_R
1
0.1U_0603_25V7K R53
10K_0402_5%
SUSP 2
5
+VSB 2 1 3V_GATE 2 PCH_PWR_EN#
2
Q22B R141
4
3
DMN66D0LDW-7_SOT363-6 20K_0402_1% Q8A
1
1
C89
PCH_PWR_EN# 5 0.1U_0603_25V7K +5VALW
2
Q8B
+3VALW TO +3VS
2
R85
+3VALW +3VS 100K_0402_5%
U34
AO4478L_SO8
1
8 1
7 2
2
4.7U_0603_6.3V6K
C488
4.7U_0603_6.3V6K
C487
4.7U_0603_6.3V6K
C475
2 2 6 3 2 1 SYSON#
1U_0402_6.3V6K
C476
5 R443
470_0603_5%
3
4
1 1 1 2
6 1
+3VS_R Q5B
SYSON 5
2 36,46 SYSON 2
4
+VSB 2 1 3VS_GATE 2 SUSP R95
100K_0402_5%
R448 1 Q35A
1
3
150K_0402_1% C479 DMN66D0LDW-7_SOT363-6
2
0.1U_0603_25V7K
SUSP 2
5
+5VALW
Q35B
4
2
R535
100K_0402_5%
+1.5V to +1.5VS
1
+1.5V +1.5VS
U22 PCH_PWR_EN#
20 PCH_PWR_EN#
AO4478L_SO8
8 1 D
1
4.7U_0603_6.3V6K
C335
7 2 2 1
2
4.7U_0603_6.3V6K
C305
4.7U_0603_6.3V6K
C304
0.1U_0402_16V4Z
C306
0.1U_0402_16V4Z
C307
6 3 36 PCH_PWR_EN 2 Q42
1U_0402_6.3V6K
C336
2 2 1 1 5 R254 G 2N7002K_SOT23-3
1
470_0603_5% S
3
1 2
4
R532
1
1 1 2 2 +1.5VS_R 100K_0402_5%
2
6
Q23A
+VSB 2 1 1.5VS_GATE DMN66D0LDW-7_SOT363-6 2 SUSP
3 3
R276 1
1
1
330K_0402_5% C355
3
510K_0402_5%
R275
0.1U_0603_25V7K
@
2
SUSP 5
2
Q23B
4
D
1
15,36,41,44,45 ACIN ACIN 2 Q24

G 2N7002K_SOT23-3
@ S
3
+0.75VS +1.05VS_VTT +1.8VS +1.5V

1
R218 R451 R151 R168

22_0603_5% 470_0603_5% 470_0603_5% @ 470_0603_5%
2
+0.75VS_R +1.05VS_VTT_R +1.8VS_R +1.5V_R

D D D D
1
2 SUSP 2 SUSP 2 SUSP 2 SYSON#

G G G G
4 S Q15 S Q36 S Q9 @S Q10 4
3
2N7002K_SOT23-3 2N7002K_SOT23-3 2N7002K_SOT23-3 2N7002K_SOT23-3
A
Dr-Bios.com B
Compal Secret Data
Deciphered Date
C D
2012/07/12

Custom
Title
Date:
4019J1
SCHEMATIC MB A8203

E
Sheet 40 of 56
Rev
C
A B C D E
+1.5VSDGPUH to +1.5VSDGPU for GPU +1.05VS_VTT to +1.05VSDGPU for GPU

+1.5V +1.5VSDGPU
U15 +1.05VS_VTT +1.05VSDGPU
AO4430L_SO8 U39
8 1 AO4430L_SO8 4A
7 2 8 1
2
1 1 6 3 7 2 1
2
C154 C155 2 DIS@ 2 DIS@ 2 DIS@ 5 DIS@ DIS@ DIS@ DIS@ R166 C548 6 3 DIS@ DIS@
1
4.7U_0603_6.3V6K
C145
4.7U_0603_6.3V6K
C157
4.7U_0603_6.3V6K
C146
10U_0603_6.3V6M
C231
1U_0402_6.3V6K
C216
1U_0402_6.3V6K 0.01U_0402_16V7K DIS@ R227 1
1 1 47_0603_5% 5
4.7U_0603_6.3V6K
C143
1U_0402_6.3V6K
C147
330U_D2_2V_Y
C509
330U_D2_2V_Y
C144
DIS@ DIS@ DIS@ 2 1 DIS@ 10U_0603_6.3V6M 47_0603_5%
2
2 2 + + DIS@ 2
DIS@
4
1 1 1 +1.5VSDGPU_R
6 1
+1.05VSDGPU_R
6
1 2 2 2
10mil 20mil R498 10mil

2 VGA_ON# 330K_0402_1% 2 VGA_ON#
+VSB 1 2 1.5VSDGPU_GATE Q11A +VSB 2 1 1.05VSDGPU_GATE
20mil DIS@ DIS@ Q18A
1
R173 DIS@ 1 DMN66D0LDW-7_SOT363-6 DIS@ DMN66D0LDW-7_SOT363-6
1
510K_0402_5%
510K_0402_5%
200K_0402_1% C156 @ C535
+1.5VSDGPU
R172
R499
DIS@ DIS@
@ 0.1U_0603_25V7K 0.1U_0603_25V7K
2
VGA_ON# 2 VGA_ON#
5 1 5
2
DIS@ Q11B + C151 DIS@ Q18B
4
DMN66D0LDW-7_SOT363-6 330U_D2_2V_Y DMN66D0LDW-7_SOT363-6
D D
1
@
15,36,40,44,45 ACIN ACIN Q13 2 ACIN Q41
2 2
G 2N7002K_SOT23-3 G 2N7002K_SOT23-3
S @ S @
3
2 2
+3VS to +3VSDGPU for GPU

+3VSDGPU +1.5VSDGPU
D14
1 2
@
RB751V-40_SOD323-2
+VGA_CORE
D15
1 2
Q38 @
+3VS DIS@ RB751V-40_SOD323-2
AO3419L_SOT23-3
3 1
S
100mil(1.5A)
G
2 2
2
C510 C519 2 DIS@

DIS@ DIS@ R180
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K 470_0603_5%
1 1
R Short
1
10mil +3VSDGPU_R VGA_ON

DIS@ DIS@ 14,17 DGPU_PWR_EN 1 @ 2
3 +3VALW 1 2 3VSDELAY_GATE_R 1 2 3VSDELAY_GATE R344 0_0402_5% 3
R188 100K_0402_5% R465
10K_0402_1%
DIS@
3
DIS@ Q14A
R179 DIS@ DMN66D0LDW-7_SOT363-6
1K_0402_5% +5VALW
1
VGA_ON 1 2 5 C517 2 3VSDELAY_GATE

Q14B 0.1U_0402_16V7K
1
2
C164 DIS@ DIS@
4
0.1U_0402_16V7K R346
DIS@ 100K_0402_5%
2
1
VGA_ON#
1
2 Q28
50 VGA_ON
G DIS@
2
S 2N7002K_SOT23-3
3
DIS@
R343
100K_0402_5%
1
Use 100k to make sure the
4 divided voltage is enough!! 4
A
Dr-Bios.com B
Compal Secret Data
Deciphered Date
C
2012/07/12

Custom
D
Title
Date:
4019J1

SCHEMATIC MB A8203
Sheet
E
41 of 56
Rev
C
A B C D
VIN
1 1
PL1 Pre_CHG
PJP1 SMB3025500YA_2P
DC_IN_S1 1 2 DC_IN_S2 PR1
1 1K_1206_5%
2
3 1 2
PQ1
4 PR2 PD1 TP0610K-T1-E3_SOT23-3
GND <BOM Structure>
1
PC3 VIN 1K_1206_5% LL4148_LL34-2
GND PC1 PC2 100P_0402_50V8J PC4 1 2 2 1 3 1
B+
ACES_50305-00441-001 1000P_0402_50V7K 100P_0402_50V8J 1000P_0402_50V7K
2
CONN@ PR3
1K_1206_5%
1 2
100K_0402_5%
100K_0402_5%
1
1
PR4
PR5
PR6
1K_1206_5%
2
1 2
1
PR7
1
100K_0402_5%
PD2 PQ2
BAS40CW_SOT323-3 PDTC115EU_SOT323-3
1 2
2 2
36 ACOFF 2
1 2
3 PQ3
+5VALWP PDTC115EU_SOT323-3
PD4 2
3
LL4148_LL34-2
2 1
BATT+ VS
3
PJ1 @ PJ2 @
+3VALWP 1 1 2 2 +3VALW +5VALWP 1 1 2 2 +5VALW

3 3
PJ3 @ PJ4 @
+VSBP 1 1 2 2 +VSB +1.5VP 1 1 2 2 +1.5V
PR12 +3VLP PJ5 @

0_0402_5% 1 2
1 2
1 2
+CHGRTC JUMP_43X118
PJ6 @
PJ7 @
+1.8VSP 1 1 2 2 +1.8VS +1.05VS_VTTP 1 1 2 2 +1.05VS_VTT
PBJ1 @ PR57 PR102
560_0603_5% 560_0603_5% JUMP_43X118
JUMP_43X79 PJ8 @
2 1 1 2 1 2 +RTCBATT
1 1 2 2
JUMP_43X118
PJ9 @
ML1220T13RE
+0.75VSP 1 1 2 2 +0.75VS
JUMP_43X79
PJ11 @
4
+VCCSAP 1 1 2 2 +VCCSA 4
JUMP_43X79
A
Dr-Bios.com B
Compal Secret Data
C
Custom
Title
Date:
4019J1
SCHEMATIC MB A8203

D
Sheet 42 of 56
Rev
C
A B C D
+3VLP
PJP3 has not link yet

ACES_50290-0100N
1
10 PC7 @
9
1
0.1U_0603_25V7K
2
8 EC_SMDA
7 EC_SMCA @ PR13 @ PR14
6 TH 10K_0402_1% 10K_0402_1%
5
1
BI+
2
1
4 PR15
1
1
100_0402_1% PU1 @
2 @ PR16
1 1 VCC TMSNS1 8
1
100K_0402_1%
2
PJP2 PR17 2 7 2 1
CONN@ 100_0402_1% GND RHYST1
EC_SMB_DA1 36,44
1
PL2 MAINPWON 3 6 @ PR18
OT1 TMSNS2
SMB3025500YA_2P 36,37,45 MAINPWON 47K_0402_1%
2
BATT_S1 1 2 BATT+ 4 OT2 RHYST2 5 @ PH2
1
100K_0402_1%_NCP15WF104F03RC
G718TM1U_SOT23-8
EC_SMB_CK1 36,44
2
1
1
PC8 PC9 PR19
1000P_0402_50V7K 0.01U_0402_25V7K 1K_0402_5%
2
2
PR20
6.49K_0402_1%
2 1 +3VALWP
@ PR22
6.49K_0402_1%
1
2 1 +3VLP
PR21
1K_0402_1%
2
BATT_TEMP 36
BI 37
2 2
PQ6
TP0610K-T1-E3_SOT23-3
PH1 under CPU botten side :
B+ 3 1 +VSBP CPU thermal protection at 90 degree C ( shutdown )
0.22U_0603_25V7K
0.1U_0603_25V7K
1
Recovery at 56 degree C ADP_I >1.28V ,

1
+3VLP
PC12
PC13
PR26
36 EC_SPOK
100K_0402_1%
CPU will throttling
2
3 3
PR27 @
2
22K_0402_1% ADP_I 36,44

VL 2 1
65W@ PR33
1
3.92K_0402_1%
1
PC14 PR29
@ PR28 0.1U_0603_25V7K 21K_0402_1%
2
1
1
100K_0402_1%
1
PU3
2
@ PR34 PR31 1 8
2
D VCC TMSNS1
1
1K_0402_5% PQ7 100K_0402_1% @ PR32 90W@ PR33

1 2 2 5,36 H_PROCHOT# 100K_0402_1% 2 7 2 1 8.87K_0402_1%
VCIN0_PH 36
2
2
36,45 SPOK G GND RHYST1 PR35
2
2N7002KW_SOT323-3 MAINPWON 3 6 9.53K_0402_1%
D ~OT1TMSNS2
1
S PR49
3
@ PC15 2 1 2 4 5
G ~OT2 RHYST2
1U_0402_6.3V6K @ 0_0402_5% 1 2 VCIN1_PROCHOT 36
2
G718TM1U_SOT23-8
S PQ45 90W@ PR36
3
16.2K_0402_1%
2
2N7002KW_SOT323-3
1
PR51 @ 65W@ PR36
1
0_0402_5% 10.5K_0402_1%
PR38
10K_0402_1%
1
PH1
2
100K_0402_1%_NCP15WF104F03RC
2
36 H_PROCHOT#_EC
4 4
For 65W adapter==>action 70W , Recovery 54W
Dr-Bios.com
For 90W adapter==>action 97W , Recovery 75W
SCHEMATIC MB A8203
Custom C
4019J1
A B C D
A B C D
for reverse input protection

D
1
2 PQ8
G 2N7002KW_SOT323-3
S
3
1 2 1 2
1
PR39 PR40 1
1M_0402_5% 3M_0402_5%
100ppm
VIN P1 P2
PR41
0.02_1206_1%
B+
4x4x2 CHG_B+
PQ11
PQ9 PQ10 PL3 SIS412DN-T1-GE3_POWERPAK8-5
SIS412DN-T1-GE3_POWERPAK8-5 SIS412DN-T1-GE3_POWERPAK8-5 1.2UH_PNS40201R2YAF_3A_30%
1 1 1 4 1 2 1
2200P_0402_50V7K
2 2 2
0.1U_0402_25V6
10U_0805_25V6K
10U_0805_25V6K
5 3 3 5 2 3 5 3
0.1U_0402_25V6
2200P_0402_50V7K
0.01U_0402_50V7K
1
1
0_0402_5%
PC21
PC22
PC23
PC24
PR42
1
VIN
0_0402_5%
PC16
PR43
4
4
PC26 @
PC27
2
1
@ 2 0.1U_0402_25V6
1
PC25
1 2 @
2
2
0.1U_0402_25V6
PD6
2
BAS40CW_SOT323-3
1
BQ24725_BATDRV 1 2
PC28
PR44
1
4.12K_0603_1%
4.12K_0603_1%
PC29 4.12K_0603_1%
0.047U_0402_25V7K
1
1 2
PR45
PR46
5
10_1206_1%
0_0603_5%
1
PR48
PR47
0.1U_0603_25V7K
2
PR50 PQ12
1
0_0402_5% SIS412DN-T1-GE3_POWERPAK8-5
BQ24725_ACN
PC30
BQ24725_ACP
2 2
BQ24725_BST 2
1
DH_CHG 1 2DH_CHG-1 4
2
PC31 PD7
BQ24725_LX
2
1 2 RB751V-40_SOD323-2 BATT+
DH_CHG
1U_0603_25V6K PC33 PL4 PR52
3
2
1
1 2 4.7UH_FDSD0630-H-4R7M-P3_5.5A_20% 0.01_1206_1%
BQ24725_LX 1 2 CHG 1 4
1U_0603_25V6K
5
20
19
18
17
16
2 3
SIS412DN-T1-GE3_POWERPAK8-5
CSOP1
4.7_1206_5%
PU4
2200P_0402_50V7K
0.01U_0402_50V7K
CSON1
1
VCC
PHASE
HIDRV
REGN
BTST
PR53
10U_0805_25V6K
10U_0805_25V6K
21 PAD
0.1U_0402_25V6
0.1U_0402_25V6
PC39
PC36
PC34
PC35
1
1
PQ13
1 15 DL_CHG 4 @
ACN LODRV
PC37
PC38
2
2
2 14
680P_0402_50V7K
ACP GND PR54
3
2
1
2
1
BQ24725A_VQFN20_3P5X3P5 10_0603_5%
PC40
BQ24725_CMSRC 3 13 SRP 1 2 CSOP1
CMSRC SRP
2
@
0.1U_0603_25V7K
BQ24725_ACDRV 4 12 SRN 1 2 CSON1
2
ACDRV SRN
PC41
PR55
6.8_0603_5%
+3VLP 1 2 ACOK 5 11 BQ24725_BATDRV
PR56 ACOK ACDET BATDRV
100K_0402_1%
IOUT
SDA
ILIM
SCL
3 15,36,40,41,45 ACIN 3
Pre_CHG +3VALW
6
10
ACDET
1
1 2
0.01U_0402_25V7K
PD9 PR58
1
100K_0402_1%
RB751V-40_SOD323-2 316K_0402_1%
1
@ PR59
@PR59 VIN PR60
PC42
PR61
1
2M_0402_1% 255K_0402_1%
2
1 2
Vin Dectector
2
2
2
1
1
@ PR62
PR63
154K_0402_1%
Min. Typ Max.
2M_0402_1% L-->H 17.852V 18.063V 18.275V
H-->L 17.476V 17.687V 17.898V
2
1 2
ACDET
PQ14@
ILIM and external DPM
0.1U_0402_16V7K
EC_SMB_CK1 36,43
1
@ PR64
@PR64 PDTC115EU_SOT323-3
PC43
100K_0402_1% PR65
36 FSTCHG 1 2 2 66.5K_0402_1%
Min. Typ Max.
2
EC_SMB_DA1 36,43
PR66 3.906A 4.006A 4.108A
2
@ PQ15 0_0402_5%
D
1
2N7002KW_SOT323-3 2 1 1 2 ADP_I 36,43

3
36,40,46,47 SUSP# 2
1
G PC44 @ PC45
4
100P_0402_50V8J 0.1U_0402_16V7K 4
S Close EC
3
A
Dr-Bios.com B
Custom
Compal Secret Data

Deciphered Date
C
2012/07/12 Title
Date:
4019J1

SCHEMATIC MB A8203
D
Sheet 44 of 56
Rev
C
5 4 3 2 1
Note:
Use TPS51125 IC can remove RTC refernece LDO
Use TPS51427 IC must keep RTC refernece LDO
2VREF_8205
1U_0603_10V6K
D D
1
PC46
2
Vfb_ovp 108% 111% 115%
PR67 PR68
13.7K_0402_1% 30K_0402_1%
1 2 2 1
PR69 PR70
RT8205_B+ 20K_0402_1% 19.6K_0402_1% RT8205_B+
2 1 1 2
PJ20
@ Typ: 175mA
B+ 1 2 +3VLP
1 2
ENTRIP2
ENTRIP1
2200P_0402_50V7K
2200P_0402_50V7K
PR71 PR72
0.1U_0603_25V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
0.1U_0603_25V7K
JUMP_43X79 154K_0402_1% 162K_0402_1%
PC49
PC57
4.7U_0805_10V6K
2 1 1 2
1
1
PC50
PC51
PC52
PC55
PC56
PC53
5
5
PU5
2
2
PC54
PQ16 PJ18 @ PQ17
ENTRIP2
FB2
TONSEL
REF
FB1
ENTRIP1
1
PAD-OPEN1x1m
25 P PAD
2
C C
4 4
1
7 VO2 VO1 24
<BOM Structure> SPOK 36,43
3VLPP 8 23 PR74 PC59
SIS412DN-T1-GE3_POWERPAK8-5 PR73 VREG3 PGOOD 0_0603_5% 0.1U_0603_25V7K SIS412DN-T1-GE3_POWERPAK8-5
1
2
3
3
2
1
2 1 2 1 BST_3V 9 22 BST_5V 1 2 1 2
BOOT2 BOOT1
0_0603_5%
VFB=2.0V
3.37V PL6
4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%
PC58
0.1U_0603_25V7K
UG_3V 10 UGATE2 UGATE1 21 UG_5V PL7
4.7UH_FDSD0630-H-4R7M-P3_5.5A_20% 5.102V
2 1 LX_3V 11 20 LX_5V 1 2 +5VALWP
+3VALWP PHASE2 PHASE1
6.6x7x3
1
1
4.7_1206_5%
4.7_1206_5%
LG_3V 12 19 LG_5V
LGATE2 LGATE1
5
PR75
PR76
SKIPSEL
PQ18
VREG5
SI7716ADN-T1-GE3_POWERPAK8-5
GND
VIN
RT8205LZQW_WQFN24_4X4
NC
EN
1 1
2
2
4
PC60 + 4 +
13
14
15
16
17
18
680P_0402_50V7K
330U_D2E_6.3VM_R25M PD10 PR77 PC62
1
PC61
PC63
680P_0402_50V7K
RLZ5.1B_LL34 499K_0402_1% PQ19 330U_D2E_6.3VM_R25M

2 2
B+ 1 2 1 2
1
2
3
2
SI7716ADN-T1-GE3_POWERPAK8-5
2
3
2
1
Rds=13.5mΩ(Typ) PQ31 @
D Rds=13.5mΩ(Typ)
PC64 1
150K_0402_1%
1U_0603_10V6K
2N7002KW_SOT323-3
16.5mΩ(Max) VL 16.5mΩ(Max)
1
2
37 BI_GATE
1
G
Typ: 175mA
PR78
PC65
4.7U_0805_10V6K
2
ENTRIP1 ENTRIP2 S
3
2
RT8205_B+
RT8205
1
B B
TONSEL=VREF (1)SMPS1=300KHZ (+5VALWP)
0.1U_0603_25V7K
D D
6
2VREF_8205 (2)SMPS2=375KHZ(+3VALWP)
2
PQ20A PQ20B
PC66
2 5
DMN66D0LDW-7_SOT363-6 G G DMN66D0LDW-7_SOT363-6 3.3VALWP Delta I = 1.5471A
(Freq=375KHz)
S S
Iocp = 8.68A~10.4A
1
5VALWP Delta I = 2.6129A

(Freq=300KHz)
PR79 Iocp =8.67A~10.3A
100K_0402_1%
VL 2 1
@ PR100 2011/9/19
2.2K_0402_5%
1 2
36,37 EC_ON
PR80 +3.3VALWP +5VALWP
1
1 2
36,37,43 MAINPWON @ 0_0402_5% PQ21 Initial Rating=7.214>7A set Ipeak=7A 7A< Initial Rating=7.987A <10A set Ipeak=7A
PD11 PR81 PDTC115EU_SOT323-3 Ipeak=7A ;1.2Ipeak=8.4A ;Imax=4.9A Ipeak=7A ;1.2Ipeak=8.4A ;Imax=4.9A
LL4148_LL34-2 1M_0402_1%
2 1 1 2 2
Delta I=1.5471A=>1/2Delta I=0.7735A (F=375K Hz) Delta I=2.612A=>1/2Delta I=1.306A (F=300K Hz)
VIN PR71=(1.2Ipeak-1/2Delta I )*Rds(on)(max)*1.2*10/10uA=151Kohm PR72=(1.2Ipeak-1/2Delta I )*Rds(on)(max)*1.2*10/9uA=156Kohm
ACIN
402K_0402_1%
4.7U_0603_6.3V6K
choose PR71=154Kohm (for safety >1.2Ipeak) choose PR72=162Kohm (for safety >1.2Ipeak)
1
PR82
Rds(on)=16.5m ohm(max) ; Rds(on)=13.5m ohm(typical) Rds(on)=16.5m ohm(max) ; Rds(on)=13.5m ohm(typical)

PC67
PR83
3
316K_0402_1%
1 2
Ilimit_min=(154K*10uA)/(10*16.5m*1.2)=7.77 Ilimit_min=(162K*9uA)/(10*16.5m*1.2)=7.36A
VS
2
930@ PR84 Ilimit_max=(154K*10uA)/(10*13.5m*1.2)=9.5A Ilimit_max=(162K*9uA)/(10*13.5m*1.2)=9A

2
1
10K_0402_1%
930@ PR85
1M_0402_1%
A Iocp=Ilimit+1/2Delta I=8.54A~10.27A Iocp=Ilimit+1/2Delta I=8.67A~10.3A A
VL 1 2
Iocp(min)>1.2Ipeak *EVT2* Iocp(min)>1.2Ipeak
2011/12/28 2011/9/19
D
Dr-Bios.com
1
3 2
2
VS G D
5 930@ PQ23B
2 S 930@ PQ23A G DMN66D0LDW-7_SOT363-6 Security Classification Compal Secret Data Compal Electronics, Inc.
1
DMN66D0LDW-7_SOT363-6 2011/06/24 2012/07/12 Title

Issued Date Deciphered Date
S
SCHEMATIC MB A8203
4
PQ22 930@
PDTC115EU_SOT323-3 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
3
Custom C
4019J1
5 4 3 2 1
A
+1.5VP
@PJ10
@ PJ10
Ipeak = max{ 07*Ibudget, 1st +2nd max loading} 1.5V_B+ 1 2 B+
1 2
Ipeak = max{ 20.85*0.7 , 5+8.2 }
JUMP_43X118
4.7U_0805_25V6-K
4.7U_0805_25V6-K
Ipeak=14.59A ; 1.2Ipeak=17.51A ;Imax=10.21A
1/2Delta I=1.535A (F=300K Hz)
1
PC68
PC69
PR88=(1.2Ipeak-1/2Delta I) *Rds(on)(max)*1.2/9uA=10.7Kohm
5
choose PR88=11Kohm (for safety >1.2Ipeak)
2
Rds(on)=4.8m ohm(max) ; Rds(on)=3.8m ohm(typical) +1.5VS +1.5VP
Ilimit_min=(11K*9uA)/(4.8m*1.2)=17.2A
PQ24
Ilimit_max=(11K*9uA)/(3.8m*1.2)=21.7A MDV1525URH_PDFN33-8-5
4
Iocp=Ilimit+1/2Delta I=18.7A~23.2A PJ16 @ PJ13@
1
Iocp(min)>1.2Ipeak
1
2011/9/19
PL9 has not link to 1.5uH yet
3
2
1
2
2
PL9
S COIL 1.5UH 20% TMPB0604M-1R5MN-Z01 11A
OVP=10% 15% 20% PR86 PC71
1.53V
BST_1.5V
UG_1.5V
2.2_0603_5% 0.1U_0603_25V7K
LX_1.5V
1 2 BST_1.5V-1 1 2 2 1
+0.75VSP +1.5VP
靠近Output Cap PAD prevent the switching 6.6x7.3x3.8 TAI-TECH
10U_0805_25V6K
10U_0805_25V6K
1
too fast to short through
5
20
19
18
17
16
1
1
PC72
PC73
PU6 PQ25 PR87
4.7_1206_5% 1
VTT
VLDOIN
BOOT
UGATE
PHASE
21
2
2
PAD + PC74
1 15 LG_1.5V 4 330U_D2_2V_Y
VTTGND LGATE
1
PC75 2
2 14 680P_0402_50V7K
2
VTTSNS PGND PR88 S TR MDU1512RH 1N POWERDFN56-8
3
2
1
11K_0402_1%
3 GND CS 13 2 1
RT8207MZQW_WQFN20_3X3 <BOM Structure>
Rds=3.8mΩ(Typ)
4 12
+VTT_REFP VTTREF VDDP 4.8mΩ(Max)
5 11 2 1
+1.5VP VDDQ VDD
+5VALW
PGOOD
PR89
+3VALW
1
1U_0603_10V6K
5.1_0603_5%
TON
PC76
FB
S3
S5
0.033U_0402_16V7K
2
1
10K_0402_5%
PC77
6
10
PR90
PC78
1U_0603_10V6K
S3_1.5V
S5_1.5V
2
PR91
680K_0402_1% @
2
36,40,44,47 SUSP# 1 2 PGOOD_1.5V
PR93
@ PR92 887K_0402_1%
1 36,40 SYSON 1 2
0_0402_5%
2 1 1.5V_B+ 1
1 PR94
1
@ PC79 5.9K_0402_1%
PC325 0.1U_0402_16V7K 2 1
0.1U_0402_16V4Z
2
2 PQ26
D FB=0.75V
1
2N7002KW_SOT323-3
To GND = 1.5V
40,47 SUSP SUSP 2
G PR95 To VDD = 1.8V
S 5.76K_0402_1%
3
FB=0.6V
STATE S3 S5 1.5VP VTT_REFP 0.75VSP Note:Iload(max)=1.242A
@ PU7 PL10
PJ14
4
S0 Hi Hi On On On +3VALW 1 2 10 2 LX_1.8V
1UH_PH041H-1R0MS_3.8A_20%
1 2
3.8x3.8x1.8 Cyntec
PG
1 2 PVIN LX +1.8VSP
Off
1
S3 Lo Hi On On
68P_0402_50V8J
9 3
(Hi-Z) JUMP_43X79PC80 PVIN LX
1
4.7_1206_5%
1
22U_0805_6.3VAM
PC81
22U_0805_6.3VAM
22U_0805_6.3VAM
8
2
SVIN
1
PR96
PR257 PR97
S4/S5 Lo Lo Off Off Off
PC82
PC83
200K_0402_5% 6 20K_0402_1%
2
FB
SUSP# 1 2 +1.8VSP_ON 5
(Discharge) (Discharge) (Discharge)
2
EN
NC
NC
TP
FB_1.8V
0.1U_0402_16V7K
PC84
11
1
1
1
Note: S3 - sleep ; S5 - power off
680P_0402_50V7K
2
PC85
SY8033BDBC_DFN10_3X3 PR99
47P_0402_50V8J
9.76K_0402_1%
2
1
UMA
PC87
2
2
PQ28 @
D
1
+1.5VP 2N7002KW_SOT323-3
SUSP 2
Ipeak = max{ 07*Ibudget, 1st +2nd max loading} G
Ipeak = max{ 15.05*0.7 , 5+8.2 }
S
Ipeak=13.2A ; 1.2Ipeak=15.84A ;Imax=9.24A
3
1/2Delta I=1.535A (F=300K Hz)

PR88=(1.2Ipeak-1/2Delta I) *Rds(on)(max)*1.2/9uA=9.16Kohm
choose PR88=9.53Kohm (for safety >1.2Ipeak)
Rds(on)=4.8m ohm(max) ; Rds(on)=3.8m ohm(typical)
Ilimit_min=(11K*9uA)/(4.8m*1.2)=14.9A
Dr-Bios.com
Ilimit_max=(11K*9uA)/(3.8m*1.2)=18.8A
Iocp=Ilimit+1/2Delta I=16.4A~20.3A
Iocp(min)>1.2Ipeak Security Classification Compal Secret Data Compal Electronics, Inc.
SCHEMATIC MB A8203
Custom C
4019J1
A
5 4 3 2 1
+3VS
1
PR261
10K_0402_1% @PJ12
@ PJ12
+1.05VS_VTTP_B+ 1 2
1 2 B+
2
JUMP_43X118
PR101
5
1 2
48 VCCPPWRGOOD
2200P_0402_50V7K
@ 0_0402_5%
0.1U_0402_25V6
4.7U_0805_25V6-K
4.7U_0805_25V6-K
D D
1
PC95
PC96
PC97
PC98
@ PR274
0_0402_5%
prevent the switching 4 PQ29
2
MDV1525URH_PDFN33-8-5
too fast to short through
2
PR111 PC99
3
2
1
PU9 2.2_0603_5% 0.1U_0603_25V7K
PR112 1 10 BST_+1.05VS_VTTP 1 2 1 2
PGOOD VBST
6.6x7.3x2.8
PR113
86.6K_0402_1%
2 1 TRIP_+1.05VS_VTTP2
TRIP DRVH 9 UG_+1.05VS_VTTP PL14 1.0623V
330K_0402_5% 1UH_VMPI0703AR-1R0M-Z01_11A_20%
36,40,44,46 SUSP# 1 2 EN_+1.05VS_VTTP 3 EN SW 8 SW_+1.05VS_VTTP 1 2 +1.05VS_VTTP
5
FB_+1.05VS_VTTP 4 7
VFB V5IN
+5VALW
1
PQ30
1
PC100 RF_+1.05VS_VTTP 5 6 LG_+1.05VS_VTTP 1
0.1U_0402_16V7K TST DRVL
2
1
11 PR115 + PC102
TP PC101 4.7_1206_5% PC103 330U_D2_2V_Y
4
PR114 TPS51212DSCR_SON10_3X3 1U_0603_10V6K 0.1U_0402_16V7K
1
PQ27 470K_0402_1% 2
D
1
2N7002KW_SOT323-3 S TR MDU1512RH 1N POWERDFN56-8
1
40,46 SUSP SUSP 2 PC104 <BOM Structure>
3
2
1
2
G
Rds=3.8mΩ(Typ) 680P_0402_50V7K
4.8mΩ(Max)
2
S
3
PR116
C VFB=0.7V 4.99K_0402_1% C
2 1
PC105 PR117 PR118

1000P_0402_50V7K 1.2K_0402_1% 100_0402_1%
1
2 1 2 1 1 2 VCCIO_SENSE 8
PR119
10K_0402_1%
2
VFB= 0.704V
Vo=VFB*(1+PR116+PR118/PR119)= 1.05V
Freq= 266~314KHz , 290KHz(typ)
OVP 120% 125% 130%

+1.05VS
Ipeak=max( Ibudgt*0.7=13.42 , 8.5+6.842=15.34)
B Ipeak=15.34A ;1.2Ipeak=18.408A ;Imax=10.732A B
1/2Delta I=1.7102A (F=290K Hz)
PR112=(1.2Ipeak-1/2Delta I) *Rds(on)(max)*1.2*8/9uA=85.5Kohm
choose PR112=86.6Kohm (for safety >1.2Ipeak)
Rds(on)=4.8m ohm(max) ; Rds(on)=3.8m ohm(typical)
Ilimit_min=(86.6K*9uA)/(8*4.8m*1.2)=16.9A
Ilimit_max=(86.6K*9uA)/(8*3.8m*1.2)=21.4A
Iocp=Ilimit+1/2Delta I=18.6A~23.1A
Iocp(min)>1.2Ipeak
2011/9/19
UMA Ipeak value equal to discrete
A A
5 Dr-Bios.com 4
Compal Secret Data
3 2
Custom
Title
Date:
4019J1
SCHEMATIC MB A8203

1
Sheet 47 of 56
Rev
C
5 4 3 2 1
VID [0] VID[1] VCCSA Vout

0 0 0.9V
0 1 0.85V
1 0 0.775V
1 1 0.75V
D D
output voltage adjustable network
+VCC_SAP
TDC 4.2A
Peak Current 6A
OCP current 7.2A
PU10 Has not Link 8037C yet

@ PU10 SY8037CDCC DFN 12P PWM
4x4x1.8 CTNTEC
PL15
PJ28
0.47UH +-20% PCMC042T-R47MN 6A
+3VALW +VCCSAP
2200P_0402_50V7K
0.1U_0603_25V7K
1 2 +VCCSA_PWR_SRC 12 1 +VCCSA_PHASE 1 2
1 2 PVIN LX
22U_0805_6.3V6M
22U_0805_6.3V6M
0.9V
22U_0805_6.3V6M
JUMP_43X79 11 PVIN LX 2
2200P_0402_50V7K
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
0.1U_0402_16V7K
PC118
PC119
1 SA_PGOOD 36
2
PC120
PC121
PC106 10 3 PR120 PR126
SVIN LX
2
PC110
PC112
PC113
PC114
PC115
PC116
68P_0402_50V8J 100K_0402_5% 4.7_1206_5%
2 1 9 4 +VCCSA_PWRGD 1 2
+3VS
1
1
2 FB PG PR124
1
8 5 +VCCSA_EN 1 2 @ @
VOUT EN VCCPPWRGOOD 47
@ 0_0402_5%
GND
1
7 6 PC109
VID1 VID0 680P_0402_50V7K
+VCCSA_VID0
+VCCSA_VID1
13
2
C C
<BOM Structure>
H_VCCSA_VID0 9
PR122
1K_0402_5%
2 1 The 1k PD on the VCCSA VIDs are empty.
PR121 These should be stuffed to ensure that
1K_0402_5% VCCSA VID is 00 prior to VCCIO stability.
2 1
PR128
H_VCCSA_VID1 9
100_0402_5%
2 1
PR130
1 @ 2 VCCSA_SENSE 9
0_0402_5%
B B
A A
5
Dr-Bios.com 4
Compal Secret Data
3 2
Custom
Title
Date:
4019J1
SCHEMATIC MB A8203

1
Sheet 48 of 56
Rev
C
5 4 3 2 1
2 1
1
+VGFX_CORE @ PR131 10_0402_1%
PC125
1000P_0402_50V7K
9 VCC_AXG_SENSE
2 2
9 VSS_AXG_SENSE
PC127
2 1 0.01UF_0402_25V7K
1
@ PR132 PC133 PC134
10_0402_1% 68P_0402_50V8J 470P_0402_50V7K
2 1 2 1 2 1
PR134
PH3 PR135 PC135 499_0402_1%
10K_0402_1%_ERTJ0EG103FA 422_0402_1% 137K_0402_1%
150P_0402_50V8J CPU_B+
PR1361
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
D VSUMG- 2 1 2 2 1 2 1 D
2
PR137
MDU1516URH_POWERDFN56-8-5
1
2.55K_0402_1%
1
PC181
PC182
PC183
PC184
PR139
5
1000P_0402_25V8J
36.5K_0402_1%
2K_0402_1%
0.1U_0402_16V7K
0.022U_0402_16V7K
0.1U_0603_25V7K
1
1
PC137
PR143
PQ38
2 1
2
2
@ @
11K_0402_1%
2.61K_0402_1%
1 2
2
2
PR142
PC139
PC140
+3VS
PC141
PR141
PC138 UGATE1G 4
1
1
2
1.91K_0402_1%
330P_0402_50V7K
2
1
1
PR197 @
VSUMG+ 0_0402_5% PL22
3
2
1
1 2 +5VS S COIL 0.22UH 20% FDUE0640-H-R22M=P3 25A
PHASE1G 1 2
2
LGATE1G +VGFX_CORE
DCR: 0.97mΩ±5%
4.7_1206_5%
1
PWMG2 PR147
PR200
PHASE1G PQ40
7.6x6.7x4
MDU1511RH_POWERDFN56-8-5
2
3.65K_0603_1%
UGATE1G PC189
Rds(on)
1
0.22U_0603_16V7K
1 1
1_0402_5%
typ=2.7m Ω
PR203
PR204
680P_0402_50V7K
BOOT1G 4
1 2
PC190
PR206 max=3.3m Ω
LGATE1G
2.2_0603_5%
+5VS
VSUMG+ 1
2
3
2
1
VSUMG-
40
39
38
37
36
35
34
33
32
31
2
PU13 BOOT1G
ISUMNG
RTNG
FBG
COMPG
PGOODG
PWM2G
LGATE1G
PHASE1G
UGATE1G
BOOT1G
1
C PR152 C
1
27.4K_0402_1%
2 1 PR155 1 30 PR159 PR162
PR158 0_0402_5% ISUMPG BOOT2 0_0603_5% 1_0603_5%
2 29
+5VS ISEN1G UGATE2
3.83K_0402_1% PH4 1 2 ISEN2G 3 28
For ULV 17W 1+1
2
ISEN2G PHASE2
PC155
1U_0603_10V6K
1 2 2 1 NTCG 4 27
2
470K_0402_5%_ TSM0B474J4702RE SCLK NTCG LGATE2
1 2 5 26
8 VR_SVID_CLK SCLK VCCP
CPU_CORE LL= -2.9mΩ,
1
8 VR_SVID_ALRT# 1 2 PR160 0_0402_5% ALERT# 6 ALERT# VDD 25
PR161 0_0402_5%
1 2 SDA 7 24
8 VR_SVID_DAT SDA PWM3
GFX_CORE LL= -3.9mΩ,
1U_0603_10V6K
PR164 0_0402_5% 8 23 LGATE1
36 VR_HOT#
2
VR_HOT# LGATE1
PC154
36 VR_ON 1 2 9 VR_ON PHASE1 22
1
54.9_0402_1%
PR165 0_0402_5% PHASE1

10 NTC UGATE1 21
OVP=0.9V+120mV=1.02V
2
ISEN3/FB2
0_0402_5%
75_0402_5%
130_0402_1%
PR168
PR169
PR170
PR171
1
PGOOD
27.4K_0402_1%
@ PC156 UGATE1
470K_0402_5%_ TSM0B474J4702RE
BOOT1
ISUMN
ISUMP
Iocp=40A
2
COMP
ISEN2
ISEN1
47P_0402_50V8J 41
RTN
TP
1
@ @ BOOT1
FB
2
PR172
1
PH5
ISL95836HRTZ-T_TQFN40_5X5~D FBMA-L11-322513-151LMA50T_1210
11
12
13
14
15
16
17
18
19
20
PL16
CPU_B+ 2 1
+5VS B+
2
+1.05VS_VTT
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
1
2
5
PR196 1
VGATE 15
1
PC158
3.83K_0402_1%
0_0402_5% PQ37
1
1
+
100U_25V_M
PC176
PC177
PC178
PC179
PC159
@ PC126 1 2 PR174 1.91K_0402_1%
+3VS
100U_25V_M
PR173
0.1U_0402_16V7K 2 1 PR192
2
0_0603_5% 2
2
UGATE1 UGATE1-1 4 2
1 2
<BOM Structure>
2
PL21
3
2
1
B
S COIL 0.22UH 20% FDUE0640-H-R22M=P3 25A B
VSUM+ PHASE1 1 2
+CPU_CORE
2.61K_0402_1%
PC162 PR176 PR177 @ PC163
1
11K_0402_1%
4.7_1206_5%
470P_0402_50V7K 2K_0402_1% 42.2K_0402_1% 10P_0402_50V8J PR194
DCR: 0.97mΩ±5%
1
PR180
1000P_0402_25V8J
2.2_0603_5%
0.1U_0603_16V7K
2 1 2 1 2 1 2 1
PR195
BOOT1 2 PQ39 PQ47
1 1 2
7.6x6.7x4
432_0402_1%
PC169
1
1
PC142
680P_0402_50V7K
PC187
1 2
2
PR187
PC167 PC170 0.22U_0603_16V7K PR201
1 2
2
PC188
470P_0402_50V7K 68P_0402_50V8J 4 4 PR198 1_0402_5%
2
PR184
PH6
2 1 2
PR183
1 2 1 Rds(on) 3.65K_0603_1%
typ=2.7m Ω
2
VSUM- 2
499_0402_1% 10K_0402_1%_ERTJ0EG103FA
1
VSUM+
max=3.3m Ω
1
3
2
1
3
2
1
VSUM-
PR189
1.91K_0402_1%
PC174
150P_0402_50V8J
Close Phase 1 choke
1
0.1U_0402_16V7K
2 1 2 1 2 1 PC175
PR190
LGATE1
LGATE1
137K_0402_1%
2
UMA@
+CPU_CORE 2 1
@ PR191 PC180
10_0402_1% 330P_0402_50V7K
2 1
8 VCCSENSE
A 8 VSSSENSE A
2 1
@PC186
2 1 0.01UF_0402_25V7K
Dr-Bios.com
@ PR193
10_0402_1%
SCHEMATIC MB A8203
Custom C
4019J1
5 4 3 2 1
8 7 6 5 4 3 2 1
VGA Chipset Default VID6 VID5 VID4 VID3 VID2 VID1 VID0 +VGA_B+ VGA@ PL23
Voltage FBMA-L11-322513-151LMA50T_1210
2 1 B+
N13P GS 0.9V 0 1 1 0 0 0 0
2200P_0402_50V7K
H H
10U_0805_25V6K
10U_0805_25V6K
0.1U_0603_25V7K
1
1
@ PC191
VGA@ PC192
VGA@ PC193
VGA@ PC194
2
2
22
22
22
22
GPU_VID5
GPU_VID4
GPU_VID3
GPU_VID2
22
22
GPU_VID1
GPU_VID0
5
2
VGA@
@ PR207 PQ41
0_0402_5%
VGA@ PR209
100K_0402_1%
41 VGA_ON 1 2 +3VSDGPU 4
1
2
PC107 VGA@ VGA@ PR208 VGA@ PC195
0.1U_0402_16V7K 2.2_0603_5% 0.22U_0603_10V7K
3
2
1
10K_0402_1%
10K_0402_1%
10K_0402_1%
10K_0402_1%
10K_0402_1%
10K_0402_1%
BOOT2_VGA 2 1 BOOT2_2_VGA 1 2
1
VGA@ PL24
G G
VGA@ PR267
VGA@ PR266
@ PR265
@ PR264
PR263
@ PR262
VGA@ PR210 UGATE2_VGA S COIL 0.22UH 20% FDUE0640-H-R22M=P3 25A
10K_0402_1%
1 2 PHASE2_VGA 1 2 +VGA_CORE
@
2
boot resistor to 1.1V DCR: 0.97mΩ±5%
10K_0402_5%
3.65K_0402_1%
7.6x6.7x4
1V2N_VGA
1
1
VGA@
PQ42
VGA@ PR214
VGA@ PR211
+3VS @ PR212
1.91K_0402_1%
1 2 CLK_ENABLE#_VGA @ PR217
LGATE2_VGA 4 VGA@ PR213 0_0402_5%
2
1
4.7_1206_5% 1 2V1N_VGA VGA@ PR215

PR216 VGA@ 1_0402_5%
10K_0402_1%
10K_0402_1%
10K_0402_1%
10K_0402_1%
10K_0402_1%
10K_0402_1%
1.91K_0402_1%
1
VSUM+_VGA
3
2
1
2
1
@ PR273
@ PR272
VGA@ PR271
VGA@ PR270
VGA@ PR269
VGA@ PR268
PR218 @
2
1 2 PC198 VGA@ ISEN2_VGA

18 VGA_PWROK
0_0402_5% 680P_0402_50V7K
GPU_VID6
GPU_VID5
GPU_VID4
GPU_VID3
GPU_VID2
GPU_VID1
GPU_VID0
2
F VGA@ PR219 VSUM-_VGA F
2
100K_0402_5%
+3VS 1 2
VGA@ PR220
47K_0402_1% Rds(on)
2 1
typ=2.7m Ω
+3VS max=3.3m Ω
40
39
38
37
36
35
34
33
32
31
VGA@ PU14
1
GPU_HOT#
CLK_EN#
DPRSLPVR
VR_ON
VID6
VID5
VID4
VID3
VID2
VID1
VID0
@ PR289 30
BOOT2
10K_0402_5% UGATE2 29
@ PH8 1 28
2
470K_0402_5%_ TSM0B474J4702RE PGOOD PHASE2

2 PSI# VSSP2 27
E E
2 1 3 RBIAS LGATE2 26
4 25 VGA@ PR222 0_0402_5% 1 2 +5VS
VR_TT# VCCP
2 1 2 1 5 NTC PWM3 24 1 2
6 23 VGA@ PR221
@ PR186 @ PR199 VW LGATE1 0_0402_5%
7 COMP VSSP1 22
27.4K_0402_1% 3.83K_0402_1% 8 21
FB PHASE1
1 2 9 ISEN3
UGATE1
10
BOOT1
ISUM+
ISEN2
1
ISEN1
ISUM-
VSEN
IMON
VGA@ PC200 PC201 VGA@

1000P_0402_50V7K
8.06K_0402_1%
VDD
RTN
VIN
249K_0402_1%
33P_0402_50V8J 41 1U_0603_10V6K
AGND
2
VGA@ PC202
2
PR223
VGA@ PR224
ISL62883CHRTZ-T_TQFN40_5X5
11
12
13
14
15
16
17
18
19
20
VGA@ PR225 VGA@

2
499_0402_1% PC203
@ 1 2 1 2
1
470P_0402_50V7K
VGA@ PC204 VGA@ PR227 1 2 +5VS
D 68P_0402_50V8J 3.57K_0402_1% VGA@ PR226 D
1 2 1 2 VGA@ PR228 0_0402_5%

0_0402_5%
1 2 +VGA_B+
ISEN2_VGA
VGA@ PR230
LL Disable
1 2 1 2
ISEN1_VGA 1_0402_5%
VGA@ PC205 VGA@ PR229 +VGA_B+
0.22U_0402_10V4Z
0.22U_0402_10V4Z
1 2 +5VS
N13P_GS with turbo
1
150P_0402_50V8J 324K_0402_1%
1
1
VGA@ PC206
VGA@ PC207
VGA@ PC208
VGA@ PC209
1U_0603_10V6K
0.22U_0603_25V7K
Iccmax=50A
PR231 VGA@
255K_0402_1%
2200P_0402_50V7K
2
10U_0805_25V6K
10U_0805_25V6K
BOOT1_VGA
0.1U_0603_25V7K
Iocp =60A
2
VGA@
PQ43
1
@ PC210
VGA@ PC211
VGA@ PC212
VGA@ PC213
2
2
C C
VSUM+_VGA UGATE1_VGA 4
VSUM-_VGA
+VGA_CORE 1 2
PR235 VGA@ VGA@ PC214
VGA@ PR232 2.2_0603_5% 0.22U_0603_10V7K
3
2
1
1
10_0402_5% 1 BOOT1_1_VGA
2.61K_0402_1%
2 1 2
PR234 VGA@
PL25VGA@
@ PR236 S COIL 0.22UH 20% FDUE0640-H-R22M=P3 25A
24 VCCSENSE_VGA 1 2
0_0402_5% PHASE1_VGA 1 2 +VGA_CORE
2
0.1U_0603_25V7K
0.068U_0603_16V7K
1
DCR: 0.97mΩ±5%
5
@ PC215
7.6x6.7x4
1V1N_VGA
1
1
VGA@
VGA@ PC217
VGA@ PC218
10K_0402_5%
330P_0402_50V7K PQ44
3.65K_0402_1%
2
VGA@ PR238
Rds(on)
2
VGA@ PR239
LGATE1_VGA 4 typ=2.7m Ω VGA@ PR237
2
1
B B
VGA@ PR241
11K_0402_1%
4.7_1206_5% @ PR242 PR240 VGA@
2
1
VGA@ PC221
0.01U_0402_50V7K
PH7 VGA@ max=3.3m Ω 0_0402_5% 1_0402_5%
1 2V2N_VGA
@ PR243 10K_0402_1%_ERTJ0EG103FA
2
3
2
1
2
1 2 VSUM+_VGA
24 VSSSENSE_VGA
2
1
0_0402_5% Layout Note:
VGA@ PC223
VGA@ PR244 VGA@ PR245 Place near Phase1 Choke 680P_0402_50V7K ISEN1_VGA VSUM-_VGA
2
10_0402_5% 1.47K_0402_1%
1 2 1 2 VSUM-_VGA
Dr-Bios.com
1
VGA@ PC224
0.1U_0402_16V7K
2
A A
@ PJ17
1 2 Issued Date 2011/06/24 Deciphered Date 2012/07/12 Title
PAD-OPEN1x1m THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A8203
Custom C
4019J1
8 7 6 5 4 3 2 1
5 4 3 2 1
PWR Rule
CPU LL=2.9m ohm dedign 330uF/9m *4, 22uF *12, 2.2uF*16 +CPU_CORE
+VGFX_CORE GFX LL=3.9m ohm design 330uF/9m *2, 22uF*6, 10uF*6 , 1uF*11
1.05V 330uF*2 10uF*10, 1u*26
1
2.2U_0402_6.3V6M
PC225
2.2U_0402_6.3V6M
PC226
2.2U_0402_6.3V6M
PC227
2.2U_0402_6.3V6M
PC228
2.2U_0402_6.3V6M
PC229
2.2U_0402_6.3V6M
PC275
2.2U_0402_6.3V6M
PC317
2.2U_0402_6.3V6M
PC319
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
2
1
1
PC230
PC231
PC232
PC233
PC234
PC235
PC363
PC364
PC365
PC366
PC367
D D
For BOT side
1
2.2U_0402_6.3V6M
PC236
2.2U_0402_6.3V6M
PC237
2.2U_0402_6.3V6M
PC238
2.2U_0402_6.3V6M
PC239
2.2U_0402_6.3V6M
PC240
2.2U_0402_6.3V6M
PC316
2.2U_0402_6.3V6M
PC318
2.2U_0402_6.3V6M
PC320
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
PC247
PC242
PC243
PC244
PC245
PC246
2
2
+CPU_CORE
1 1 1 1 1 1 1 @
22U_0805_6.3V6M
PC249
22U_0805_6.3V6M
PC250
22U_0805_6.3V6M
PC251
22U_0805_6.3V6M
PC252
22U_0805_6.3V6M
PC253
22U_0805_6.3V6M
PC254
22U_0805_6.3V6M
PC258
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
2 2 2 2 2 2 2
330U_D2_2V_Y
330U_D2_2V_Y
1 1 1 1 1 1 1 1
PC255
PC256
PC241
PC259
PC260
PC261
PC262
PC358
+ +
ESR=9m ohm 2 2 2 2 2 2
For TOP side
2 2
C 1 1 1 1 1 1 1 @ C
22U_0805_6.3V6M
PC265
22U_0805_6.3V6M
PC266
22U_0805_6.3V6M
PC267
22U_0805_6.3V6M
PC268
22U_0805_6.3V6M
PC269
22U_0805_6.3V6M
PC270
22U_0805_6.3V6M
PC264
2 2 2 2 2 2 2
Vaxg
‧ Can connect to GND if motherboard only
supports external graphics and if GFX VR is not
stuffed in a common motherboard design,
‧ VAXG can be left floating in a common
motherboard design (Gfx VR keeps VAXG from +CPU_CORE
floating) if the VR is stuffed +1.05VS_VTT
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1
ESR=9m ohm
1
1
+ PC271 + PC272 @ + PC273
560U_D2_2V_Y 330U_D2_2V_Y 330U_D2_2V_Y
PC353
PC352
PC351
PC334
PC333
PC332
PC331
PC330
PC329
PC328
PC327
PC354
PC356
2
2
2 2 2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
ESR=4.5m ohm
1
B B
Not approved yet

PC326
PC324
PC323
PC322
PC321
PC289
PC288
PC287
PC286
PC285
PC284
PC355
PC357
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
PC279
PC283
PC282
PC281
PC280
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
330U_D2_2.5VY_R15M
1
1
PC291
+
PC248
PC263
PC276
PC277
PC278
2
A A
INTEL Recommend
3*330uF(1 in other page),12*22uF, 5 no stuff
Dr-Bios.com
from PDDG 1.0
SCHEMATIC MB A8203
Custom C
4019J1
5 4 3 2 1
5 4 3 2 1
+VGA_CORE
Under GPU NV DG NVVDD
N13P-GS GB4-128
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
D
4.7Ux15,0.1Ux8(4@) Under GPU D
VGA@ PC292
VGA@ PC293
VGA@ PC294
VGA@ PC295
@ PC296
@ PC297
@ PC298
@ PC299
1
1
2
330Ux4 , 47Ux1,22Ux1,4.7Ux5 Near GPU
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
VGA@ PC300
VGA@ PC301
VGA@ PC302
VGA@ PC303
VGA@ PC304
VGA@ PC305
VGA@ PC306
VGA@ PC307
VGA@ PC308
VGA@ PC309
1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
PC5
PC6
VGA@ PC313
VGA@ PC314
VGA@ PC315
1 1 1 1 1
2 2 2 2 2
VGA@
VGA@
C C
+VGA_CORE
Near GPU 22U_0805_6.3V6M 330u=> ESR=9m ohm
330U_D2_2V_Y
330U_D2_2V_Y
330U_D2_2V_Y
330U_D2_2V_Y
1 1 1 1
47U_0805_4V6
1
1
+ + + +
VGA@ PC196
VGA@ PC197
VGA@ PC219
VGA@ PC220
VGA@ PC311
VGA@ PC312
2
2 2 2 2 2
B B
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
1
VGA@ PC335
VGA@ PC336
VGA@ PC337
VGA@ PC338
VGA@ PC339
2
A A
Dr-Bios.com
SCHEMATIC MB A8203
Custom C
4019J1
5 4 3 2 1
5 4 3 2 1
@ PJ15 PL8 PD5

1 2 1 2 SW 2 1
B+ 6.8UH_MMD-06AH-6R8M-S2L_2.5A_20% +LG_VOUT
7.2 X 6.7 X 1.8 mm
1U_0603_25V6
33P_0402_50V8J
0.1U_0603_25V7K
4.7U_0805_50V6K
4.7U_0805_50V6K
JUMP_43x39 SBR3U40P1-7_POWERDI123-2
1
1
1
PC70
PC93
PC91
PC108
PC89
D D
2
2
2
PR127 @
0_0402_5%
1
PR98
1M_0402_1%
ALW change to VS to save power
PR103
2
OVP
+5VS 1 2
1
0.1U_0402_25V6
PR108
10_0402_1%
1
64.9K_0402_1%
PC92
DCTRL PC86
100P_0402_50V8J
2
20
19
18
17
16
PU8
C
LED output voltage(max)=30.6V < 9S4P > C
PWM
VIN
FAULT
NC
SW
PC90 21 PAD
0.1U_0402_25V6 OVP = 1.95* (1M+64.9K)/64.9K = 31.99V
1 2 VDDIO 1 VDDIO PGND 15 @
PR109
10K_0402_1%
PR107 20_0402_5%1 VDDIO
1 2 EN 2 14
36 BKOFF# EN OVC
PR106
499K_0402_1%
PR110
9.09K_0402_1%
RFPWM=9.09kohm => FDIM=20kHz
100K_0402_1%
1000P_0402_50V7K 2 1 3 13 1 2
FSLCT RFPWM/MODE
2
PR125
1
PR105
PC88
62K_0402_1%
2 1 4 TPS61187RTJR_TQFN20_4X4 12 FB1 29
ISET IFB1
2
1
5 FPO IFB2 11 FB2 29
GND
IFB6
IFB5
IFB4
IFB3
6
10
RFLCT=499kohm => Fsw=1MHz
PWM dimming frequency: 1K(TYP)
1K_0402_1%
PR104
B B
1 2 DCTRL
29 INVTPWM
100K_0402_1%
2
PR123
PC94
220P_0402_50V7K
2
FB4 FB3 29 29
1
A A
Dr-Bios.com Compal Electronics, Inc.

Security Classification Compal Secret Data
SCHEMATIC MB A8203
Rev
Custom C
4019J1
5 4 3 2 1
5 4 3 2 1
Version change list (P.I.R. List) Page 1 of 2

for PWR
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
Vboot Voltage can not allow

1 VGA boot voltage VGA take off the PR212 11/22
EVT2
D to boot to 1.1V D
PR209 set to 100k ohm

2 HW sequence tune the correct sequence VGA 11/22 EVT2
,PC107 set to 0.1u
3 HW sequence tune the correct sequence 1.05

put on the PQ27 11/20 EVT2
4 HW sequence tune the correct sequence 1.8 put on the PQ28

11/20 EVT2
put on the PR91 680k,Pc325 0.1u,

5 HW sequence tune the correct sequence 0.75 11/20 EVT2
PQ26,PJ16
in order to follow the intel spec change the original 330u X3

6 CPU overshoot CPU 11/25 EVT2
to reduce the overshoot to 330u + 560u
C C
7 HW sequence tune the correct sequence 1.5V add PJ16 and PQ26 11/22 EVT2
8 LED
Panel demand change the cap 35V to 50V change pc91 and pc108 to 50V cap 11/28 EVT2
driver
can see the cap throuth the take out the pc158 replace
9 ME demand CPU 3/13 PVT
thermal hole by pc159
10 acoustic demand can't pass acoustic acer spec CPU add PC158 PC159 3/22 PVT2
11 component Vgs afraid Vgs is too small charger change PQ8 material 3/22 PVT2
not satisfy
B
12 0ohm resister PPM request cost down R_SHORT PR49,PR80,PR92,PR124,PR101, 3/22 PVT2
B
cost down PR130,PR207,PR218,PR236,PR243

13
14
15
16
A 17 A
5
Dr-Bios.com 4
Compal Secret Data
3 2
Title
Date:
4019J1

Custom
SCHEMATIC MB A8203

1
Sheet 54 of 56
Rev
C
A B C D E
2/15
Change R558 to @(0_0402),C618(0.1U_0402) for AD_PID0 for WLAN LED
ADD R455 PH 4.7K_0402(SD028470180)(DISASSOCIATE#) <- ?K Change EC pin102 net name fron VCIN1_PROCHOT_R to IRST_RST# P.38
ADD R454(@) (0_0402) for cost down BT power control Add net IRST_RST_R# on U25 pin1 and link R162 0_0402_5% to IRST_RST# P.17
ADD R456 (0_0402)(SD028000080) for IOAC Pin46 Add R161 0_0402_5% on PLT_RST# P.17
POP Q46,R590 for Boardcom WLAN discharge Add net name PLT_RST_R# between R161 and R10 P.17
1/31 for LAN
ADD R160 (0_0402) for USB_OC1# USB_OC0# colay Change net name from PLT_RST# to PLT_RST_BUF# P.34
1 1
Add net name PLT_RST_BUF_R# between R149.2 and U62.2
2/1
R549.1,R548.1 change from +3VLP to +3VALW_EC for KB back light
remove stand along BT Add net name GPXIOA07_R between Q43.2 and Q26.1
remove USB20_N13 USB20_P13 Change R559 18K_0402_5% to 33K_0402_5%
for ESD: 2/15A
ADD C416 0.1U_0402 ON/OFFBTN# L27 change main source from SHI00007400 to SH00000JM00
ADD C420 0.1U_0402 ON/OFF ADD R163(0_0402_5%) for PLT_RST_LAN#
ADD C421 0.1U_0402 BI_RESET
POP C345 0.01U_0402 PLT_RST# 2/16
R422,R619,R65 change to 0ohm-Rshort
Y2,X1 main source change from SJ10000DM00 to SJ100004Z00 C452 change from 15P to 18P
Chang JBL1 footprint from 抽屜式 SP01000ZW00 to 掀蓋式 SP01000Z300
2/2 SW1 change to unpop
ADD C151(@) 330U_D2
change U13 from SA00005AGE0 to SA00005AG00 (QS PCH) 02/17
Q45,Q46 2N7002 change to Q54 dual 2N7002
2/6 3VSWLAN_R change name to +3VS_WLAN_R trace 20mil
2 ADD C91 @ 4.7U_0603 for WLAN Power CAP(SE107475K80) 2
2/18
2/7 R34 unpop(SUSWARN# PH 10K)
for N13P-GS QS,MP strap R26 unpop(PCH_ACIN PH 10K)
change R186 from 35K to 5K (Strap1 PD)
2/21
2/10 R466 change from 5K to 10K(for device manager 3D device)
ADD Q43 (S TR AO3419L 1P SOT23-3) and JBL2 (S H-CONN ACES 50578-0040N-001 4P P1) for back light
2/13
for NV strap P.24
Change R184 from ES2GPU@ to @ (strap 2) Rev1.0
Delete R473 ES2GPU@ 10K_0402_1% (strap4) 3/14
Delete R469 HYN2G@ 34.8K_0402_1% (ROM_SCLK) ADD D21 ESD diode near ODD prevent PCH crack
Add Hynix VRAM SA00004GD50 strap table (ROM_SI PD25K) Q1 Q4 2N7002 combine to Dual 2N7002 Q55
R559 change 33K to 56K_0402_5% SD028560280(for Board ID 4)
for Option Component R318 change 510K to 100K (BL KB)
Delete PCB 8202@
Delete GPU U14 ES2GPU@ (SA000051800),QS2GPU@ (SA000051800) 3/15
Delete VRAM GDDR3@ R415 R150,R278,R280,R291,R295,R298 ,R584,R86,R160 change 0_0402_5# ot Rshort_0402
3
Delete PCH U13 QSPCH@ (SA00005AG00),ES2PCH@ (SA00004NQB0) R450,R497 0_0603_5% to Rshort_0603 3
Change VRAM X76 GDDR5@ to VRAM@ and add X76364BOL04 ADD C552,C556,C558,C580,C581 for ESD
(BATT_AMB_LED#,BATT_BLUE_LED#,PWR_SUSP_LED#,PWR_LED#,+3VALW) Place near JLED1
for PCH Q3,Q16,Q17,Q19,Q44 change from SB501380020 to SB501380050 (HF)
Change U13 from SA00005AGE0 to SA00005AG00
3/22
for WLAN change PCH to MP version to SA00005AGI0
Change R328,R455 from 4.7K_0402_5% to 10K_0402_5%
Change R73,R7,R102,R257,R279 from 0_0402_5% to 0 R_SHORT
4/5
CR CPU P/N change to MP PN
2/14
SA00005L5C0,SA00005K6B0,SA00005K5B0
for KB back light
remove Q50 for PROCHOT# connection issue
Change location JBL2 to JBL1
4/10
Add Q26 (2N7002K_SOT23-3) and R318 510K_0402_5%
follow ESD suggest remove D28,D13 for cost down
for GDDR5 GPIO define
Rev1A 4/10 Fix Q50 PROCHOT# connection issue
Change R43 GDDR3@ to R43 @
Change R68 GDDR5@ to R68 DIS@
5/8
Change SA00005MX10 (S IC AV8062701048004 QAXQ J1 1.5G BGA) to SA00005MX60 (S IC AV8062701048004 SR0CW J1 1.5G ABO!
For GPU strap
4
Rev1A 5/9 Change R559 from 56K to 100K(Board ID update) 4
Change R183 QSGPU@ to DIS@ (strap2)
Change R473 QSGPU@ to DIS@ (strap4)
Dr-Bios.com
Change R469 4.99K_0402_1% HYN2G@ to HYNMFR@ (ROM_SI)
Add R469 24.9K_0402_1% HYNAFR@ for VRAM Hynix AFR strap
SCHEMATIC MB A8203
Rev
Custom C
4019J1
A B C D E
A B C D E
PCB
ZZZ LA-8203P MB Rev0: DA80000T600
LA-8203P MB Rev1: DA80000T610
LA-8203P MB with Small Board Rev1: DAZ0O200100
LA-8203P REV1 M/B
DAZ0O200100
1
CPU 1
UCPU1
S IC AV8062701047904 SR0CV J1 1.4G ABO! VRAM
I32367@ SA000051H60 ZZZ ALT. GROUP PARTS VRAM X4 HYN 1G Q5LJ1
AV8062701047904 SR0CV J1 1.4G ABO! VRAM@

ALT. GROUP PARTS VRAMX4 HYN1G 38NM Q5LJ1
X76364BOL03|X76364BOL04
UCPU1
S IC AV8062701048004 SR0CW J1 1.5G ABO! ALT. GROUP PARTS VRAM X4 HYN 1G Q5LJ1
I32377@ SA00005MX60 DRAM
ZZZ
AV8062701048004 SR0CW J1 1.5G ABO! ALT. GROUP PARTS DRAM X4 ELP 2G Q5LJ1
UCPU1 DRAM@ ALT. GROUP PARTS DRAM X4 HYN 2G Q5LJ1
S IC AV8062701047504 SR0D6 J1 1.6G ABO!
X76364BOL11|X76364BOL12
I52467@ SA00004X010
ALT. GROUP PARTS DRAM X4 HYN 2G Q5LJ1
AV8062701047504 SR0D6 J1 1.6G ABO! SANDY BRIDGE
UCPU1
2 S IC AV8063801058401 SR0N9 L1 1.8G BGA 1023 ABO ! 2
I33217@ SA00005L5C0
AV8063801058401 SR0N9 L1 1.8G BGA 1023 ABO !
UCPU1
S IC AV8063801058002 SR0N8 L1 1.7G ABO!
I53317@ SA00005K6B0
AV8063801058002 SR0N8 L1 1.7G ABO!
UCPU1
S IC AV8063801057605 SR0N6 L1 1.9G BGA 1023 ABO !
I73517@ SA00005K5B0
AV8063801057605 SR0N6 L1 1.9G BGA 1023 ABO ! IVY BRIDGE
UCPU1
S IC AV8063801057401 QBP8 K0 1.5G BGA
3 QBP8@ 3
SA00005AZ00
AV8063801057401 QBP8 K0 1.5G BGA
UCPU1
S IC AV8063801057400 QBP7 K0 1.7G BGA
QBP7@ SA00005B000
AV8063801057400 QBP7 K0 1.7G BGA EVT2
4 4
A
Dr-Bios.com B
Compal Secret Data
C D
Title
Date:
4019J1

Custom
SCHEMATIC MB A8203

E
Sheet 56 of 56
Rev
C

Compal Confidential: Q5LJ1 M/B Schematics Document

Uploaded by

Document Information

Original Description:

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Compal Confidential: Q5LJ1 M/B Schematics Document

Uploaded by

Copyright:

Available Formats

A B C D E

Q5LJ1 M/B Schematics Document

Size Document Number

Thursday, June 14, 2012

FDI x8 DMI x4 USB 3.0 USB 2.0 MINI Card CMOS

USBx14 3.3V 48MHz

TMDS(UMA/OPTIMUS) Panther Point-M

LAN(GbE) MINI Card Card reader

Power On/Off CKT. Touch Pad Int.KBD

DC/DC Interface CKT.

Power Circuit DC/DC

Voltage Rails AC AC AC AC DC DC DC SIGNAL

Size Document Number

Thursday, June 14, 2012

PEG_ICOMPI and RCOMPO signals should be

PCI EXPRESS -- GRAPHICS

AA10 J14 PEG_HTX_GRX_N5 C587 1 2 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_N5

PEG_TX#[14] PEG_HTX_GRX_N0 C562 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_N0

AE7 G13 PEG_HTX_GRX_P4 C565 1 2 DIS@ 0.22U_0402_6.3V6K PEG_HTX_C_GRX_P4

Size Document Number

Thursday, June 14, 2012

0921 LVDS@->@ +1.05VS_VTT

CLK_CPU_DPLL# R517 2 @ 1 1K_0402_5%

CLK_CPU_DPLL R516 2 @ 1 1K_0402_5%

Checklist1.5 P.67 Graphis Disable Guide

2 DDR3 Compensation Signals 2

JTAG & BPM

0.1U_0402_16V4Z L59 XDP_TDO @ PAD T35

0_0402_5% U45 R544 R305 0_0402_5% K58 XDP_DBRESET# XDP_DBRESET# 15

0.1U_0402_16V4Z @ XDP_DBRESET# R312 2 1 1K_0402_5%

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY B

Follow CRB1.0 +1.5V

5 SM_DRAMRST# SM_DRAMRST# 3 1 DIMM_DRAMRST#_R 1 2 DIMM_DRAMRST# 11,12

CFG Straps for Processor

CFG7 H49 L47 1: Normal Operation; Lane # definition matches

VCC_VAL_SENSE CFG[11] RSVD35

D52 CFG4 UMA,Optimus eDP啟動

VSS_VAL_SENSE VCC_VAL_SENSE 1K_0402_1%

T18 PAD @ RSVD45 N50 eDP enable

VAXG_VAL_SENSE DC_TEST_C4 DC_TEST_C4_D3 CFG6

*11: (Default) 1x16 PCI Express

CFG[6:5] 10: 2x8 PCI Express

1: (Default) PEG Train immediately following

Size Document Number

Thursday, June 14, 2012

UCPU1F POWER 8.5A

C26 VCC[9] VCCIO[13] AL14 PD0.8

PEG IO AND DDR IO

Thursday, June 14, 2012

INTEL Recommend VCCPLL

V16 VCCSA[12] 0 1 0.85V V V

+ C242 V17 D48 H_VCCSA_VID0

330U_D2_2V_Y V18 D49 H_VCCSA_VID1 1 0 0.775V X V

Place BOT OUT BGA @

4 INTEL Recommend VCCSA C577 C560 C555 C579 C559 4

Security Classification Compal Secret Data Compal Electronics, Inc.

A13 VSS[1] VSS[91] AM38

AE8 VSS[36] VSS[126] AU1 F13 VSS[214] VSS[283] T52

Security Classification Compal Secret Data Compal Electronics, Inc.

6 DDRA_CKE0_DIMMA DDRA_CKE0_DIMMA 73 74 DDRA_CKE1_DIMMA DDRA_CKE1_DIMMA 6

DDR_A_DQS#6 169 170 DDR_A0_DM6