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5038.CS1012 MTT Solutions
5038.CS1012 MTT Solutions
5038.CS1012 MTT Solutions
Q. 1 [10]
The 16-bit registers R1, R2, R3 and R4 initially have the following values:
R1 = A73C, R2 = 9B12, R3 = FF6E, R4 = 2DEA
Determine the 16 - bit values in each register after the execution of the following sequence of microoperations.
R1 R2 – R1
R3 R3 ^ R4
R1 R1 + 1
R1 R1 ⊕ R2 ⊕ R3
R4 ashr R4
Solution:
R1: A73C (Binary value: 1010 0111 0011 1100)
R2: 9B12 (Binary value: 1001 1011 0001 0010)
R3: FF6E (Binary value: 1111 1111 0110 1110)
R4: 2DEA (Binary value: 0010 1101 1110 1010)
R1 R2 – R1
R2 – R1
= R2 +( ~R1 +1)
= 1001 1011 0001 0010 + (0101 1000 1100 0011 + 1)
= 1001 1011 0001 0010 + (0101 1000 1100 0100)
= 1111 0011 1101 0110
= F3D6
R1 F3D6
R3 R3 ^ R4
R1 R1 + 1
R1 R1 ⊕ R2 ⊕ R3
= (1111 0011 1101 0111) ⊕ (1001 1011 0001 0010) ⊕ (0010 1101 0110 1010)
= 45AF (Binary value: 0100 0101 1010 1111)
R4 ashr R4
= 16F9 ( Binary value: 0001 0110 1111 0101)
Solution:
The solution may vary depending upon the microoperation. One possible set of solution is given below:
1. B: 01000001, Microoperation: A V B
Gates used: OR
2. B: 01111100, Microoperation: A⊕ B
Gates used: XOR
3. B: 00001100, Micro-operation: A ⊕ B
Gates used: XOR
4. B: 00000000, Microoperation: A ^ B
Gates used: AND
5. Microoperation: Complement A
Gates used: Inverter
Q. 3 (a) [5]
A computer has a memory unit of 64K x 24. Any instruction strored on any word in the memory has three parts:
one bit address mode, operation code (opcode) and an address part. Calculate the following:
How many bits are there in operation code (opcode)?
How many bits are used in address part?
How many bits are used in data part?
Solution:
64K x 24 means 216 x 24
Total Size = Size of address mode + Size of opcode + Size of address part
24 = 1 + Size of opcode + 16
Size of opcode = 24 – 17 = 7
Thus,
Size of opcode: 07
Size of address part: 16
Size of data part: 24
(b) [5]
Consider the design of a computer having 8192 x 32 memory and the instruction format having three parts: one
bit address mode, operation code (opcode) and an address part. Specify the size of each of following registers:
IR
MTT Solutions, 2nd Trimester (2010-11) B.E. (ECE) - CS1012 www.chitkara.edu.in 2
PC
AC
TR
DR
Solution:
8192 x 32 means 213 x 32
Total Size = Size of address mode + Size of opcode + Size of address part
32 = 1 + Size of opcode + 13
Q. 4 [10]
Assume that the contents of AC and E are 7EF8 (in Hexadecimal) and 1 respectively. Execute the following
register reference instructions one by one mention the contents of AC and E at the end of each instruction.
CMA
CME
CIR
CIL
INC
Solution:
AC: 7EF8 (Binary value: 0111 1110 1111 1000)
E: 1
CIL
There are two possibilities:
1. In case, you consider the original contents of AC and E:
AC: FDF1 (Binary value: 1111 1101 1111 0001)
E: 0
Q. 5 (a) [5]
In basic computer design, the control is executing BSA instruction at address ECE:
A08
A09
Subroutine
1 BUN A08
Find out the following:
Give the microoperations for BSA instruction.
What should be the contents at address A08?
What should be the contents of PC at the end of instruction cycle?
Solution:
BSA Microoperations:
D5T4: M[AR] <- PC, AR <- AR +1;
D5T5: PC <- AR, SC <- 0
Contents at address A08: ECF
Contents of PC: A09
(b) [5]
Assume that an interrupt from I/O program happens when the control is executing the instruction at address 9E9
of main program.
Memory
0
1 0 BUN ABC
I/O Program
1 BUN 0
Solution:
BUN Microoperations:
D4T4: PC <- AR, SC <- 0
Contents at address 0: ECF
Contents of PC: ABC