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SECTION 3.3.8 PAGE 114 OF 172: Section 3.3.8 - Protection Indication System R4
SECTION 3.3.8 PAGE 114 OF 172: Section 3.3.8 - Protection Indication System R4
If the CTs for Main1 & Main2 protections are on the same side of Bus Bar CTs the
Bus Bar protection to configure for Dead zone protection and send inter trip to remote
end breaker.
PD Trip shall actuate the PD IT relay located in R/P which shall send IT to remote
end. Both PD Trip and PD IT relays shall be high burden relays complying with Trip
relay specifications and immune to wiring capacitance discharge currents in DC E/F
conditions.
PD Trip shall actuate the PD IT relay located in R/P which shall send IT to remote
end. Both PD Trip and PD IT relays shall be high burden relays complying with Trip
relay specifications and immune to wiring capacitance discharge currents in DC E/F
conditions.
F50 OLTC Trip is not to be implemented, but only OLTC blocking is required.
2.1.58.3 G10, D10, C10, B10 OHL (also follow the below explained philosophy of Trip relays)
AR x x
unsucces
sful (after
1st shot)
Self reset trip relay shall be provided for each phase and each trip coil. As in 400kV,
220kV levels, single phase tripping is envisaged, each phase shall have independent
Self resetting trip relay. 87L Trip, F21 Z1 Trip, F21 Z2 com Trip) etc shall activate the
Self-reset trip relay. AR L/O trip (AR only one shot is allowed, after 1st shot, if the fault
is still persisting AR L/O is activating the Three phase trip), Z2 back up trip, Z3 trip,
O/C trip etc shall be connected to L/O trip relay which will trip all three phases
together along with Close-lock out. Self-reset as well as L/O trip relays shall initiate
BFP.
In the case of C10 (132kV) and B10 (66kV), Single phase tripping is not envisaged as
per KM practice, only Three phase tripping is implemented and three phase AR.
Hence Phase segregated Self reset trip relays are not required, but a single self reset
trip relay is required per Trip coil for three phase trip in addition to the L/O trip relay
which also will trip all three phases together. These self reset trip relays will get
activate by 87L Trip, F21 Z1 Trip etc (these trips need not be connected to L/O trip
relays). AR L/O trip (AR only one shot is allowed, after 1st shot, if the fault is still
persisting AR L/O is activating the Three phase trip), Z2 trip, Z3 trip, O/C trip etc shall
be connected to L/O trip relay which will trip all three phases together along with
Close-lock out. Self-reset as well as L/O trip relays shall initiate BFP.
PD Trip shall actuate the PD IT relay located in R/P which shall send IT to remote
end. Both PD Trip and PD IT relays shall be high burden relays complying with Trip
relay specifications and immune to wiring capacitance discharge currents in DC E/F
conditions.
If Tele-protection is not provided, AIDED F67N is not possible and hence related AR
initiation shall be discarded from the Trip matrix.
Self x x
Reset
Trip
Relay
(Main-
2)(94-
M2)
Self reset trip relay shall be provided for each phase and each trip coil. As in 400kV,
220kV levels, single phase tripping is envisaged, each phase shall have independent
Self resetting trip relay. 87L Trip, F21 Z1 Trip, F21 Z2 com Trip, DEF Trip (Aided as
well as Back up) etc shall activate the Self-reset trip relay. AR L/O trip (AR only one
shot is allowed, after 1st shot, if the fault is still persisting AR L/O is activating the
Three phase trip), Z2 back up trip, Z3 trip, O/C trip etc shall be connected to L/O trip
relay which will trip all three phases together along with Close-lock out. Self-reset as
well as L/O trip relays shall initiate BFP.
In the case of C10 (132kV) and B10 (66kV), Single phase tripping is not envisaged as
per KM practice, only Three phase tripping is implemented and three phase AR.
Hence Phase segregated Self reset trip relays are not required, but a single self reset
trip relay is required per Trip coil for three phase trip in addition to the L/O trip relay
which also will trip all three phases together. These self reset trip relays will get
activate by 87L Trip, F21 Z1 Trip, DEF Trip (Back up) etc (these trips need not be
connected to L/O trip relays). AR L/O trip (AR only one shot is allowed, after 1 st shot,
if the fault is still persisting AR L/O is activating the Three phase trip), Z2 trip, Z3 trip,
O/C trip etc shall be connected to L/O trip relay which will trip all three phases
together along with Close-lock out. Self-reset as well as L/O trip relays shall initiate
BFP.
PD Trip shall actuate the PD IT relay located in R/P which shall send IT to remote
end. Both PD Trip and PD IT relays shall be high burden relays complying with Trip
relay specifications and immune to wiring capacitance discharge currents in DC E/F
conditions.
Device No Description Eqpt B/S & CB L/O Relay Block Initiat Initiat IT IT
locatio B/C- TC1 TC2 Main- Main- BBP close e BFP e AR Send- sen
n K86 1 2 K50 CB 1 d-2
K86-1 K86-2 0
Sending End
87L-M1 Protection R/P -- x x x
Main-1
Back up 67N- DEF Back up R/P x x -
M1
51-M1 O/C Main-1 R/P -- x x x
86-1 L/O Relay Main- R/P -- x x x x
1
87L-M2 Protection R/P -- x x x
Main-2
Back up 67N- DEF Back up R/P x x -
M2
Sending end of OHL TX feeders shall follow the same philosophy as explained for
OHL feeders as per 2.1.59.4 above.
PD Trip shall actuate the PD IT relay located in R/P which shall send IT to remote
end. Both PD Trip and PD IT relays shall be high burden relays complying with Trip
relay specifications and immune to wiring capacitance discharge currents in DC E/F
conditions.
F50 OLTC Trip is not to be implemented, but only OLTC blocking is required.
Device No Description Eqpt B/S & CB L/O Relay Block Initiate Initiate IT to Initi
location B/C- K86 TC1 TC2 Main-1 Main-2 BBP close BFP AR oth ate
K86-1 K86-2 K500 CB (HV) er BFP
(HV&L side (LV)
V) (CB
TC-1
&
TC-
2)
HV side
87T-M1 Tx Diff-1 HV R/P -- x x To
TC-1
only
87N-HV HV REF HV R/P -- x x To
TC-1
only
51-HV HV O/C HV R/P -- x x To
TC-1
only
50 OLTC OLTC O/C (Only HV R/P -- - - -
for blocking OLTC)
86-1 L/O Relay Main-1 HV R/P -- x x x x x x
87T-M2 Tx Diff-2 HV R/P -- x x To
TC-2
only
86-2 L/O Relay Main-2 HV R/P -- x X x x x x
BBP BBP BBP R/P -- x x x
50BF-1 BFP Stage-1 BBP R/P -- x x
50BF-2 BFP Stage-2 BBP R/P -- x
86-BBP L/O Relay BBP BBP R/P -- x x x x x x
Pole Pole Discrepancy R/P -- -- -- x
Discrepancy Inter-Trip Relay
Inter-Trip Relay
(PD IT)
PD Trip Device PD Trip CB/LCC x x
LV side
86-1 L/O Relay Main-1 LV R/P -- x x x x x x
87N-LV LV REF LV R/P -- x x To
TC-2
only
WT (94WT) Separate Self LV R/P -- x
Reset Contact,
Hand reset
Mechanical flag
High Burden trip
relay
OT (94OT) Separate Self LV R/P -- x
Reset Contact,
Hand reset
Mechanical flag
High Burden trip
relay
PRV Trip Separate Self LV R/P -- x -- x -- -- To --
(94PRV)- Shall Reset Contact, TC-1
be provided on Hand reset only
LV R/P Mechanical flag
High Burden trip
relay
OLTC/MT Separate Self LV R/P -- x x To --
Buchholz Trip Reset Contact, TC-2
(94Buchholz)- Hand reset only
Shall be Mechanical flag
provided on LV High Burden trip
PD Trip shall actuate the PD IT relay located in R/P which shall send IT to other side.
Both PD Trip and PD IT relays shall be high burden relays complying with Trip relay
specifications and immune to wiring capacitance discharge currents in DC E/F
conditions.
F50 OLTC Trip is not to be implemented, but only OLTC blocking is required.
Device No Description Eqpt B/S & CB L/O Relay Block Initiate Initiate IT to Initi
location B/C- K86 TC1 TC2 Main-1 Main-2 BBP close BFP AR oth ate
K86-1 K86-2 K500 CB (HV) er BFP
(HV&L side (LV
V) (CB in
Tc-1 DOC
& relay
TC- )
2)
HV side
87T-M1 Tx Diff-1 HV R/P -- x x x
87N-HV HV REF HV R/P -- x x x
51-HV HV O/C HV R/P -- - x x x
50 OLTC (only OLTC O/C HV R/P -- - - -
to block OLTC)
86-1 L/O Relay Main-1 HV R/P -- x x x x x x
86-2 L/O Relay Main-2 HV R/P -- x x x x x x
BBP BBP BBP R/P -- x x x
50BF-1 BFP Stage-1 BBP R/P -- x x
50BF-2 BFP Stage-2 BBP R/P -- x
86BBP L/O Relay BBP BBP R/P -- x x x x x x
LV side
86-1 L/O Relay Main-1 LV R/P -- x x x x x
87N-LV LV REF LV R/P -- x x TC-1
WT (94WT) Separate Self LV R/P -- x
Reset Contact,
Hand reset
Mechanical flag
High Burden trip
relay
• In 11kV level, only one Trip coil is available in the Switchgear and hence
only one L/O trip relay is available in R/P.
• BFP element is incorporated in 11kV side DOC relay.
• SBEF 1st stage, BBP, BFP, LV O/C 1st stage etc will trip 11kV B/S CB A120
also.
• 11kV BBP and BFP shall trip Tx on HV and LV sides, 11kV B/S and all 11kV
feeders connected to the Faulty section. Also LV side of Station Aux Tx.
• 11kV feeders, Tx HV and LV, 11kV B/S etc shall close block on 11kV BBP
operation.
• 11kV BFP trip shall use the BBP trip bus.
• BFP in 11kV Incomers: This element shall get initiated by 11kV feeder Trip
relays, 11kV Incomer Trip relay, 11kV B/S Trip relay (BFP in both Incomers),
11kV BBP trip relay, Tx HV Trip relay, Tx HV level BBP Trip relay. On failure
of 11kV Incomer CB, this BFP element shall trip 11kV B/S, 11kV feeders and
Tx HV CB. This tripping can be achieved by connecting the trip from BFP
element to activate the 11kV BBP trip relay of the concerned Zone.
• BFP in 11kV B/S (A12): This element shall get activated by 11kV feeder Trip
relays and 11kV BBP Trip relays of both Zones (This is to activate the BFP
in 11kV B/S in the case of 11kV BBP trip. 11kV BBP is directly tripping the
CBs and hence no initiation of 11kV B/S BFP). After the set time delay, this
element will get operated and activate the Trip relay of A12 (86) bay to trip
11kV B/S CB only. If this CB fails to trip, the BFP element in 11kV Incomer
bays (both Incomers) will get activated (by 11kV B/S trip relay) and trip both
Bus bar along with Tx on both sides. The important matter to take care is to
trip only 11kV B/S CB on operation of BFP element in 11kV B/S bay. This is
particularly important to take care during the fault on 11kV feeders when one
Tx is out of service and both 11kV Bus bar sections are feeding by only one
Tx.
• In the case of IT to other side from the trip relay of the operating side, both
trip coils of the other side shall be connected to operate on Inter-trip so that
one Trip coil problem will not affect the IT.
F50 OLTC Trip is not to be implemented, but only OLTC blocking is required. On
11kV side, only one CB Trip coil is provided and hence only one 86 Trip relay.
2.1.59.7 Reactor
PD Trip shall actuate the PD IT relay located in R/P which shall send IT to remote
end. Both PD Trip and PD IT relays shall be high burden relays complying with Trip
relay specifications and immune to wiring capacitance discharge currents in DC E/F
conditions.
Device No Description Eqpt B/S & CB L/O Relay Block Initia Initia IT IT 415
locatio B/C- TC1 TC2 Main- Main- BBP close te te AR Sen se V
n K86 1 2 K50 CB BFP d-1 nd MC
K86-1 K86-2 0 -2 CB
Sending End
87L-M1 Cable Protection R/P -- x x --
Main-1
51-M1 O/C Main-1 R/P -- x x x
86-1 L/O Relay Main- R/P -- x x x x
1
87L-M2 Cable Protection R/P -- x x --
Main-2
51-M2 O/C Main-2 R/P -- x x x
86-2 L/O Relay Main- R/P -- x x x x
2
BBP BBP BBP -- x x x x x
R/P
50BF-1 BFP Stage-1 BBP -- x x
R/P
50BF-2 BFP Stage-2 BBP -- x x x
R/P
IT-1 IT Receive Main- R/P -- x
1
IT-2 IT Receive Main- R/P -- x
2
86BBP L/O Relay BBP BBP -- x x x x
R/P
Receiving End
87L-M1 Cable Protection HV R/P -- x x --
Main-1
87T-M1 Tx Diff-1 HV R/P -- x x x x
87N-HV HV REF HV R/P -- x x x x
51-HV HV O/C HV R/P -- x x x x
F50 OLTC OLTC O/C (only HV R/P --
for blocking
OLTC)
86-1 L/O Relay Main- LV R/P -- x x x x --
1
87L-M2 Cable Protection HV R/P -- x x --
Main-2
87T-M2 Tx Diff-2 HV R/P -- x x x x
87N-LV LV REF LV R/P -- x x x x
PRV Trip Separate Self LV R/P -- x x -- x x
(94PRV)- to Reset Contact,
be provided Hand reset
in LV R/P Mechanical flag
High Burden trip
relays
F50 OLTC Trip is not to be implemented, but only OLTC blocking is required.
(Note: If 33kV side only one Trip coil is available, the trip matrix shall be revised
accordingly to trip only one trip coil on 33kV side)
Device No Description Eqpt B/S & CB L/O Relay Block Initia Initi IT IT 415V
locatio B/C- TC1 TC2 Main- Main- BBP close te ate Send sen MCC
n K86 1 2 K500 CB BFP AR -1 d-2 B
K86-1 K86-2
Sending End
87L-M1 Protection R/P -- x x x
Main-1
Back up 67N- DEF Back up R/P x x x
M1
51-M1 O/C Main-1 R/P -- x x x
86-1 L/O Relay Main- R/P -- x x x x
1
87L-M2 Protection R/P -- x x x
Main-2
Back up 67N- DEF Back up R/P x x x
M2
51-M2 O/C Main-2 R/P -- x x x
86-2 L/O Relay Main- R/P -- x x x x
2
BBP BBP BBP -- x x x x x
R/P
50BF-1 BFP Stage-1 BBP -- x x
R/P
50BF-2 BFP Stage-2 BBP -- x x x
R/P
IT-1 IT Receive Main- R/P -- x
1
IT-2 IT Receive Main- R/P -- x
2
86-BBP L/O Relay BBP BBP -- x x x x
R/P
AR x x
unsuccessful
(after 1st shot)
Receiving End
87L-M1 Cable Protection HV R/P -- x x --
Main-1
87T-M1 Tx Diff-1 HV R/P -- x x x x
F87N-HV HV REF HV R/P -- x x x x
F51-HV HV O/C HV R/P -- x x x x
F50 OLTC OLTC O/C (ONLY HV R/P --
FOR BLOCKING
OLTC)
86-1 L/O Relay Main- LV R/P -- x x x x
1
87L-M2 Cable Protection HV R/P -- x x --
Main-2
87T-M2 Tx Diff-2 HV R/P -- x x x x
87N-LV LV REF LV R/P -- x x x x
PRV Trip Separate Self LV R/P -- x x x x
(94PRV)-to be Reset Contact,
provided in Hand reset
LV R/P Mechanical flag
High Burden trip
relays
OLTC/MT Separate Self LV R/P x x x x
If 33kV side only one trip coil provided, the trip matrix shall be revised accordingly.
F50 OLTC Trip is not to be implemented, but only OLTC blocking is required.
If 33kV side only one trip coil provided, the trip matrix shall be revised accordingly.
F50 OLTC Trip is not to be implemented, but only OLTC blocking is required.
Device No Description Eqpt B/S & CB L/O Relay Block Initiate Initiate IT to Initi
location B/C- K86 TC1 TC2 Main-1 Main-2 BBP close BFP AR oth ate
K86-1 K86-2 K500 CB (HV) er BFP
(HV&L side (LV
V) (CB in
Tc-1 DOC
& relay
TC- )
2)
HV side
87T-M1 Tx Diff-1 HV R/P -- x x x
87N-HV HV REF HV R/P -- x x x
51-M1 HV O/C HV R/P -- - x x x
50 OLTC OLTC O/C (for HV R/P --
blocking OLTC
only)
86-1 L/O Relay Main-1 HV R/P -- x x x x x x
87T-M2 Tx Diff-2 HV R/P -- x x x
86-2 L/O Relay Main-2 HV R/P -- x x x x x x
BBP BBP BBP R/P -- x x x
50BF-1 BFP Stage-1 BBP R/P -- x x
50BF-2 BFP Stage-2 BBP R/P -- x
86BBP L/O Relay BBP BBP R/P -- x x x x x x
LV side
86-1 L/O Relay Main-1 LV R/P -- x x x x x
87N-LV LV REF LV R/P -- x x TC-1
WT (94WT) Separate Self LV R/P -- x
Reset Contact,
Hand reset
Mechanical flag
High Burden trip
relay
OT (94OT) Separate Self LV R/P -- x --
Reset Contact,
Hand reset
Mechanical flag
High Burden trip
relay
PRV Trip Separate Self LV R/P -- x x TC-1
(94PRV)-to be Reset Contact,
provided in LV Hand reset
R/P Mechanical flag
High Burden trip
relay
OLTC/MT Separate Self LV R/P x x TC-2
Buchholz Trip Reset Contact,
(94Buchholz)-to Hand reset
be provided in Mechanical flag
LV R/P High Burden trip
relay
LV DOC (67LV) LV R/P -- x -- x -- TC-2
SBEF Stage-1 SBEF Stage-1 LV R/P x
SBEF Stage-2 SBEF Stage-2 LV R/P -- x x TC-2
-- -- -- -- -- -- -- -- -- -- -- -- -- --
BBP BBP BBP R/P -- x
-- -- -- -- -- -- -- -- -- --- --- -- -- --
50BF (in LV BFP LV R/P -- x
DOC)
86BBP L/O Relay BBP BBP R/P x x x x x x
-- -- -- -- -- -- -- -- -- -- -- -- -- --
LV O/C & E/F Stage-1 LV R/P x
(applicable to
132/11, 66/11
• In 11kV level, only one Trip coil is available in the Switchgear and hence
only one L/O trip relay is available in R/P.
• BFP element is incorporated in 11kV side DOC relay.
• SBEF 1st stage, BBP, BFP, LV O/C 1st stage etc will trip 11kV B/S CB A120
also.
• 11kV BBP and BFP shall trip Tx on HV and LV sides, 11kV B/S and all 11kV
feeders connected to the Faulty section. Also LV side of Station Aux Tx.
• 11kV feeders, Tx HV and LV, 11kV B/S etc shall close block on 11kV BBP
operation.
• 11kV BFP trip shall use the BBP trip bus.
• BFP in 11kV Incomers: This element shall get initiated by 11kV feeder Trip
relays, 11kV Incomer Trip relay, 11kV B/S Trip relay (BFP in both Incomers),
11kV BBP trip relay, Tx HV Trip relay, Tx HV level BBP Trip relay. On failure
of 11kV Incomer CB, this BFP element shall trip 11kV B/S, 11kV feeders and
Tx HV CB. This tripping can be achieved by connecting the trip from BFP
element to activate the 11kV BBP trip relay of the concerned Zone.
Device No Description Equipment CB K86 Block Initiate IT Send to 415V
location Trip close BFP MCCB
coil CB
(11kV)
51/50/51N HV O/C R/P - x - - -
415V REF LVAC REF R/P x - - -
86 L/O Relay R/P x - X X x
• BFP in 11kV B/S (A12): This element shall get activated by 11kV feeder Trip
relays and 11kV BBP Trip relays of both Zones (This is to activate the BFP in
11kV B/S in the case of 11kV BBP trip. 11kV BBP is directly tripping the CBs and
hence no initiation of 11kV B/S BFP). After the set time delay, this element will
get operated and activate the Trip relay of A12 bay to trip 11kV B/S CB only.
If this CB fails to trip, the BFP element in 11kV Incomer bays (both
Incomers) will get activated (by 11kV B/S trip relay) and trip both Bus bar
along with Tx on both sides. The important matter to take care is to trip only
11kV B/S CB on operation of BFP element in 11kV B/S bay. This is
particularly important to take care during the fault on 11kV feeders when one
Tx is out of service and both 11kV Bus bar sections are feeding by only one
Tx.
• In the case of IT to other side from the trip relay of the operating side, both
trip coils of the other side shall be connected to operate on Inter-trip so that
one Trip coil problem will not affect the IT.
F50 OLTC Trip is not to be implemented, but only OLTC blocking is required.
On 11kV side, only one CB Trip coil is provided and hence only one 86 Trip relay.