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Irfp3206Pbf: V 60V R Typ. 2.4M: Max. 3.0M: I 200A C I 120A
Irfp3206Pbf: V 60V R Typ. 2.4M: Max. 3.0M: I 200A C I 120A
IRFP3206PbF
HEXFET® Power MOSFET
Applications D VDSS 60V
l High Efficiency Synchronous Rectification in SMPS
l Uninterruptible Power Supply
RDS(on) typ. 2.4m:
l High Speed Power Switching max. 3.0m:
l Hard Switched and High Frequency Circuits G ID (Silicon Limited) 200A c
Benefits S ID (Package Limited) 120A
l Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness D
l Fully Characterized Capacitance and Avalanche
SOA
l Enhanced body diode dV/dt and dI/dt Capability S
D
l Lead-Free G
TO-247AC
G D S
Gate Drain Source
Avalanche Characteristics
EAS (Thermally limited) Single Pulse Avalanche Energy e 170 mJ
IAR Avalanche Currentd See Fig. 14, 15, 22a, 22b, A
EAR Repetitive Avalanche Energy g mJ
Thermal Resistance
Symbol Parameter Typ. Max. Units
RθJC Junction-to-Case j ––– 0.54
RθCS Case-to-Sink, Flat Greased Surface 0.24 ––– °C/W
RθJA Junction-to-Ambient j ––– 40
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IRFP3206PbF
Diode Characteristics
Symbol Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 200c A MOSFET symbol D
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 75A, VGS = 0V g
trr Reverse Recovery Time ––– 33 50 ns TJ = 25°C VR = 51V,
––– 37 56 T J = 125°C I F = 75A
Qrr Reverse Recovery Charge ––– 41 62 nC TJ = 25°C di/dt = 100A/μs g
––– 53 80 TJ = 125°C
IRRM Reverse Recovery Current ––– 2.1 ––– A TJ = 25°C
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Calculated continuous current based on maximum allowable junction ISD ≤ 75A, di/dt ≤ 360A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
temperature. Bond wire current limit is 120A. Note that current
Pulse width ≤ 400μs; duty cycle ≤ 2%.
limitations arising from heating of the device leads may occur with Coss eff. (TR) is a fixed capacitance that gives the same charging time
some lead mounting arrangements. as Coss while VDS is rising from 0 to 80% VDSS.
Repetitive rating; pulse width limited by max. junction Coss eff. (ER) is a fixed capacitance that gives the same energy as
temperature. Coss while VDS is rising from 0 to 80% VDSS..
Limited by TJmax, starting TJ = 25°C, L = 0.023mH Rθ is measured at TJ approximately 90°C
RG = 25Ω, IAS = 120A, VGS =10V. Part not recommended for use
above this value .
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IRFP3206PbF
1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V
8.0V 8.0V
6.0V 6.0V
5.5V 5.5V
5.0V 5.0V
4.8V 4.8V
BOTTOM 4.5V BOTTOM 4.5V
100 100
4.5V
100 2.0
TJ = 175°C
(Normalized)
10
1.5
TJ = 25°C
1
1.0
VDS = 25V
≤ 60μs PULSE WIDTH
0.1
2.0 3.0 4.0 5.0 6.0 7.0 8.0 0.5
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature (°C)
12000 20
VGS = 0V, f = 1 MHZ ID= 75A
Ciss = Cgs + Cgd, Cds SHORTED
VDS = 48V
VGS, Gate-to-Source Voltage (V)
8000
Ciss 12
6000
8
4000
4
2000 Coss
Crss 0
0
0 40 80 120 160 200
1 10 100
QG Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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IRFP3206PbF
1000 10000
OPERATION IN THIS AREA
LIMITED BY R DS (on)
1000
TJ = 175°C
100
1msec 100μsec
100
10 TJ = 25°C
10msec
10
1
1 Tc = 25°C
Tj = 175°C DC
VGS = 0V Single Pulse
0.1 0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0.1 1 10 100
160
70
120
65
80
40 60
0
55
25 50 75 100 125 150 175
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
TC , Case Temperature (°C)
TJ , Junction Temperature (°C)
Fig 9. Maximum Drain Current vs. Fig 10. Drain-to-Source Breakdown Voltage
Case Temperature
2.0 800
EAS, Single Pulse Avalanche Energy (mJ)
ID
TOP 21A
33A
1.5 600 BOTTOM 120A
Energy (μJ)
1.0 400
0.5 200
0.0 0
0 10 20 30 40 50 60 25 50 75 100 125 150 175
Fig 11. Typical COSS Stored Energy Fig 12. Maximum Avalanche Energy Vs. DrainCurrent
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IRFP3206PbF
1
0.1 0.20
0.10
0.05
0.02 R1 R2 R3
Ri (°C/W) τι (sec)
0.01 R1 R2 R3
0.01 τJ τC
τJ
τ1
τ 0.11493 0.0001
τ2 τ3
τ1 τ2 τ3
0.218028 0.001262
SINGLE PULSE Ci= τi/Ri
Ci= τi/Ri 0.206197 0.011922
0.001 ( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006 1E-005 0.0001 0.001 0.01 0.1
0.05
0.10
10
tav (sec)
160
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
120
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
80 6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
40 tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
0
25 50 75 100 125 150 175 PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
Starting TJ , Junction Temperature (°C)
EAS (AR) = PD (ave)·tav
4.0 ID = 1.0mA
ID = 250μA 14
3.5
ID = 150μA
12
IRRM - (A)
3.0
10
2.5 8
6
2.0 IF = 30A
4 VR = 51V
1.5 TJ = 125°C
2
TJ = 25°C
1.0 0
-75 -50 -25 0 25 50 75 100 125 150 175 100 200 300 400 500 600 700 800 900 1000
Fig 16. Threshold Voltage Vs. Temperature Fig. 17 - Typical Recovery Current vs. dif/dt
18 350
16
300
14
250
12
QRR - (nC)
IRRM - (A)
10 200
8 150
6
IF = 45A 100 IF = 30A
4 VR = 51V VR = 51V
TJ = 125°C 50 TJ = 125°C
2
TJ = 25°C TJ = 25°C
0 0
100 200 300 400 500 600 700 800 900 1000 100 200 300 400 500 600 700 800 900 1000
Fig. 18 - Typical Recovery Current vs. dif/dt Fig. 19 - Typical Stored Charge vs. dif/dt
350
300
250
QRR - (nC)
200
150
100 IF = 45A
VR = 51V
50 TJ = 125°C
TJ = 25°C
0
100 200 300 400 500 600 700 800 900 1000
dif / dt - (A / μs)
VGS=10V *
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance D.U.T. ISD Waveform
Current Transformer
+
Reverse
Recovery Body Diode Forward
-
+ Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD
Ripple ≤ 5% ISD
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V(BR)DSS
15V
tp
L DRIVER
VDS
RG D.U.T +
V
- DD
IAS A
VGS
20V
tp 0.01Ω
I AS
Fig 22a. Unclamped Inductive Test Circuit Fig 22b. Unclamped Inductive Waveforms
LD
VDS VDS
90%
+
VDD -
D.U.T 10%
VGS VGS
Pulse Width < 1μs
Duty Factor < 0.1% td(on) tr td(off) tf
Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms
Current Regulator Id
Same Type as D.U.T. Vds
Vgs
50KΩ
12V .2μF
.3μF
+
V
D.U.T. - DS
Vgs(th)
VGS
3mA
IG ID
Current Sampling Resistors Qgs1 Qgs2 Qgd Qgodr
Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform
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IRFP3206PbF
TO-247AC Package Outline
Dimensions are shown in millimeters (inches)
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 03/08
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