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Calibration Techniques in Adcs: Ahmed M. A. Ali Analog Devices, Inc
Calibration Techniques in Adcs: Ahmed M. A. Ali Analog Devices, Inc
Ahmed M. A. Ali
Analog Devices, Inc.
Continuous-time Discrete-time
Continuous-amplitude Discrete-amplitude
x(t) xq[n]
ADC
Analog Digital
Realm Realm
x(t) xq[n]
DAC
Wireless Communication
Defense
Medical
Wired Communication
Satellite
Instrumentation
Video Automative
IoT Radar
Ahmed Ali Calibration Techniques in ADCs 5
Data Converters (Multi-Disciplinary)
x(t) xq[n]
Analog Circuit Design ADC Digital Circuit Design
x(t) xq[n]
Amplitude
xq[n]
ADC
Δ x(t)
x[n]
ADC Output =
Step Size Δ
Where:
[x] is the integer value closest
to x
N is the number of bits Vin
-VRef VRef
Vin is the analog input signal
VRef is the ADC reference
voltage
Usually in fully differential Quantization
ADCs: Error
dB
• SNR (dBFS) = 10log(ADC FS Power /
Noise Power) Noise +
• SINAD/SNDR (dBFS) = 10log(ADC
Distortion
FS Power / (Noise + Distortion
Power))
Signal Power
𝑆𝐹𝐷𝑅(dBc) = 10 log
Worst Harmonic or Spur Power
dB
Frequency
Shown:
• Offset = 0
• Gain error = 0
• DNL = 0
• INL = 0
8
64000
Output (Code) Codes
Error LSB
(LSB)
-8
2
Output (Code) 16000
Codes
Error
LSB
(LSB)
-2
Accuracy
not
critical
8
64000
Output (Code) Codes
Error
LSB
(LSB)
n1~3, n~13
SFDR~6n+3n1~87dB*
-8
* H. Pan and A.A. Abidi, ‘‘Spectral Spurs due to Quantization in Nyquist ADCs,’’ IEEE Trans. Circuits and Systems-I: Regular
Papers, 51(8), pp. 1422–1438, August 2004.
Ahmed Ali Calibration Techniques in ADCs 23
Example: FFT with IGE Errors [1]
SNR~75dB, SFDR~86dB
Hz
SFDR
dB
-86dB
n1~3, n~13
SFDR~6n+3n1~87dB
n1~3, n~13
SFDR~6n+3n1~87dB
* A.M.A. Ali, High speed data converters, Institution of Engineering and Technology (IET), London, UK, 2016.
Ahmed Ali Calibration Techniques in ADCs 25
Effect of INL Sawtooth Error on SFDR*
At -6dBFS, SFDR ~ 84dB
n1~2, n~13
SFDR~6n+3n1~84dB
* A.M.A. Ali, High speed data converters, Institution of Engineering and Technology (IET), London, UK, 2016.
Ahmed Ali Calibration Techniques in ADCs 26
Effect of INL Sawtooth Error on SFDR*
At -18dBFS, SFDR ~ 78dB
n1~0, n~13
SFDR~6n+3n1~78dB
* A.M.A. Ali, High speed data converters, Institution of Engineering and Technology (IET), London, UK, 2016.
Ahmed Ali Calibration Techniques in ADCs 27
First Stage Residue with Stage DAC Error
In pipeline and
pipe-SAR ADCs
Due to non-
idealities in the
stage DAC
Leads to breaks
in the transfer
characteristics
In pipeline and
pipe-SAR ADCs
Due to non-
idealities in the
stage DAC
Leads to breaks
in the transfer
characteristics
Error
(LSB)
Harmonic distortion is
generated in the frontend
Codes
Error
(LSB)
4.5 LSB
Error
-4.5 LSB
dB
-75dB
Convergence time
Manufacturability
k1 bits
MSBs
MDAC1
k2 bits
D1 D2 Dn
D(Vo1) D(Vo2)
G1-1 G2-1 Gn-1-1
D(Vin)=Dout
Digital Error Correction
N bits
Error
Sample-and-hold impairments:
Kick-back errors
Front-end non-linearity
Interleaving impairments:
Offset and gain mismatch errors
-4.5 LSB
BW/timing mismatch errors
INL Plot
dB
Front-end non-linearity -75dB
Interleaving impairments:
Offset and gain mismatch errors
BW/timing mismatch errors
Uncorrelated
Buffer
Vin + + kn-bit
G1 S/H G2
ADC
- -
kn bits
k1-bit k1-bit G1 = 2 k1-1 k2-bit k2-bit G2 = 2 k2-1 LSB
ADC DAC ADC DAC
k1 bits
MSBs
MDAC1
k2 bits
N bits
φ1a
Ahmed Ali Calibration Techniques in ADCs 49
The IGE/IME Calibration [15, 2, 10, 11]
-VRef
Dither is injected in the MDAC D’.φ2
x8 Cf=2C
It encounters the IGE and IME φ1 Ci=C x8
Vin
errors Vout
Correlation is used in the digital D.φ2
φ1a φ1
x8
domain to estimate the errors
Mismatches between the dither VRef
path and the signal path can limit
accuracy Ddith’.φ2
-VRef
Ahmed Ali Calibration Techniques in ADCs 50
The IGE/IME Calibration [15, 2, 10, 11]
• IGE: k=0, IME: k>0
• Estimation (for each k separately):
𝐺𝑒 [𝑛 + 1] = 𝐺𝑒 [𝑛] +
𝜇 × 𝐷 [𝑛 − 𝑘] × (𝐷 𝑛 − 𝐷 𝑛 − 𝑘 × 𝐺𝑒 −𝐷 𝑛 )
• BG Correction:
𝐷 _ 𝑛 =𝐷 𝑛 − (𝐷 [𝑛 − 𝑘] × 𝐺𝑒 ) − 𝐷 𝑛
• FG Correction:
𝐷 _ _ [𝑛] = 𝐷 _ [𝑛] × 𝐺𝑒 LMS: Least Mean Square Algorithm
x8 Cf = 2C
D’.φ2
The kick-back dither
φ1 Ci = C x8
caps kick the input Vin
Vout
similar to the sampling φ1a φ1
capacitances’ kick D.φ2 x8
VRef
The dither’s kick is
sampled on the total D_dith’.φ2
capacitances and φ1 Cd
4.5 LSB
Error
-4.5 LSB
4.5 LSB
1.5 LSB
Error
-1.5 LSB
-4.5 LSB
dB
-75dB
dB
-75dB
Δ4
Δ3
Δ2
Δ1
Input Input
Δ1
Δ2
Δ3
Δ4
Δ4
Δ3
Δ3 Δ2
Δ2
Δ1
Δ1 Input Input
Δ5
Δ6 Δ4
Δ7 Δ5
Δ6
Δ8
Normalized Output
-Dinsp
intervals to estimate the
error
Calibrates harmonic
distortion
Normalized Input 1
-1
Ahmed Ali Calibration Techniques in ADCs 64
Dither-based Non-linearity Calibration [5]
+/−𝑉 , 0 +/−𝑉 , 0
𝑦 =𝑓 𝑥+𝑉 −𝑉
𝑦 =𝑓 𝑥−𝑉 +𝑉 𝑦
Error = y1 - y2
Use thresholded LMS-
Normalized Output
like counting/correlation Dinsp
over half-bounded open
intervals to estimate the
error
Calibrates INL breaks
Normalized Input
Ahmed Ali Calibration Techniques in ADCs 65
Estimation of Non-linear Coefficients [5]
𝐷 =𝑓 (𝐷 )
𝐷 =∝ 𝐷 + ∝ _ · 𝑓𝑙 = 𝑠𝑢𝑏( )
∝ 𝑛 + 1 =∝ 𝑛 − 𝜇 × 𝜀
3rd order NL
Normalized Output
2nd order NL
𝜀 −𝐷 /
𝜀 𝐷 /
𝜀 𝐷 /
Output-dither
Output-dither
Output-dither
for subrange n
FS/2 Dinsp_8
► Red: Dd>0 Dinsp_7
Output-Dither
1 2 3 4 5 6 7 8 9
Flash Code (sub-range)
Ahmed Ali Calibration Techniques in ADCs 69
Example of DAC/Ref Non-linearity Calibration