Tutorial

Chap 7
Microprogrammed Control

1
Prob 7-5
• The system shown in Fig. 7-2 uses a control memory of 1024 words of
32 bits each. The microinstruction has three fields as shown In the
diagram. The microoperations field has 16 bits.
• a. How many bits are there in the branch address field and the select
field?
• b. If there are 16 status bits in the system, how many bits of the
branch logic are used to select a status bit?
• c. How many bits are left to select an input for the multiplexers?

2
3
Prob 7-5:
• Solution:
• Control memory = 210 × 32
• a)

• b) 4 bits
• c) 2bits

4
Prob 7-6
• The control memory in Fig. 7-2 has 4096 words of 24 bits each.
• a. How many bits are there in the control address register?
• b. How many bits are there in each of the four inputs shown going
into the multiplexers?
• c. What are the number of inputs in each multiplexer and how many
multiplexers are needed?

5
Prob 7-6
• Solution:
• Control memory = 212 × 24
• (a) 12 bits
• (b) 12 bits
• (c) 12 multiplexers, each of size 4-to-1 line.

6
Prob 7-8:
• Formulate a mapping procedure that provides eight consecutive
microinstructions for each routine.
• The operation code has six bits and the control memory has 2048
words.
• Solution:
• opcode = 6 bits
• control memory
• address = 11 bits

7
8
Prob 7-11:
• Using Table 7-1 , give the 9-bit
microoperation field for the
following microoperations:
• a. AC  AC + 1 , DR  DR + 1
• b. PC  PC + 1 , DR  M [AR]
• c. DR  AC, AC  DR
• Solution:

F1 F2 F3
(a) 011 110 000 INCAC INCDR NOP
(b) 000 100 101 NOP READ INCPC
(c ) 100 101 000 DRTAC ACTDR NOP 9
 Prob 7-12:
• Using Table 7-1 , convert the following symbolic microoperations to register
transfer statements and to binary.
• a. READ, INCPC
• b. ACTDR, DRTAC
• c. ARTPC, DRTAC, WRITE
• Solution:
• (a) READ DR ← M[AR] F2 = 100
• INCPC PC ← PC + 1 F3 = 101
• (b) ACTDR DR ← AC F2 = 101
• DRTAC AC ← DR F1 = 100
• (c) ARTPC PC ← AR F3 = 110
• DRTAC AC ← DR F1 = 100 Impossible.
• WRITE M[AR] ← DR F1 = 111 Both use F1
10
11
12
Prob 7-14:
• The following is a symbolic microprogram for an instruction in the computer defined in Sec. 7-3.
• O R G 40
• NOP S JMP FETCH
• NOP Z JMP FETCH
• NOP I CALL INDRCT
• A R T P C U JMP FETCH
• a. Specify the operation performed when the instruction is executed.
• b. Convert the four microinstructions into their equivalent binary form.
• Solution:
• (a) Branch if S = 0 and Z = 0 (positive and non-zero AC)
• (b) 40 : 000 000 000 10 00 1000000
• 41 : 000 000 000 11 00 1000000
• 42 : 000 000 000 01 01 1000011
• 43 : 000 000 110 00 00 1000000
13
Prob 7-16:
• Add the following instructions to the computer of Sec 7-3 (EA is the
effective address).
• Write the symbolic microprogram for each routine as in Table 7-2.
• (Note that AC must not change in value unless the instruction specifies a
change in AC. )

14
15
16
17
Prob 7-18:
• Write the symbolic microprogram routines for the BSA (branch and
save address) instructions defined in Chap. 5 (Table 5-4).
• Use the microinstruction format of Sec. 7-3. Minimize the number of
microinstructions.

18
Prob 7-18:
• Solution:

BSA: NOP I CALL INDRCT

PCTDR, ARTPC U JMP NEXT
WRITE, INCPC U JMP FETCH

19
Prob 7-20:
• Show how a 9-bit microoperation field in a microinstruction can be
divided into subfields to specify 46 microoperations.
• How many microoperations can be specified in one microinstruction?

20
Prob 7-20:
• Solution:
• A field of 5 bits can specify 25–1 = 31 microoperations
• A field of 4 bits can specify 24–1 = 15 microoperations
• 9 bits 46 microoperations

• 2 microoperations per microinstruction.

21
Prob 7-23:
• Design a 7-bit combinational circuit incrementer for the
microprogram sequencer of Fig. 7-8 (see fig. 4-8).
• Modify the incrementer by including a control input D.
• When D = 0, the circuit increments by one, but when D = 1, the circuit
increments by two.

22
Prob 7-23:
• Solution:

23
Prob 7-24:
• Insert an exclusive-OR gate
between MUX 2 and the lnput
logic of fig. 7-8. One input to
the gate comes from the test
output of the multiplexer. The
other Input to the gate comes
from a bit labeled P (for
polarity) in the microinstruction
from control memory. The
output of the gate goes to the
input T of the input logic. What
does the polarity control P
accomplish?

24
Prob 7-24:
• Solution:
• P is used to determine the polarity of the selected status bit.
• When P = 0, T = G, because G ⊕ 0 = G
• When P = 1, T = G’, because G ⊕ 1 = G'
• Where G is the value of the selected bit in MUX 2.

25