MALABAR COLLEGE OF ENGINEERING AND TECHNOLOGY

SECOND SEMESTER M TECH MODEL TEST, JUNE 2015

EAC10 201: DIGITAL SYSTEM DESIGN

Time: : 2 hours Max.Marks:60

Answer one question from each module

MODULE II

1(a) Design a modulo-8 counter (10)

(b) Minimize the given state table (10)

2(a) Explain state assignment problem. (10)

(b) Design a circuit that has an input w and an output z. The machine is a sequence detector that
produces z=1 when the previous two values of w were 00 or 11 otherwise z=0. (10)
MODULE III
3(a) With neat sketch explain explain ALTERA flex 10k (12)
(b) Explain in detail 22V10 PLD device (8)
4(a) Explain the different blocks of a Xilinx FPGA. (10)
(b) With neat sketch explain explain ALTERA MAX 7000 (10)

MODULE IV
5. Explain in detail BIST architecture (20)
6(a) Distinguish between different fault models. (10)
(b) Write short notes on fault tolerance methods and fault equivalence. (10)