MALABAR COLLEGE OF ENGINEERING AND TECHNOLOGY

SEVENTH SEMESTER B TECH INTERNAL TEST, NOVEMBER 2014

EC09 704: DIGITAL SYSTEM DESIGN

Time: 1 hour Max.Marks:50

PART A

Answer all questions

1. Distinguish between fundamental mode and pulsed mode.

2. Write short note on behavioural model.
3. What are the different types of delays in VHDL?
4. Write short note on macrocell.

(4x5=20 marks)

PART B

Answer any three

5. Explain state diagram, transition diagram, exploiting next state entries

6. What are identifiers, data objects and data types?
7. With block diagram explain XC4000
8. With block diagram explain 22V10

(3x10=30marks)