C1.

Digital Signal Processors

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 Introduction
• Why process signals digitally?
• Definition of a real-time application.
• Why use Digital Signal processing processors?
• What are the typical DSp algorithms?
• Parameters to consider when choosing a DSP processor.
• Main Architectural Features of DSPs
• DSP market
• Texas Instruments’ TMS320 family.

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 Why use digital signal processing?

•Analog signal processing is achieved by using analogue

components such as:
✓Resistors.
✓ Capacitors.
✓ Inductors.

•The inherent tolerances associated with these components,

temperature, voltage changes, components agging and
mechanical vibrations can dramatically affect the effectiveness of
the analog circuit.

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 Why use digital signal processing?

With DSP it is easy to:

• Change applications
• Correct applications
• Update applications
•Duplicate/reproduce applications

DSP reduces:
• Noise susceptibility
• Chips number
• Development time
• Cost
• Power consumption

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 Why NOT use digital signal processing?

•High frequency signals cannot be processed digitally due of two

reasons:

✓Analog to Digital Converters, ADC cannot work fast enough

✓The application can be too complex to be performed in real-time

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 Real-time processing

• DSP processors have to perform tasks in real-time, so how do

we define real-time?
• The definition of real-time depends on the application

• Example: a 100-tap FIR filter is performed in real-time if the

DSP can perform and complete the following operation
between two samples read:

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 Real-time processing

•We can say that we have a real-time application if:

Waiting Time ≥ 0
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 What are the typical DSP algorithms?

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•The Sum of Products (SOP) is the key element in most DSP algorithms !!!
 Hardware vs. Microcode multiplication

• DSP processors are optimized to perform multiplication and

addition operations.
• Multiplication and addition are done by hardware in one cycle.
• Example: 4-bit multiply (unsigned).

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 What is special for DSP?
• DSP = A class of microprocessors optimized for DSprocessing
• DSP have advantage in speed, cost and energy efficiency

• DSPs tend to be used for 1 program, not many programs.

– Hence OSs are much simpler, there is no virtual memory, protection,..
• DSPs sometimes run hard real-time apps (computational intensive)
– You must account for anything that could happen in a time slot
– All possible interrupts or exceptions must be accounted for and their
collective time be subtracted from the time interval (Interrupt handling:
the interrupts or exceptions reduce the time for computation)
– Therefore, exceptions are BAD !

• DSPs have an infinite continuous data stream to process in

time slots from the environment
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(e.g. audio processing with 48 KHz sampling rate)
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 What is special for DSP?

• The “MIPS/MFLOPS” of DSPs is speed of Multiply-Accumulate (MAC)

– DSP are judged by whether they can keep the multipliers busy 100% of the time.

• The "SPEC" of DSPs are 4 algorithms:

– Inifinite Impulse Response (IIR) filters
– Finite Impulse Response (FIR) filters
– FFT, and
– convolvers

• In DSPs, algorithms are king!

– Binary compatibility not an issue

• Software is not (yet) king in DSPs.

– People still write in assembly language for a product to minimize the die area
for ROM in the DSP chip.

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 What is special for DSP?

➢DSP architectures are molded by DSP algorithms

➢Fast Multipliers
➢Multiple Execution Units
➢Efficient Memory Access
➢Data Format
➢Efficient Zero-Overhead Looping
➢Streamlined I/O
➢Specialized Instruction Sets

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➢ Fast Multipliers: Main operations: multiply & add

-Multiplication is one of the most common operations in signal

processing (convolution, FIR/IIR filtering, FFTransform...)

-Need fast multipy-accumulate operations shift, multiply and add

in a loop. Each require one or more cycle.

-Need to develope special hardware for multiplication

1982- Texas Instruments(TMS32010) (in a single clock cycle)

-All modern DSP processors include at least one or more

“dedicated, single-cycle multiplier” or combined multiply-
accumulate unit (MAC).

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➢ Multiple Execution Units

• Need to perform high computational tasks:

- In real time
- e.g. Filtering signals with 10-100KHz sampling rate in real time
• Several independent execution units required
- Should operate in parallel
- e.g. Arithmetic Logic Unit (ALU), a shifter in parallel to
MAC units

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➢ Efficient Memory Access

Executing a MAC in a single cycle means:

→ Fetching the MAC instruction in a single cycle
→ Fetching a data sample in a single cycle
→ Fetching a filter coefficient in a single cycle
So, good performance requires high memory bandwidth!

Commonly used approach:

- Use two or more separate memory banks:

-Each have its own bus

-Each could be read/written during every cycle

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➢ Efficient Memory Access

More optimized DSP processors

General purpose processors

SISD (von Neumann)

Bus

OR

HARVARD
Early DSP processors

HARVARD modified
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➢ High memory bandwidth requirement
✓ Support via dedicated hardware for calculating memory addresses:
→ Address Generation Units
✓ In DSP algorithms memory access is very predictable
E.g: FIR filter: coefficients accessed sequentially

✓ Use:
1. Register indirect addressing with post increment
➢ Increment address pointer where repetitive computations are
performed on a series of data.
2. Circular Addressing
➢ Allows processor to access data sequentially and then automatically
wrap around to the beginning address

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➢ Data Format
✓ DSP algorithms generally use floating point formats
✓ Fixed point processors are:
➢ Cheaper and less power consuming
✓ Floating point formats require more complex hardware
✓ Use shortest data word width that will provide adequate accuracy
➢ Consider the cost & energy consumption

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➢ Data Format:
• Most fixed point DSP processors use 16 bit data words.
– Sufficient for many applications
• Some use 20, 24 or 32 bit data word for better accuracy
• Most DSP processors include one or more accumulator regs
• Accumulator Registers:
– wider than other registers
– Provide extra guard bits to avoid overflow

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➢ Efficient Zero Overhead Looping
• DSP algorithms have many loops:
– Use efficient looping
• Special loop: Zero Overhead Looping
– No loop counter
– No branching back to the top of the loop

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➢ Streamlined (simplified) I/O:
• Specialized serial or parallel I/O interfaces
• Streamlined I/O handling mechanisms
• E.g.:
- Low overhead interrupts
- Direct memory access, DMA.
– Synchronous serial ports
– Parallel ports
– Timers
– On-chip A/D, D/A (AICs, CODECs)
– Host ports
– Bit I/O ports
– On-chip DMA controller
– Clock generators
– On-chip peripherals often designed for “background” operation, even
when core is powered down.
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➢ Specialized Instruction Sets
• Two goals in instruction sets:
1. Make maximum use of hardware, increase efficiency
• Programmer can specify parallel operations in single instruction
2. Minimize memory space required to store DSP programs.
(Memory is a cost!)
• Keep inst.s short.
→ Use mode bits rather than encoding
→ Restrict operations to specific registers
→ Restrict operation combinations in the inst.
• This makes DSP instructions complicated!!

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➢ Specialized Instruction Sets
• DSPs aren’t usually programmed in HLL: C,C++..etc
• Program optimization is essential
– Programmer should optimize code in assembly level
• More easier inst. Set is, more desirable it is for programmer.

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Applications Development

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 Choosing a DSP Processor

• Theright DSP depends on the application; a good choice for

one application might be a poor choice for another.

• Some useful criteria for choosing a DSP are:

- arithmetic format (fixed point or float point)
- data width
- speed
- memory organization
- ease of development (IDE,..)
- multiprocessor support
- power consumption
- cost
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 Main Architectural Features of DSPs

- Data path configured for DSP

• Fixed-point arithmetic
• MAC- Multiply-accumulate
- Multiple memory banks and buses
• Harvard Architecture
• Multiple data memories blocks
- Specialized addressing modes
• Bit-reversed addressing
• Circular buffers
- Specialized instruction set and execution control
• Zero-overhead loops
• Support for MAC
- Specialized peripherals for DSP
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Compound Annual Growth Rate = CAGR 31
 Different Needs? Multiple Families!

’C6000
(’C62x, ’C67x)

’C5000 ‘C3x ‘C4x ‘C8x

(’C54x)
Maximum Performance
‘C5x Multi-Channel / Function
’C2000 • Comm Infrastructure
(’C20x,’C24x)
Best MIPS per: • xDSL
‘C1x ‘C2x Watt / Dollar/ Size
• Imaging, Video
• Wireless Telephones
Lowest Cost • Modems / Telephony
Control Systems
• VoIP
•Storage
•Motor Control
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 Architectures for developing DSp applications
– ASIC (Application Specific Integrated Circuit)
• circuit integrat elaborat pentru a deservi o aplicatie particulara, bine precizata
• costul implementarii acceptabil in cazul aplicatiilor de serie mare, care fac posibila
amortizarea costului relativ ridicat al proiectarii

– FPGA (Field Programmable Gate Array)

• dispozitiv electronic continand componente logice si conexiuni programabile
Programarea functionalitatii se face dupa fabricare, de catre utilizator
• solutia utilizind FPGA este mai lenta, nu suporta aplicatii la fel de complexe iar
consumul de la sursa de alimentare este mai ridicat, Prezinta flexibilitate ridicata,
Costuri de implementare competitive la serii mici

– ASSP (Application-specific Standard Products )

• circuit integrat care implementeaza o functie specifica si care prezinta interes
pentru o clasa larga de utilizatori.

– GPP (General Purpose Processors)

– DSP 37
DSP Application – Mobile Phone

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