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Chapter 07 PAM
Chapter 07 PAM
Chapter 07 PAM
Computer Fundamentals:
Fundamentals: Pradeep
Pradeep K.
K. Sinha
Sinha &
& Priti
Priti Sinha
Sinha
Learning Objectives
Cache
Memory
Accumulato
Decode r register
r I/
Program General- O
control register purpose register
D
Instruction General- E
register purpose V
register I
Memory
address register C
E
Memory buffer
S
register
Input/Output
register
General- General-purpose
purpose register register
Instruction Set
Registers
Sr.
Name of Register Function
No.
Holds address of the active memory
1 Memory Address (MAR)
location
Holds contents of the accessed
2 Memory Buffer (MBR)
(read/written) memory word
Holds address of the next instruction to
3 Program Control (PC)
be executed
Holds data to be operated upon,
4 Accumulator (A)
intermediate results, and the results
Holds an instruction while it is being
5 Instruction (I)
executed
Used to communicate with the I/O
6 Input/Output (I/O)
devices
Processor Speed
Types of Processor
Type of
Features Usage
Architecture
§ Large instruction set
CISC (Complex § Variable-length instructions Mostly used in
Instruction Set § Variety of addressing modes personal
Computer) § Complex & expensive to computers
produce
§ Small instruction set
RISC (Reduced
§ Fixed-length instructions Mostly used in
Instruction Set
§ Reduced references to workstations
Computer)
memory to retrieve operands
Types of Processor
(Continued from previous slide..)
Type of
Features Usage
Architecture
§ Allows software to
communicate explicitly to the
processor when operations
are parallel
EPIC (Explicitly
§ Uses tighter coupling Mostly used in
Parallel
between the compiler and the high-end servers
Instruction
processor and workstations
Computing)
§ Enables compiler to extract
maximum parallelism in the
original code, and explicitly
describe it to the processor
Types of Processor
(Continued from previous slide..)
Type of
Features Usage
Architecture
§ Processor chip has multiple
cooler-running, more energy-
efficient processing cores
§ Improve overall performance
Mostly used in
Multi-Core by handling more work in
high-end servers
Processor parallel
and workstations
§ can share architectural
components, such as memory
elements and memory
management
Main Memory
Primary Secondary
Property Desirable
storage storage
Storage
Large storage capacity Small Large
capacity
0
1
2
3
4
Addresses of The words
a memory 5
of a memory
(total N words)
N-2
N-1 Each word
contains the same
number of bits =
Bit 1 Bit 2 word length
(Continued on next slide)
1024
4096 4096
Memory Capacity
Types of ROMs
Type Usage
Data is burnt by the manufacturer
Manufacturer-programmed
of the electronic equipment in
ROM
which it is used.
User-programmed ROM
or The user can load and store
“read-only” programs and data in
Programmable ROM it
(PROM)
Types of ROMs
(Continued from previous slide..)
Type Usage
Electrically EPROM
(EEPROM) A type of EPROM chip in which the
or stored information is erased by
using high voltage electric pulses
Flash memory
Cache Memory
Key Words/Phrases
Key Words/Phrases
(Continued from previous slide..)