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Experiment #1: JFET Characterisation
Experiment #1: JFET Characterisation
Circuit Diagram:
Theory:
The junction FET has a channel consisting of N-type semiconductor or P-type semiconductor material
and the gate is made of the opposite semiconductor type.
The junction FET has a channel consisting of N-type semiconductor or P-type semiconductor material
and the gate is made of the opposite semiconductor type. The N-channel is doped with donor
impurities where the flow of current through the channel is negative in the form of electrons. The P-
channel is doped with acceptor impurities on where the flow of current is positive in the form of
holes. Since electrons have a higher mobility through a conductor compared to holes, N-channel
JFETs have a greater channel conductivity compared to their equivalent P-channel type
The input impedance is extremely high since the gate junction is reverse biased and because there is
no minority carrier contribution to the flow through the device. The depletion of charge carriers
from the N-channel serves as the control element for the JFET. The majority carriers from a larger
depletion zone around the gate are depleted when the gate is made more negative. For a given
value of source-to-drain voltage, this reduces the current flow.
Fast switching
For low frequency operation, source and drain can be interchanged
Gate voltage that controls drain current
Single majority carrier
Small in size
High “Z” input
Observation:
Graphs:
Tables:
Id(mA) Vds(V)
0 0
1.3 4
1.32 8
1.34 12
1.35 16
Id(mA) Vgs(V)
12 0
9 -0.4
7 -0.8
4 -1.2
3 -1.6
Transconductance=(12-9)mA/(0.4-0)V=7.5k V/A