SIEMENS SAB 8052/8032 Family 8-Bit Single-Chip Microcontroller SAB 8052B Microcontroller with factory mask programmable ROM (8K) SAB 8032B Microcontroller for external ROM @ Versions for 12 MHz/ 16 MHz/20 MHz = @ Multiply and divide in 4 us/3us/2.4 us operating frequency @ Six interrupt vectors, two priority levels © 8 Kx 8 ROM (SAB 80528 only) @ RAM power-down supply @ 256 «8 RAM @ Packages P-DIP-40 and PL-CC-44 © Four 8-bit ports, 32 /O lines @ Full backward compatibility with SAB Three 16-bit timer/event counters 8051/8031 @ High-performance full-duplex serial @ Three temperature ranges available channel with flexible transmit/receive baud 00 70°C rate capability 40 to 85 °C @ External memory expandable up to 128-40 to 110°C Kbytes @ Boolean processor © Most instructions execute in: 1 ns instruction cycle time at 12 MHz 750s instruction cycle time at 16 MHz 4 600 ns instruction cycle time at 20 MHz Figure 12 Pin Configuration P-DIP-40 PL-CC-44 ros Table 5. @s82 rover (2 saf] P00 400 — vrais sf] ro 3593 erste s7f] P02 oz = nisite ssf] Fo ane pis? BSP POA ADs ai suf} eo 0s pieqa se PO.5 ADS virile ssf) 05 aos pide sb Po. 406 51% (2 sep) ro aor RST/ Veo 10 36 PO.7 ADT wo/esoTho gag apm RxD/P3.0 G1 35D EA woyesiffy 8032 sof} az NC.q12 SAB 8052/8032 up ne, athe 2082 adja Tx0/P3.1 qs 3p ale intijess (his ae{] p27 ats mot 3p PSEN rojese lua Shereae ——NTI/P3.3.q15 sip p27 ats nossths abreast T0/P3.4 16 sah °2.6 ats 7 7 11/935 qh17 aap P25 at3 wipes (fis asf] ea « a2 2 wyes7 7 aif] ez ant SOOO erpares wu ffs asf] eee ato pezzl2segea saa ffis nf) roi as Se" 28en8 (ge S22 oe veslf20 aif) p20 a8 © Siemens Components, Inc. 421 M@™ 8235605 0055780 LuTSAB 8052/8032 Family The SAB 8052/8032 family are standalone, high-performance single-chip _ microcon- trollers fabricated in +5V advanced N-channel, silicon-gate Siemens MYMOS technology, packaged in a 40-pin plastic dual-inline package (P-DIP-40) or 44-pin plastic leaded chip carrier (PL-CC-44) package. It is backwardly compatible with the SAB 8051A/8031A and provides the hardware features, architectural enhance- ments, and instructions that are necessary to make it a powerful and cost-effective controller for applications requiring up to 64 Kbytes of program memory and/or up to 64 Kbytes of data memory. The controllers of the SAB 8052/8032 family contain a non-volatile 8 K x 8 read-only program memory, a volatile 256 x 8 read/ write data memory, 32 I/ O lines, three 16-bit timer/counters, a’ six-source, two-priority- level nested interrupt structure, a serial VO port for either multiprocessor com- munications, VO expansion, or full-duplex UART, as well as an on-chip oscillator and clock circuits. For systems that require extra capability, the standard TTL compatible memories and the byte-oriented SAB 8080 and SAB 8085 peripherals can be used to expand the SAB 8052 / 8032 family. The parts are available for standard temperature range (0 to 70 ‘C) and extended temperature ranges (— 40 to 85 “C and - 40 to 110°C). Figure 13 SAB 8052 / 8032 family RAM 128x8 SAB 8051/8031 422 MB 8235605 0055781 O8b a rrr © © TE >= =. ‘© Siemens Components, Inc.SAB 8052/8032 Family Ordering Information Type Package ‘Description (G-bit single- microcontroller) ‘SAB 80328-P P-DIP-40 for extemal memory, 12 MHz. ‘SAB 80328-N PL-CC-44 ‘SAB 80328-16-P P-DIP-40 {for external memory, SAB 8032B-16-N PL-CC-44 16 MHz SAB 60328-20-P P-OIP-4 ‘or external memory, ‘SAB 8032B-20-N PL-CC-44 20 MHz ‘SAB 80528-P| P-DIP-40 with 8-KByle mask programmable ROM, ‘SAB 8052B-N PL-CC-44 — ‘SAB 8052B-16-P P-DIP-40 with 8-KByte mask-programmable ROM, SAB 60528-16-N PL-CC-44 oo © Siemens Components, inc. 423 M@™ 6235605 0055742 TleSAB 8052/8032 Family Figure 14 Logic Symbol XTALT — #e>) <>) 2 — ~ a ' 2 _ 3 3 XTAL2 ke ete le fer 5 RST/Yoyp—> <> | <>] 3 — aie - 3 A—| >} «oJ = K+) <—12 a Jes | <—r20 > we} we EI. 8052 ie | Family RxD —> | > — TxD <— +) —> —>- to—> | <4 lk» | —» |e INT1—> ca 2 _ To—+ 18 iS me ace i > | —> |3 WRe— | «+! le» = RD <— |} <> — WELOO7SI 424 mm 235605 0055783 955 Ml © Siemens Components, nc.SAB 8052/8032 Family Pin Definitions and Functions Symbol Pins input ()__ Function P-biIP-40 [PL-Co-44 | Output (0) piori7 [re [20 vO PORT 1 is an &bit quasi bidirectional YO pon. tis used for the low-order address byte during program verification. Port ‘can sink/source four LS TTL loads. Port 1 also contains the timer 2 pins as a secondary func- tion. The output latch corresponding to a secondary func- tion must be programmed to a one (1) for that function to ‘operate. The secondary functions are assigned to the pins of port 4, as follows: ~T2 (P1.0). Input to counter 2 ~T2 (EX (P1.1). Capture/Reload trigger of timer 2, Rstiveo |9 10 ' RESET input. A high level on this pin resets the ‘SAB 8052B. A small intemal pulldown resistor permits pow- €er-on reset using only a capacitor connected to VCC. It V ep is held within its spec while V cc drops below spec, V po will provide standby power to the RAM. When Vo is low, the RAM’s current is drawn from V cc. P30-P37 [10-17 | 14 vO PORT 3 is an 8-bit quasi-bidirectional I/O port. It also con- Cota meen Re ae ree te oe nee ES can sink/source four LS TTL loads. The secondary func- tions are assigned tothe pins of port 3, as follows: ~ RxDidata (P3.0). Serial port's receiver data input (asynchronous) or data inpuvoutput (synchronous). = TiDielock (P3.1). Serial port's transmitter data ‘output (asynchronous) or clock output (synchronous). — INTO (P3.2. Interupt 0 input or gate control input for counter 0. INT? (P3.3). Interrupt 1 input or gate control input for counter t = TO (P3.4). Input to counter 0. | = T1{P3.8), Input to counter 1. — WR (P38). The write control signal latches the data byte from port 0 into the extemal data memory — RD (P3.7). The read control signal enables external data ‘memory to port 0. xTaLr [19 21 XTAL 1 input to the oscillator's high gain amplifier. Re- XTAL2 | 18 20 quired when a crystal is used. Connect to vss when exter- nal source is used on XTAL 2, XTAL 2 output from the oscilator’s amplifier. Input to the in- ternal timing circuitry. A crystal or extemal source can be used. P2.0-P2,7 [21-28 | 24-91 vo PORT 2s an 8-bit quasi-bidirectional VO port. It also emits, the high-order address byte when accessing extemal mem- ory. Itis used for the high-order address and the control sig- nals during program verification. Port2 can sink/source four LS TTL toads. © Siemens Components, inc. 4.25 WB 8235605 0055784 695 mm‘SAB 8052/8032 Family Pin Definitions and Functions (continued) Symbal Pins input @)___| Function P-DIP-a0 | PL-co-a4_| Output (0) Psen {20 2 ° “The Program Store Enable output is a control signal that ‘enables the external program memory to the bus during ex- temal fetch operations. Itis activated every six oscillator pe- ‘iods, except during external data memory accesses, Ree- ‘mains high during intemal program execution, NE 30 3 oO... Provides Address Latch Enable output used for latching the address into external memory during normal operation. Itis activated every six oscillator periods except during an extemal data memory access. EA 31 35 V ‘External Access enable. When heldat a TTL high level, the ROM-versions executes instructions from the internal ROM when the PC points to the intemal ROM address space. When held at @ TTL low level, the ROM-versions fetch all in- structions from extemal program memory. For the ROM- less versions this pin must be tied low. Po.o-Po7.|39.a2 [43-36 vo Port 0 is an 8-bit open drain bidirectional VO port. Itis also the muttiplexed low-order address and data bus when using external memory. It is used for data output during program verification. Port 0 can sink/source eight LS TTL loads. Voc 40 “4 = +8 V Power Supply during operation and program verification, ves 20 22 = Circuit Ground potential NC = 4.12, = No Connection 23,34 4-26 © Siemens Components, Inc. WH 8235605 0055785 72) SOO OOOO llr rr rwrTWrTr Tr FFT || r|©™Figure 15 Block Diagram Frequency Reference Counters Program Three 16-8it Memory Timer/Event Counters 256 Bytes Dato Memory \ \ 1 i i | I I I I 1 1 i | Programmable] | 64 Kbyle Bus Serial port 1 Expansion Full duplex UART] | Control Synchronous 1 Shitior \ \ 1 — o wees intercupls Control Parallel Ports Sericl Serial Address Data Bus Input Output ond 1/0 Pins © Siemens Components, Inc. 427 @™ 6235605 0055746 bbe mlSAB 8052/8032 Family Absolute Maximum Ratings ‘Ambient temperature under bias SAB 80528/8032B . 0 to +70 °C Storage temperature. 65 to + 150°C Voltage on any pin with respect to ground (Vss) 0.5t0+7V Note: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in Power dissipation 2W the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC Characteristics Voc = 5 V+ 10%; Ves = 0 V Ta= Oto +70 °C for SAB 80528/8032B ‘Symbol | Parameter Limit Values Unit | Test Conditions min. max. ve Input iow voltage 05 08 v_{- vw Input high voltage 20 vec+os |v |— {except RST/vro and XTAL 2) Vow Input high voltage to 25 vec+05 [Vv | XTALItoves RST/veo for reset, XTAL 2 Veo Power down voltage 45 55 v vec =0V to RST/vPo Vou Output low voltage = 0.45 Vv [r= tema Ports 1, 2,3 Vou Output low voltage = 0.45 v Jo. = 3.2 mA Port 0, ALE, PSEN Vox | Output high voltage 24 7 V | ton=— 80uA Ports 1, 2,3 Vout Output high voltage 24 a v TOK == 400 nA Port 0, ALE, PSEN 4-28 © Siemens Components, inc. MH 4235605 0055787 STYSAB 8052/8032 Family DC Characteristics (cont'd) ‘Symbol | Parameter Limit Values Unit [Test Conditions: ‘min. ma ™ Logical 0 input current ~ 500 vA |m=045V Ports 1, 2,3 ma Logical 0 input current XTAL 2 [XTALI = vss ‘SAB 8052B/80228 - 12/1620 - -32 ma | vu =0.45V we Input high current to = 500 vA |Win=Voc-1.5V RST/Vro for reset nu Input leakage current - +10 pA ove ume voc to port 0, EA ee ‘Power supply current ‘All outputs ‘SAB 80528/80328 - 175 mA. | disconnected SAB 8052B-16/8032B-16 - 175 mA ‘SAB 8052B-20/8032B-20 - 175 mA oO Power down current = 6 mA 00 Capacitance of VO butter = 10 pF ma © Siemens Components, inc. 429 M@™ 6235605 0055788 430‘SAB 8052/8032 Family AC Characteristics for SAB 80528/8032B, 12 MHz Voc = 5 V+ 10%; Vss = OV (Ci for port 0, ALE and PSEN outputs = 100 pF; C- for all other outputs = 80 pF) Ta= Oto + 70°C for SAB 8052B/8032B Please refer to AC characteristics for SAB 8051A/8031A, 12MHz AC Characteristics for SAB 8052B/8032B, 16 MHz Veo = 5 V + 10%; Vs=0V (Cc for port 0, ALE and PSEN outputs = 100 pF; C: for all other outputs = 80 pF) Taz 0 to 70°C; for SAB 8052B/80328-16 Please refer for AC characteristics to the SAB 8051A/8031A-16, 16MHz mm 8235605 0055789 377 = ‘© Siemens Components, Inc.SAB 8052/8032 Family AC Characteristics for SAB 8032B-20, 20 MHz Ta=0to 70°C; Vor=5 V+ 10%; Vs=0V (Cc for port 0, ALE and PSEN outputs = 100 pF; ‘for all other outputs = 80 pF) Symbol] Parameter Limit Values: Unit ‘Clock Variable clock 20MHz clock | thee. = 1.2 MHz to 20 MHz min. max. prin. |_max. Program Memory Characteristics TL [ALE pulse width 60 = Baa-40_[- as imi [Address setup to ALE 20 = ra.ci-30 = ns ‘ux _| Address hold after ALE 20 = ra.ci-80 = ns ‘uv | ALE to valid instruction in = 10 | 4raci-100_ [ns ru | ALE to PSEN 26 _ 10.0.-25 - ns met | PSEN pulse width 415 = ract-35, - ns iw _| PSENto valid instruction in = 75 = Sraci-75 [ns ‘nortan ho ater PEO |- | os a ez) | nput instruction float after PSEN — |- 40 = raat0 ns texav)_| Address valid after PSEN 47 - ra.c.-8 - ns tan | Address to valid instruction in = 190 |- Saco (ns tx. | Address float to PSEN 0 = o - ns *) Interfacing the SAB 8032B-20 to devices with float times up to 45 ns is permissible. This limited bus contention will not cause any damage to port 0 drivers. © Siemens Components, Inc. 4st M@™ 6235605 0055790 059 aSAB 8052/8032 Family AC Characteristics for SAB 8032B-20, 20 MHz (cont'd) Symbol | Parameter ‘Limit Values Unit Clock Variable clock 20MHz clock | 1hcuct = 1.2 MHz to 20 MHz min. | max. | min, max. External Data Memory Characteristics ure RD pulse width oe Gruc-100 | — ns ew WR pulse width 200 Gruc~100 | ~ ns sume | Address hold after ALE 70 = Bea 30 | ~ ns ime RD to valid data in - 100 - Sicict- 150 | ns IRHOX Data hold after RD 0 - oO = ns voz Data float after AD = 40 = 2-60 | ns nupv ALE to valid data in = 20 «|= Bric. 150 | ns ino ‘Address to valid data in = 25 «f- ‘oi 165 | ns on ALE to WR or RD 100 200 Srec.- 50 Bric +50 | ns sav Address to WR or RD 70 - 4rcici- 130 | - ns wan | Witor BD high to ALE high 20 r) wa-80 feunsd0 | ns ravwx | Data valid to WR transition 5 = reas f= ns row Data setup before WR 200 . Treac-150 | = ns wax | Data hold after WAL 40 = raan40 | ns mz Address float after RD - 0 - ° ns External Clock Drive XTAL2 jeict___| Ostilator period = = 50 333.3 1s iecx [High time = = 15 Teiei—feiex [ns racx__[Lowtime = = 15 ruc. —ronex [ns ‘ice | Rise time 5 = = 6 ns icnct__| Fall ime = 7 7 rs 18 4-32 © Siemens Components, Inc. M@® 6235605 0055791 Tes Soo __ PLO orrrrrwrh™hm™6( C6 rDrrrhr.hr rrSAB 8052/8032 Family ROM Verification Characteristics for SAB 8052B/8032B Family Ta = 25°C#5 ‘CG; Vor = 5 V+ 10%; Ves = OV ‘Symbol Parameter Limit Values Unit min. max. roy Address to valid data = 48 rac ns 1a.0v ENABLE to valid data - 48 rac ns EHO Data float after ENABLE 0 48 rack ns Troe Oscillator frequency 4 6 MHz Figure 16 ROM Verification Port1,2 PortO ( Data OUT Pp ELQV tevez Eze, ENABLE Mevo004s ‘Microcontroller’ Data Inputs ‘SAB 60528 Port =D0- 07 | P2.5—P2.6, PSEN 8K x8 ALE, EA Rsx/veo. L Waveforms Please refer to SAB 8051A/8031A for AC waveforms. © Siemens Components, Inc. WM 6235605 0055752 Ibi 4-93SIEMENS Package Outlines Package Outlines 15.24¢2 | comes | 20 | 50.993 —————+| % | 9 | Approx. weight 5.9g Dimensions in mm | Plastic Package, P-DIP-40 (Dual-In-Line Package) 20 B 40 DIN 41870 T10 © Siemens Components, inc. of M@™ 8235605 OOSb4b2 379 OO of rr Tr Trr¥5=—r SSS ss —e=ss=—=='==='=”s”@”s«Package Outlines 16.7 92 127 0.81 max. 167 92 Dimensions in mm Plastic Package, P-LCC-44 (Plastic Leaded—Chip Carrier) SMD © Siemens Components, Inc. 02 MB 8235605 OOSb4b3 2OS me oe, ™hS r™ “ “ill © © |©hrX¥vrrTTrT¥WwWXuhnéW XW" © *,,=~~-«~S =~«~Ss-=drdh| «+ rPackage Outlines 25.15 +0.3 2421403 0.74+0.07 Dimensions in mm Plastic Package, PLCC-88 (SMD) (plastic leaded chip carrier) © Siemens Components, Inc. 93 MH 8235605 OOS64b4 141 om _CCCO CC OO CUOUOUoUrrrF FFFPackage Outlines Index Marking Dimensions in mm Plastic Package, PLCC-84 (SMD) (plastic leaded chip carrier) o4 © Siemens Components, Inc. M™ 6235605 OOSb465 085 mePackage Outlines 0.15+0.05 Pin Mark No. 1 a 6 0.5 min, 4.32 0.68, Gor 100 pins Dimensions in mm ‘SMD = Surface Mounted Device Plastic Package, P-QFP-100 (Plastic Quad-Flat-Pack) - SMD si Ce nts, Inc. ees MH 6235605 OOSb4bb T14 mm