Chapter 17

Mixed-Signal PCB Layout

Electromagnetic Compatibility
Engineering
by Henry W. Ott
 Foreword
 Mixed-signal PCB problems usually involve either one of two situations.
One involves digital logic circuits that interfere with sensitive low-level
analog circuits [often audio or radio frequency (rf)],
and the second involves high-power motor and relay driver (noisy
analog) circuits that interfere with both digital and analog circuits.
 If the current is not returned locally and compactly, it creates a loop
antenna.
If a system has two reference planes, it creates a dipole antenna.

JHLin, AppEMC; Mixed-Signal PCB Layout 2

 Split Ground Planes


JHLin, AppEMC; Mixed-Signal PCB Layout 3

 Split Ground Planes
 Other acceptable ways of passing a signal over a split plane are with
opto-isolators, magnetoresistive isolators, or transformers.
 Another possibility is with a true differential signal, where the signal
flows down one trace and returns on the other trace.

JHLin, AppEMC; Mixed-Signal PCB Layout 4

 Split Ground Planes

JHLin, AppEMC; Mixed-Signal PCB Layout 5

 Microstrip Ground Plane Current
Distribution


JHLin, AppEMC; Mixed-Signal PCB Layout 6

 Microstrip Ground Plane Current
Distribution


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 Microstrip Ground Plane Current
Distribution
 A better approach: using only one ground plane and partitioning the PCB
into digital and analog sections.


8
 Microstrip Ground Plane Current
Distribution


 Component placement and partitioning are, therefore, critical to a good

mixed-signal layout.

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 Microstrip Ground Plane Current
Distribution
 It only takes one improperly routed trace to destroy an otherwise
perfectly good layout.
Autorouting of a mixed-signal PCB, more often than not, results in a
layout disaster; hence, manual techniques often have to be used.

JHLin, AppEMC; Mixed-Signal PCB Layout 10

 Analog and Digital Ground Pins
 Another issue is 

where and how to

connect the analog
and digital ground
pins of a mixed-
signal integrated
circuit (IC).
 Their
recommendation is
then to connect
both the AGND and
the DGND pins of
the A/D converter to
the analog ground
plane.

11
 Analog and Digital Ground Pins


JHLin, AppEMC; Mixed-Signal PCB Layout 12

 Analog and Digital Ground Pins


JHLin, AppEMC; Mixed-Signal PCB Layout 13

 When Should Split Ground Planes Be Used?
 At least three instances where they would be appropriate:
 Some medical equipment with low leakage current requirements (10 mA)
 Some industrial process control equipment where the outputs are connected to
noisy, high-power electromechanical equipment
 Possibly when a PCB is improperly laid out to begin with

 In the first two cases listed above, signals that cross the split in the
ground plane are usually optical or transformer coupled.
 For the last case. if a mixed-signal board is poorly laid out, its
performance can be improved by using a split ground plane.

JHLin, AppEMC; Mixed-Signal PCB Layout 14

 When Should Split Ground Planes Be Used?


 This however, will increase the radiated emission from the board as the
result of the larger loop area that exists between the signal trace and
the return current path.
 It will also increase the impedance of the ground plane, thereby
increasing the radiation from cables connected to the board.
15
 When Should Split Ground Planes Be Used?
 A better solution would have been to route the digital signal trace
properly in the first place, and not to split the ground plane.
 The following two things that should be avoided if you do split planes:
 Overlapping the planes
 Routing traces across the split

 If analog and digital ground planes are split, low-capacitance, oppositely

poled, Schottky diodes are often connected between the two planes to
limit the direct current (dc) voltage differential to a few hundred
millivolts.
This can be important to prevent damage to mixed-signal ICs that have
connections to both planes.
 The ‘‘Chain Saw ‘‘Test.

JHLin, AppEMC; Mixed-Signal PCB Layout 16

 Mixed-Signal ICs
 The layout information provided by A/D converter manufacturer’s data
sheets is usually only applicable to a simple system that contains one
A/D converter (e.g., their demo board).
Their recommended approach is not normally applicable for multiple A/D
or digital-to-analog (D/A) converter systems or multiple board systems.
 A/D and D/A converters, as well as most other mixed-signal ICs, should
be considered to be analog components.
 The labels AGND and DGND on the IC pins refer to where these pins are
connected internally, and it is not intended to imply where or how they
should be connected externally.
 These pins should almost always be connected together and referenced,
as well as decoupled, to the analog ground plane.

JHLin, AppEMC; Mixed-Signal PCB Layout 17

 Mixed-Signal ICs
 The exception to the above rule is some large DSPs that contain a large
amount of digital processing.
These devices draw large transient currents from the digital supply and
should have their AGND pin tied to analog ground, and their DGND pin
tied to digital ground, unless the data sheet specifies otherwise.


18
 Mixed-Signal ICs – Multi-Board Systems
 Another way to isolate the digital ground from the analog ground is to
place the digital circuits on one PCB and the analog circuits on another
PCB.


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 Mixed-Signal ICs – Multi-Board Systems
 This approach (1) allows the AGND and DGND pins to be connected
together, through the low impedance of the analog ground plane;
(2) provides the shortest path for the sensitive analog circuitry;
(3) isolates the analog circuits from the digital ground currents;
(4) applies any existing ground differential between the two boards, to
the converter’s digital inputs (or outputs,)

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 High Resolution A/D and D/A Converters
 For higher resolution systems (18 bits and up), even more ground noise
voltage isolation may be required for adequate performance.
These converters often have minimum resolution voltages in the single
digit microvolt range or less.
 One conservative design approach is to keep the analog ground plane
noise voltages smaller than the minimum analog signal level of concern.
 The lower the reference voltage and the larger the number of bits, the
smaller the minimum resolvable signal voltage will be.


21
 High Resolution A/D and D/A Converters
 An estimation of the required ground noise voltage isolation can be
obtained by assuming a digital ground noise voltage of 50 mV, which is
representative of a PCB with a good layout.
Also assume that it is desirable to limit the analog ground noise voltage
to 5 V.


22
 High Resolution A/D and D/A Converters - Stripline
 From Table 17-1, it can be observed that separating the analog ground
from the digital trace by more than an x/h ratio of 50 provides little
additional reduction in ground current.
 One solution is to run the digital logic traces in a stripline configuration,
because for a stripline the return current does not spread out as far as it
does for a microstrip line.


JHLin, AppEMC; Mixed-Signal PCB Layout 23

 High Resolution A/D and D/A Converters –
Asymmetric Stripline
 For reasons of cost,
stripline is seldom
used on digital logic
boards because it
requires two planes
for each signal layer,
but asymmetric
stripline is common.
 Asymmetrical stripline
behaves similar to
stripline.

 Fig. 17-13 Log-log plot of normalized ground

plane current density for microstrip, stripline,
and asymmetric stripline, versus x/h. The
asymmetric stripline plot is for the case where
h2  2h1. 24
 – Isolated
High Resolution A/D and D/A Converters
Analog and Digital Ground Planes
 A second approach to the high-resolution converter problem is to divide
the board into separate isolated analog and digital ground plane regions,
all still solidly connected to the digital ground plane under each of the
A/D converter.

25
 A/D and D/A Converter Support Circuitry – Sampling
Clocks
 In a high-precision sampled data system, a low-jitter, noise-free,
sampling clock is essential.

Any jitter in
the sampling
clock varies
the point in
time at which
the signal
waveform is
sampled,
which
produces an
amplitude
error in the
sampled
signal.
 A/D and D/A Converter Support Circuitry – Sampling
Clocks


 Clock jitter effectively raises the noise floor of the system similar to the
effect of the ground noise discussed previously.
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 A/D and D/A Converter Support Circuitry – Sampling
Clocks
 The effect of sampling clock jitter on an A/D converter’s signal-to-noise
ratio (SNR):
 1 
SNR  20log 
 2 f t 
 j 

 As can be concluded from the above examples, in many cases, the error
caused by the sampling clock jitter is far greater than that produced by
any ground noise voltage that might exist.

JHLin, AppEMC; Mixed-Signal PCB Layout 28

 A/D and D/A Converter Support Circuitry – Mixed-
Signal Support Circuitry
 To minimize loading and output current, each digital output of a mixed-
signal device should feed only one load.


 The buffer serves to minimize loading (minimizing the required output

current) on the converter’s digital outputs and prevents the system data
bus from coupling noise back into the converter’s analog input through
the converter’s stray internal capacitance.

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 A/D and D/A Converter Support Circuitry – Mixed-
Signal Support Circuitry
 In addition, series output buffer resistors (100 to 500 ) could also be
used in addition to, or in place of, the buffer to minimize the loading on
the digital drivers, which reduces the transient currents in the
converter’s output.
 The reference voltage and sampling clock should both be referenced to
the analog ground plane, not the digital ground plane.
 The A/D converter sampling clock should be located in the analog
section of the PCB, and it should be isolated from the noisy digital
circuits, and be grounded and decoupled to the analog ground.
 If the sampling clock must be located on the digital ground plane,
possibly because it is derived from the digital system clock, it should be
transmitted to the A/D or D/A converter differentially, or through a
transformer to reject any noise voltage between the two grounds.

JHLin, AppEMC; Mixed-Signal PCB Layout 30

 A/D and D/A Converter Support Circuitry – Mixed-
Signal Support Circuitry


JHLin, AppEMC; Mixed-Signal PCB Layout 31

 Vertical Isolation
 It is also possible to isolate or separate the analog and digital circuitry in
the vertical, or Z-axis, of the board.
 For example, in the case of a double-sided surface-mount board, the
digital circuits could be routed on the top layers of the board and the
analog circuits routed on the bottom layers of the board.
This approach is used commonly in cell phones. The analog components
on one side of the PCB should be isolated from the digital components
on the other side of the board with a plane (ground or power).
 Some limitations: The digital power supply can induce noise into the
analog signal traces through the vias where the signals change layers.
The magnitude of this coupling will depend on the effectiveness of the
digital power supply decoupling and on the location of the vias involved.

JHLin, AppEMC; Mixed-Signal PCB Layout 32

 Vertical Isolation
 Through-vias will also provide coupling between the analog and the
digital layers.
The portion of the via that extends into the opposite partition of the
board will act as a small stub antenna and can pick up, or radiate, high-
frequency energy. ─ Z-axis coupling.
 The power and ground plane antipads (clearance holes) will also provide
some leakage (coupling) at high frequencies. These items can all be
minimized or eliminated by the use of blind and buried vias.


33
 Mixed-Signal Power Distribution – Power
Distribution
 Mixed-signal boards may use separate power for the analog and digital
circuits. This often results in a split-power plane.
 In many circumstances, a split-power plane can be avoided by routing
some of the power, usually the analog power, as a trace on a signal layer
rather than as a plane.
 Analog power can be obtained by several different methods, including
the following:
 A separate power supply
 A voltage regulator, off of the digital power
 A filter, off of the digital power

 If a voltage regulator is used, a linear regulator is preferred to a

switching regulator.

JHLin, AppEMC; Mixed-Signal PCB Layout 34

 Mixed-Signal Power Distribution – Power
Distribution
 If a filter is used, it can consist of a single filter off the digital power to
supply all the analog circuitry, or individual filters at each IC between
the analog and digital power pins, or in some cases both.
 Because the digital circuitry draws the largest magnitude currents and
has the largest current transients, the power connector should be
located in the digital partition of the board.


35
 Mixed-Signal Power Distribution – Decoupling


36
 Mixed-Signal Power Distribution – Decoupling
 Z in Fig. 17-21 is a small impedance such as a ferrite bead or resistor.
If the analog supply is used, this isolation helps keep the digital noise
out of the analog supply.
If the digital supply is used, this helps to keep the digital supply noise
out of the converter’s digital circuitry and decoupling capacitor.
 Large digital signal processor (DSP) ICs with microprocessors and
codecs, which contain a large amount of digital circuitry, are the
exception to the above grounding scheme.
They usually should have AGND and DGND separately grounded to their
respective ground planes. These chips are usually designed with good
noise isolation between the analog and digital circuitry. Check the IC
data sheet for recommendations.

JHLin, AppEMC; Mixed-Signal PCB Layout 37

 Mixed-Signal Power Distribution – Decoupling


 This layout keeps the transient decoupling capacitor ground currents out
of the analog ground plane.
JHLin, AppEMC; Mixed-Signal PCB Layout 38
 The IPC Problems
 Industrial process control (IPC) equipment presents the mixed-signal
designer with a slightly different problem than the one we have been
discussing.
 Here, it is often the case that the noisy analog circuits that consist of
motor, relay, and solenoid drivers interfere with the digital or low-level
analog circuits.
 Following are some methods of dealing with the IPC problem:
 Use a return trace, not a plane, for the noisy analog signal (works well).
 Segment the ground plane and use a single bridge for traces that must cross over.
 Route noisy analog traces such that the return path of least resistance (direct path)
does not pass through the digital or analog portion of the board.
 Split ground planes and use opto-isolators, transformers, or magnetoresistive
isolators for signals that must pass over the split in the ground plane.

JHLin, AppEMC; Mixed-Signal PCB Layout 39

 The IPC Problems


JHLin, AppEMC; Mixed-Signal PCB Layout 40

 The IPC Problems


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