2017 IEEE International Conference on Consumer Electronics (ICCE)
A Novel Hardware Architecture of CAN Applications
H.Y. Li1,2*, J.J. Tang1, C.T. Yu1, W.W. Hu1, W.J. Chang1, D.H. Lee1 and Y.C. Chung3
1
Dept of Electronics Eng., Southern Taiwan University of Science and Technology, Tainan, Taiwan
2
Dept of Computer Science, Shanghai Jian Qiao University, Shanghai, China
3
Myson Century, Inc, Hsinchu, Taiwan
*
li.hongyuan.ee@gmail.com
Abstract-- In this paper, a novel hardware architecture of
Controller Area Network (CAN) applications is proposed. Taking
advantage of a highly integrated chip, which functions as a CAN
controller as well as a CAN transceiver, the proposed
architecture reduces the number of necessary external
components, supports popular serial buses and thus facilitates
application development. The architecture is applied in a CAN to
Bluetooth bridge, whose design is described in this article. It is
demonstrated that the proposed architecture is stable and
practical.
I. INTRODUCTION
CAN bus is a popular serial bus in automotive field because
of its simplicity and flexibility. The communication on the bus
is based on broadcasting, and an Electronic Control Unit
(ECU) connected to the two wires of the bus is able to
communicate with the other nodes on the same bus. In
addition, the bus dramatically lessens the usage of wires once
used to connect the vehicular components that communicate
with each other, thus reducing the weight of vehicles and
speeding up the assembly.
The popularity of CAN bus has led to the emergence of
varieties of applications, most of which are vehicle-related. A
typical hardware architecture of a CAN application usually
involves two parts, one of which is a CAN controller, while
the other is a CAN transceiver. The controller is responsible
for the implementation of CAN bus protocols, while the
transceiver is in charge of interfacing with the physical layer.
Actually, a CAN controller is usually in the form of either a
dedicated chip or an on-chip peripheral device equipped by a
specific programmable device, such as a microcontroller,
System-on-Chip (SoC) and Digital Signal Processor (DSP),
whereas, a CAN transceiver is usually a dedicated chip. Hence,
in sum, there are two typical hardware solutions. One is a
combination of two dedicated chips[1]. The other is an on-
chip CAN controller connected with a dedicated CAN
transceiver chip[2][3]. The first solution is quite flexible since
the circuit designer can choose the controller chip and the
transceiver chip separately, and the programming chip is not
restrained to any specific one, whereas it suffers from the
increase of complexity of wiring, vulnerability of EM
interfering and costs of design[4]. In contrast, the second
solution makes use of the on-chip CAN controller, which
This work is partially supported by the Ministry of Science and
Technology (MoST), Taiwan, under grants, MOST-105-2632-E-218-002,
MOST-105-2622-8-218-003-TE2. *Corresponding Author: Hong-Yuan Li
978-1-5090-5544-9/17/$31.00 ©2017 IEEE
saves wiring and solves the drawback of the first solution;
however, the on-chip controller and the programming chip are
bound, which leaves limited flexibility in the selection of the
programming chip for a CAN application.
Realizing the dilemma, some chip manufacturers produce
new chips which actually combine the functions of a CAN
controller and a CAN transceiver, such as MCP25625 from
Microchip and HI-3110 family from Holt. However, careful
scrutiny reveals some problems. First, these chips require an
external clock source, which usually is an external crystal.
Layout and routing of the crystal increase the costs of design.
Another problem is incurred by the limitation of the serial
communication protocols these chips support. Serial
Peripheral Interface (SPI), which is an efficient serial bus, is
supported by these CAN chip. Nevertheless, one major
downside of SPI is that compared with other serial buses, like
Inter-Integrated Circuit (I2C), adding slave devices on the bus
takes SPI more wiring, because chip selection of the device
requires a dedicated pin. Hence, some programmable devices
with a bounded number of pins lack hardware support for SPI,
and prefer I2C, whose wiring is simple and flexible.
In this paper is depicted a novel hardware architecture of
CAN applications. The architecture is applied in an
implementation of a CAN to Bluetooth bridge, which is also
described.
II. A NOVEL HARDWARE ARCHITECTURE
A. Introduction of CS8972
Collaborating with our lab, Myson Century Incorporation
designs CS8972, which is a CAN transceiver with a built-in
CAN controller. Therefore the chip provides a complete
solution to a CAN application.
The built-in CAN controller complies with CAN protocol
version 2.0B and has features, such as 1024 Bytes receive
FIFO, 12 full acceptance filters and 8 full filter masks. The
integrated CAN transceiver features built-in oscillator up to
16MHz, high speed SPI interface up to 3Mb/s, slave I2C mode
up to 2Mb/s, to just name a few.
B. The Proposed Architecture
Compared to the existing CAN chip solution with the
integration of a controller and a transceiver, the proposed
architecture requires fewer external components and provides
support of both SPI and I2C, which are widely used. Although
the built-in oscillator suffers from the variation of temperature,
 2017 IEEE International Conference on Consumer Electronics (ICCE)
it is still practical when only low baud rate of CAN bus is
required. Because less wiring and fewer external components
are required, the proposed solution is more handy and cost-
cutting. In addition, support of SPI and I2C makes the
architecture more flexible, since I2C is particularly favored if a
system based on a programmable device with a restrained
number of pins is implemented.
III. A CAN TO BLUETOOTH BRIDGE
A. Introduction
In this section, a CAN to Bluetooth bridge is described. The
context diagram of the bridge is depicted in Fig. 1. The bridge
automatically conveys the data from specific nodes on a CAN
bus to a paired Bluetooth device. On the other hand, when the
bridge receives a request from the paired Bluetooth device, it
analyzes the request, extracts the data and sends it to those
specific nodes on the bus.
Fig. 1. Context diagram of the bridge
B. Architecture
The bridge is composed of three functional parts. The Level
1 Data Flow Diagram (DFD) is shown in Fig. 2 with the
indication of only data flows. The central part is an 8-bit 8051-
compatible microcontroller, which orchestrates the bridge.
The left part is the proposed CAN architecture, which is
connected with the microcontroller through SPI. It is
responsible for forwarding the data from microcontroller to
CAN bus and doing the same job in the other direction. The
right part is a Universal Asynchronous Receiver/Transmitter
(UART) to Bluetooth module, which conveys the frames from
UART to Bluetooth and delivers whatever it has received from
Bluetooth to the microcontroller through UART.
Fig. 2. The Level 1 DFD of the bridge
As can be seen from fig. 2, the application of the proposed
CAN architecture is flexible. It is actually microcontroller
independent, which means any programmable device with a
serial bus interface such as SPI and I2C can implement the
978-1-5090-5544-9/17/$31.00 ©2017 IEEE
proposed architecture as its hardware CAN solution.
The picture of the bridge is shown in Fig 3. The chip in the
upper left corner is CS8972, and it is small, thus saving the
area of PCB. Notice, this design requires a tough requirement
of the accuracy of clock. Hence, we adopt an external crystal
as the clock source.
Fig. 3. The CAN to Bluetooth Bridge
In our application, the bridge is connected with an OBD-II
connector in a car and acts as a diagnostic reader. The request
of diagnostic information is sent from a paired Bluetooth
device, in this case, an Android smartphone, and the OBD-II
reply is forwarded by the bridge to the smartphone. It is
demonstrated that the bridge is stable and workable.
IV. CONCLUSION
In this paper, a novel hardware architecture of CAN-related
applications is proposed. Compared with existing solutions,
the proposed architecture requires fewer external components,
thus saving the costs of design and production. In addition,
support of both SPI and I2C makes the architecture particular
appropriate to the application based on a programmable device
that owns limited number of available pins.
A CAN to Bluetooth bridge, where the proposed
architecture is applied, is described in this paper. The bridge
forwards the data from specific CAN nodes to a paired
Bluetooth device. It is also capable of transferring the data
from Bluetooth to CAN bus. The bridge works properly and
demonstrates that the proposed architecture is practical.
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