Ade Notes

CLIPPING CIRCUIT:
The circuit with which the applied waveform is shaped by removing or clipping a portion of that
wave is known as a clipping circuit. It is also known as a limiter.
Clippers find extensive application in radar, digital and other electronic systems.
Although several clipping circuits have been developed to change the wave shape, we shall
confine our attention to diode clippers. These clippers can remove signal voltages above or
below a specified level. The important diode clippers are :
1. Positive Clipper
2. Biased Clipper
3. Combination Clipper
Positive Clipper:
A positive clipper is that which removes the positive half-cycles of the input voltage.
Fig shows the circuit of a positive clipper using a diode.
Circuit Action
During the positive half cycle of the input voltage, the diode is forward biased and conducts
heavily.Therefore, the voltage across the diode, which behaves as a short, is zero.
And hence, voltage across the load RL is zero.
During the negative half cycle of the input voltage, the diode is reverse biased and behaves as an
open.
In this condition, the circuit behaves as a voltage divider with an output given by :
Generally, RL is much greater than R. So,
Input-Output Waveform
Fig.3 shows the input-output waveforms of a positive clipper. As shown, the output voltage has
all the positive half cycles removed or clipped off.
Negative Clipper
If it is desired to remove the negative half cycle of the input, the only thing to be done is to
reverse the polarities of the diode in the circuit shown in fig 1. Such a clipper is known
as negative clipper.
Biased Clipper
Sometimes, it is desired to remove a small portion of positive or negative half cycle of the signal
voltage. For this purpose, biased clipper is used.
Fig.4 shows the circuit diagram of a biased clipper.
It consists of a diode D with a battery of Vdc volts.

With the polarities of the battery shown in Fig.4, a portion of each positive half cycle will be
clipped off. However, the negative half cycles, will appear as such across the load, Such a clipper
is called biased positive clipper.
Circuit Action
During the positive half-cycle, so long as the input voltage is greater than +Vdc, the diode will
conduct heavily.
When the input voltage is greater than +V, the diode is forward biased and behaves as a short
and the output voltage equals to +Vdc.
The output will stay at +Vdc, so long as the input voltage is greater than +Vdc.
During the period the input voltage is less than +Vdc, the diode is reverse biased and behaves as
an open. Therefore, most of the input voltage appears across the output.
In this way the biased positive clipper removes input voltage, above +Vdc.
During the negative half cycle of the input voltage, the diode remains reverse biased. Therefore,
almost entire negative half cycle appears across the load. i.e.
VO = Vin
Fig.6 shows the input-output waveforms of a positive biased clipper. As shown, the biased
positive clipper removes input voltage above +Vdc.
Biased Negative Clipper

If it is desired to clip a portion of negative half cycle of input voltage, the only thing to be done is
to reverse the polarities of diode or battery. Such a circuit is known as biased negative clipper.
Combination Clipper
It is a combination of biased positive and negative clippers.
With a combination clipper, a portion of both positive and negative half cycles of input voltage,
can be removed or clipped off. The circuit diagram of a combination clipper is shown in fig..
Circuit Action
During the positive half cycle, so long as the positive input voltage is greater than +V 1, diode
D1 conducts heavily, so acts as a short while diode D2 remains reverse biased, so acts as an open
as shown in fig.
Therefore, a voltage +V1 appears across the load.

This output stays at +V1 so long as the input voltage exceeds + V1.
On the other hand, during the negative half cycle, the diode D2 will conduct heavily, and acts as a
short, whereas, due to reverse bias diode D1 acts as an open and the output stays at – V2 so long
as the input voltage is greater than – V2. This situation is illustrated in fig
Note that, + V1 and – V2 are less than, +Vmax and –Vmax respectively.

Between +V1 and –V2, neither diode is on, so both the diodes D 1 and D2 act as open, therefore, in
this condition, most of the input voltage appears across the load as shown in fig
Fig.9 shows the input-output waveforms of a combination clipper.
Application of Clippers
Clippers are used to perform one of the following two functions:
1. Changing the shape of a waveform

2. Circuit transient protection
Changing the shape of waveform
Clippers can alter the shape of a waveform.
For example, a clipper can be used to convert a sine wave into rectangular wave, square wave
etc. They can limit either positive or negative alteration or both alterations of an a.c. voltage.
Comparators
A comparator is a device which is used to sense when an arbitrary varying signal reaches some
threshold or reference level. Comparators find application in many electronics systems: for
example, they may be used to sense when a linear ramp reaches some defined voltage level, or to
indicate whether or not a pulse has an amplitude greater than a particular value. Provided that
suitable output limiting is provided, comparator outputs may be used to drive logic circuits.
The Schmitt trigger is an important switching circuit that is widely used in digital systems. Its
stable state is determined by the amplitude of the input voltage. For a given circuit two finite
values of input voltages, called the upper trip point (UTP) and the lower trip point (LTP), cause
the circuit to switch from one stable state to the another. Thus the circuit may be used to
discriminate between two D.C. voltage levels: in this capacity it is known as a comparator.
Diode Comparator
The non-linear circuits to perform the operation of clipping may also be used to perform the
operation of comparison. The basic difference between the two is that in comparator there is no
interest in reproducing any part of the signal waveform. For example, the comparator output may
consist of an abrupt departure from source quiescent level which occurs at the time the signal
attains the reference level but is otherwise independent of the signal. Or the comparator output
may be a sharp pulse which occurs when signal and reference are equal.
If we assume that ramp signal is applied to the input, as shown in Figure 1(a) the output Figure
1(b) is constant VR volts until the ramp signal reduces a value equal to VR volts until the ramp
signal reduces a value equal to VR volts then the diode conducts and the input signal appears at
the output.
Figure : Comparators
In a circuit a clipper was important that the portion of the wave form passed by the diode was not
distorted. The exact time t1 at which the diode began conducting was of secondary importance.
Now this circuit will be considered as a voltage comparator, (since it compares the varying signal
voltage with the reference voltage and hence the name voltage comparator) and of primary
concern is the time at which the input signal voltage reaches the reference level V R. The shape of
the output waveform is of secondary importance. A diode used for this purpose called pick-off
diode. Similarly with an increasing ramp at its input the circuit of Figure 1(c) will be continue to
operate as a comparator. Its response will be same as shown in Figure 2(b). The diode of this
circuit is then referred to as a breakaway diode. The other two circuits shown in Figure 1 (a) and
(b) will act as comparators with a decreasing ramp. Their response is shown in Figure 2 (c) and
(d).
HALF WAVE RECTIFIERS:
A simple Half Wave Rectifier is nothing more than a single pn junction diode connected in series
to the load resistor. As you know a diode is to electric current like a one-way valve is to water, it
allows electric current to flow in only one direction. This property of the diode is very useful in
creating simple rectifiers which are used to convert AC to DC.
If you look at the above diagram, we are giving an alternating current as input. Input voltage is
given to a step-down transformer and the resulting reduced output of the transformer is given to
the diode ‘D’ and load resistor RL. The output voltage is measured across load resistor RL.
we have seen that rectification is the most important application of a PN junction diode. The
process of rectification is converting alternating current (AC) to direct current (DC).
Half Wave Rectifier Operation
Simply put, a half wave rectifier removes the negative half cycle of an AC input and allows only
the positive cycles to pass creating a DC flow.
To understand the operation of a half wave rectifier perfectly, you must know the theory
part really well. If you are new to the concepts of a PN junction and its characteristics, I
recommend you to read the half wave rectifier theory part first.
The operation of a half wave rectifier is pretty simple. From the theory part, you should know
that a pn junction diode conducts current only in 1 direction. In other words, a pn junction diode
conducts current only when it is forward biased. The same principle is made use of in a half
wave rectifier to convert AC to DC. The input we give here is an alternating current. This input
voltage is stepped down using a transformer. The reduced voltage is fed to the diode ‘D’ and
load resistance RL. During the positive half cycles of the input wave, the diode ‘D’ will be
forward biased and during the negative half cycles of input wave, the diode ‘D’ will be reverse
biased. We take the output across load resistor RL. Since the diode passes current only during
one-half cycle of the input wave, we get an output as shown in the diagram. The output is
positive and significant during the positive half cycles of the input wave. At the same time output
is zero or insignificant during negative half cycles of the input wave. This is called half wave
rectification.
When a single rectifier diode unit is placed in series with the load across an ac supply, it converts
alternating voltage into a uni-directional pulsating voltage, using one-half cycle of the applied
voltage, the other half cycle being suppressed because it conducts only in one direction. Unless
there is an inductance or battery in the circuit, the current will be zero, therefore, for half the
time. This is called half-wave rectification. As already discussed, a diode is an electronic device
consisting of two elements known as cathode and anode. Since in a diode electrons can flow in
one direction onlyi.e. from the cathode to anode, the diode provides the unilateral conduction
necessary for rectification. This is true for diodes of all types-vacuum, gas-filled, crystal or
semiconductor, metallic (copper oxide and selenium types) diodes. Diodes, because of their
inherent advantages are usually used as a rectifying device. However, for very high voltages,
vacuum diodes may be employed.
Working of a Half wave rectifier
The half-wave rectifier circuit using a semiconductor diode (D) with a load resistance R LÂ but
no smoothing filter is given in the figure. The diode is connected in series with the secondary of
the transformer and the load resistance R L.Â The primary of the transformer is being connected
to the ac supply mains.
The ac voltage across the secondary winding changes polarities after every half cycle of the input
wave. During the positive half-cycles of the input ac voltage i.e. when the upper end of the
secondary winding is positive w.r.t. its lower end, the diode is forward biased and therefore
conducts current. If the forward resistance of the diode is assumed to be zero (in practice,
however, a small resistance exists) the input voltage during the positive half-cycles is directly
applied to the load resistance RL, making its upper-end positive w.r.t. its lower end. The
waveforms of the output current and output voltage are of the same shape as that of the input ac
voltage.
During the negative half cycles of the input ac voltage i.e. when the lower end of the secondary
winding is positive w.r.t. its upper end, the diode is reverse biased and so does not conduct. Thus
during the negative half cycles of the input ac voltage, the current through and the voltage across
the load remains zero. The reverse current, being very small in magnitude, is neglected. Thus for
the negative half cycles, no power is delivered to the load.
Thus the output voltage (VL) developed across load resistance R L Â is a series of positive half
cycles of alternating voltage, with intervening very small constant negative voltage levels, It is
obvious from the figure that the output is not a steady dc, but only a pulsating dc wave. To make
the output wave smooth and useful in a DC power supply, we have to use a filter across the load.
Since only half-cycles of the input wave are used, it is called a half wave rectifier. Â
Power Supply Specifications of a rectifier
The most important characteristics which are Â required Â to be specified for a power supply are
the required output dc voltage, the average and peak currents in the diode, the peak inverse
voltage (PIV) of Â diode, the regulation and the ripple factor.
Advantages and Disadvantages of Half wave rectifier:
A half wave rectifier is rarely used in practice. It is never preferred as the power supply of an
audio circuit because of the very high ripple factor. High ripple factor will result in noises in the
input audio signal, which in turn will affect audio quality.
The advantage of a half wave rectifier is only that its cheap, simple and easy to construct. It is
cheap because of the low number of components involved. Simple because of the straight
forwardness in circuit design. Apart from this, a half wave rectifier has more number of
disadvantages than advantages!
Disadvantages of Half wave rectifier
1. The output current in the load contains, in addition to dc component, ac components of basic
frequency equal to that of the input voltage frequency. Ripple factor is high and an elaborate
filtering is, therefore, required to give steady dc output.
2. The power output and, therefore, rectification efficiency is quite low. This is due to the fact
that power is delivered only during one-half cycle of the input alternating voltage.
3. Transformer utilization factor is low.

4. DC saturation of the transformer core resulting in magnetizing current and hysteresis losses
and generation of harmonics.
The Â DC output available from a half-wave rectifier is not satisfactory to make a Â general
power supply. However, it can be used for some applications like battery charging.Â
Half Wave Rectifier with Capacitor Filter Â
The output of half wave rectifier is not a constant DC voltage. You can observe from the output
diagram that its a pulsating dc voltage with ac ripples. In real life applications, we need a power
supply with smooth waveforms. In other words, we desire a DC power supply with the constant
output voltage. A constant output voltage from the DC power supply is very important as it
directly impacts the reliability of the electronic device we connect to the power supply.
We can make the output of half wave rectifier smooth by using a filter (a capacitor filter or an
inductor filter) across the diode. Â In some cases, a resistor-capacitor coupled filter (RC) is also
used. The circuit diagram below shows a half wave rectifier with capacitor filter.
Half Wave Rectifier with Capacitor Filter – Circuit Diagram & Output Waveform
Half Wave Rectifier Analysis
The following parameters will be explained for the analysis of Half Wave Rectifier:-
1. Peak Inverse Voltage (PIV)
Peak Inverse Voltage (PIV) rating of a diode is important in its design stages. It is the maximum
voltage that the rectifying diode has to withstand, during the reversely biased period.
When the diode is reverse biased, during the negative half cycle, there will be no current flow
through the load resistor RL. Hence, there will be no voltage drop through the load resistance RL
which causes the entire input voltage to appear across the diode. Thus V SMAX, the peak secondary
voltage, appears across the diode. Therefore,
Peak Inverse Voltage (PIV) of half wave rectifier = VSMAX
2.Average and Peak Currents in the diode
By assuming that the voltage across the transformer secondary be sinusoidal of peak values
VSMAX, the instantaneous value of the voltage given to the rectifier can be written as
Instantaneous value of voltage applied to Half Wave Rectifier

Assuming that the diode has a forward resistance of RF ohms and infinite reverse resistance
value, the current flowing through the output load resistance RL is
Current flowing through the diode

IMAX = VSMAX/(RF + RL)
3.DC Output Current

The dc output current is given as
DC Output Current of Half Wave Rectifier

Substituting the value of IMAXÂ for the equation IMAX = VSMAX/(RF + RL), we have
Idc = VSMAX/Â = VSMAX/Â RL if RL >> RF
4. DC Output Voltage
Dc value of voltage across the load is given by
Vdc = Idc RL = VSMAX/pi(RF +RL)X RL =VSMAX/{1+RF/RL }
If RL >> RF, Vdc = VSMAX/pi
5.Root Mean Square (RMS) Value of Current
RMS value of the current flowing through the diode is given as
RMS value of current flowing through diode in half wave rectifier

6. Root Mean Square (RMS) Value of Output Voltage
RMS value of voltage across the load is given as
VLrms = Irms RL = VSMAX RL /2(RF + RL) = VSMAX/2{1+RF/RL }
IfÂ RL >> RF, VLrms = VSMAX/2
7, Rectification Efficiency
Rectification efficiency is defined as the ratio between the output power to the ac input power.
Efficiency, È = DC power delivered to the load/AC input power from the transformer = Pdc/Pac
DC power delivered to the load, Pdc = I2dc RL =(Imax/pi)2 RL
AC power input to the transformer, Pac = Power dissipated in diode junction + Power dissipated
in load resistance RL
= I2rms RF + I2rms RL = {I2MAX/4}[ RF + RL]
So, Rectification Efficiency, È = Pdc/Pac = {4/2}[RL/ (RF + RL)] = 0.406/{1+ RF/RLÂ }
The maximum efficiency that can be obtained by the half wave rectifier is 40.6%. This is
obtained if RF is neglected.
8. Ripple FactorÂ
Ripple factor is in fact a measure of the remaining alternating components in a filtered rectifier
output. It is the ratio of the effective value of the ac components of voltage (or current) present in
the output from the rectifier to the dc component in output voltage (or current).
The effective value of the load current is given as
I2 =I2dc+I21+I22+I24 Â = Â I2dc +I2ac
Where, I1,I2, Â I4 and so onare the rms values of fundamental, second, fourth and so on harmonics
and I2acis the sum of the squares if the rms values of the ac components.
So, ripple factor, Î³ = Iac/ Idc = I2 – I2dc)/ Idc = {( Irms/ Idc2)-1} = Kf2 â€“ 1)
Where Kf is the form factor of the input voltage. For half wave rectifier, form factor is given as
Kf = Irms /Iavg = (Imax/2)/ (Imax/pi)Â = pi/2 = 1.57So, ripple factor, Î³ = Â (1.572 â€“ 1) = 1.21

9. Regulation
The variation of the output voltage as a function of dc load current is called regulation.
Percentage regulation is given as
% Regulation = {(Vno-load â€“ Vfull-load)/ Vfull-load}* 100
Fror an ideal power supply, the output voltage should be independent of load current and the
percentage regulation should be equal to zero.
Applications of Half wave rectifier
Any rectifier is used to construct DC power supplies. The practical application of any rectifier
(be it half wave or full wave) is to be used as a component in building DC power supplies. Â A
half wave rectifier is not special than a full wave rectifier in any terms. In order to build an
efficient & smooth DC power supply, a full wave rectifier is always preferred. Â However, for
applications in which a constant DC voltage is not very essential, you can use power supplies
with half wave rectifier.
FULL WAVE RECTIFIERS:
The circuits which convert alternating current (AC) into direct current (DC) are known as
rectifiers. If such rectifiers rectify both the positive and negative half cycles of an input
alternating waveform, the rectifiers are referred as full wave rectifiers. Alternatively, we can say,
a rectifier is a device that converts alternating current (AC) to direct current (DC). It does it by
using a diode or a group of diodes. We know that a diode permits current only in one direction
and blocks the current in the other. We use this principle to construct various rectifiers.
We will discuss here Full Wave Rectifier. When we use a half-wave rectifier, a significant
amount of power gets wasted as the only one half of each cycle passes through and the other the
cycle gets blocked. Moreover, the half-wave rectifier is not efficient (40.6%) and we can not use
it for applications which need a smooth and steady DC output. For more efficient and steady DC,
we will use a full wave rectifier.
A full wave rectifier converts both halves of each cycle of an alternating wave (AC signal) into
pulsating DC signal.
We can further classify full wave rectifiers into

 Centre-tapped Full Wave Rectifier
 Full Wave Bridge Rectifier
Centre-tapped Full Wave Rectifier
Construction of Centre-tapped Full Wave Rectifier:
A centre-tapped full wave rectifier system consists of:
1. Centre-tapped Transformer
2. Two Diodes
3. Resistive Load
Centre-tapped Transformer: – It is a normal transformer with one slight modification. It has an
addition wire connected to the exact centre of the secondary winding. This type of construction
divides the AC voltage into two equal and opposite voltages namely +Ve voltage (V a) and -Ve
voltage (Vb). The total output voltages
The circuit diagram is as follows

Working of Centre-tapped Full Wave Rectifier
We apply an AC voltage to the input transformer. During the positive half-cycle of the AC
voltage, terminal 1 will be positive, centre-tap will be at zero potential and terminal 2 will be
negative potential. This will lead to forward bias in diode D1 and cause current to flow through it.
During this time, diode D2 is in reverse bias and will block current through it.
During the negative half-cycle of the input AC voltage, terminal 2 will become positive with
relative to terminal 2 and centre-tap. This will lead to forward bias in diode D 2 and cause current
to flow through it. During this time, diode D1 is in reverse bias and will block current through it.
During the positive cycle, diode D1conducts and during negative cycle diode D2 conducts and
during positive cycle. As a result, both half-cycles are allowed to pass through. The average
output DC voltage here is almost twice of the DC output voltage of a half-wave rectifier.
Output Waveforms
Filter Circuit
We get a pulsating DC voltage with a lot of ripples as the output of the centre-tapped full wave
rectifier. We cannot use this pulsating for practical applications. So, to convert the pulsating DC
voltage to pure DC voltage, we use a filter circuit as shown above. Here we place a capacitor
across the load. The working of the capacitive filter circuit is to short the ripples and block the
DC component so that it flows through another path and is available across the load. During the
positive half-wave, the diode D1starts conducting. The capacitor is uncharged, and when we
apply an input AC voltage which happens to be more than the capacitor voltage, it charges the
capacitor immediately to the maximum value of the input voltage. At this point, the supply
voltage is equal to capacitor voltage.
When the applied AC voltage starts decreasing and less than the capacitor, the capacitor starts
discharging slowly but this is slower when compared to the charging of the capacitor and it does
not get enough time to discharge entirely and the charging starts again. So around half of the
charge present in the capacitor gets discharged. During the negative cycle, the diode D2 starts
conducting, and the above process happens again. This will cause the current to flow through the
same direction across the load.
Full Wave Bridge Rectifier
Construction of Full Wave Bridge Rectifier

A full wave bridge rectifier is a type of rectifier which will use four diodes or more than that in a
bridge formation. A full wave bridge rectifier system consists of
1. Four Diodes
2. Resistive Load
We use the diodes namely A, B, C and D which form a bridge circuit. The circuit diagram is as
follows
Principle of Full Wave Bridge Rectifier
We apply an AC across the bridge. During the positive half-cycle, the terminal 1 becomes
positive, and terminal 2 becomes negative. This will cause the diodes A and C to become
forward-biased, and the current will flow through it. Meanwhile diodes B and D will become
reverse-biased and block current through them. The current will flow from 1 to 4 to 3 to 2.
During the negative half-cycle, the terminal 1 will become negative, and terminal 2 will become
positive. This will cause the diodes B and D to become forward-biased and will allow current
through them. At the same time, diodes A and C will be reverse-biased and will block the current
through them. The currentwill flow from 2 to 4 to 3 to 1.
Filter Circuit
We get a pulsating DC voltage with a lot of ripples as the output of the full wave bridge rectifier.
We can not use this voltage for practical applications. So, to convert the pulsating DC voltage to
pure DC voltage, we use a filter circuit as shown above. Here we place a capacitor across the
load. The working of the capacitive filter circuit is to short the ripples and block the DC
component so that it flows through another path and that is through the load. During the half-
wave, the diodes A and C conduct. It charges the capacitor immediately to the maximum value
of the input voltage. When the rectified pulsating voltage starts decreasing and less than the
capacitor voltage, the capacitor starts discharging and supplies current to the load. This
discharging is slower when compared to the charging of the capacitor, and it does not get enough
time to discharge entirely and the charging starts again in next pulse of the rectified voltage
waveform. So around half of the charge present in the capacitor gets discharged. During the
negative cycle, the diodes B and D start conducting, and the above process happens again. This
causes, the current continues to flow through the same direction across the load.
Characteristics of a Full-wave Rectifier
Ripple Factor
(γ)
The output we will get from the rectifier will consist of both AC and DC components. The AC
components are undesirable to us and will cause pulsations in the output. This unwanted AC
components are called Ripple. The expression ripple factor is given above where V rms is the RMS
value of the AC component and Vdcis the DC component in the rectifier.
For centre-tapped full-wave rectifier, we obtain γ = 0.48
Note: For us to construct a good rectifier, we need to keep the ripple factor as minimum as
possible. We can use capacitors or inductors to reduce the ripples in the circuit.
Rectifier Efficiency (η)
Rectifier efficiency is the ratio between the output DC power and the input AC power.
For centre-tapped full-wave rectifier, ηmax = 81.2%
Form Factor (F.F)

The form factor is the ratio betweenRMS value and average value.
For centre-tapped full wave rectifier, FF = 1.11

Advantages of Full Wave Rectifiers
 Full wave rectifiers have higher rectifying efficiency than half-wave rectifiers. This
means that they convert AC to DC more efficiently.
 They have low power loss because no voltage signal is wasted in the rectification
process.
 The output voltage of centre-tapped full wave rectifier has lower ripples than a halfwave
rectifiers.
Disadvantages of Full Wave Rectifiers
 The centre-tapped rectifier is more expensive than half-wave rectifier and tends to occupy
a lot of space.
UNIT 2
BJTs: Transistor characteristics
Introduction to a Junction Transistor
A junction transistor has three doped regions – emitter, base, and collector. These regions form two
p-n junctions between them. Depending on the number of n and p-type semiconductors in the
transistor, they are of two types:
 n-p-n transistor: A p-type semiconductor (base) separates two segments of the n-type
semiconductor (emitter and collector).
 p-n-p transistor: An n-type semiconductor (base) separates two segments of the p-type
semiconductor (emitter and collector.
As can be seen in both the figures above, all three segments have different thickness and doping
levels. The schematic symbols of both these transistors are as follows:
This segment is on one side of the transistor. It has a moderate size and is heavily doped
Emitter
causing it to supply a large number of carriers for the flow of current.
Base This segment is at the centre of the transistor. It is thin and lightly doped.
This segment is also on one side of the transistor. It is larger than the emitter and is
Collector
moderately doped. Hence, it collects most of the majority carriers supplied by the emitter.
The arrowhead shows the direction of the conventional current in the transistor. Let’s understand the
three segments in detail:
Also, in the case of a junction transistor, the depletion regions are formed at the emitter-base
junction and the base-collector junction. To understand the action of the transistor, it is important to
consider the nature of depletion regions formed at these junctions.
It is also important to note here that junction transistor was invented to produce an enlarged copy of
a signal – an amplifier. Eventually, it became equally popular as a switch.
The Amplifying Capabilities of a Junction Transistor
A junction transistor works as an amplifier when,
1. The emitter-base junction is forward biased and
2. The base-collector junction is reverse biased.
The circuit diagram for the same is as shown below:
As can be seen above, the base is the common terminal for two power supplies whose other
terminals are connected to the emitter and collector.
Some Terminologies
 The voltage between emitter and base = VEB
 The voltage between collector and base = VCB
 VEE = Power supply connected between the emitter and base

 VCC = Power supply connected between the collector and base
Let us now study the path of the current carriers in the junction transistor where –
 The emitter-base junction is forward biased and
 The Base-collector junction is reverse biased
The emitter is heavily doped and has a large concentration of the majority carriers. These majority
carriers enter the base in large numbers. Since the base is very thin and lightly doped, it has very
few majority carriers. Let’s look at the path of current in a p-n-p transistor:
p-n-p Transistor
The emitter has a large concentration of holes. The base, being an n-type semiconductor will have
electrons as its majority charge carriers. When the majority carriers (holes) enter the base from the
emitter, they swamp the majority charge carriers of the base (electrons). The base-collector junction
is reverse biased.
Hence, these holes appear as minority carriers at the junction. Hence, they can easily enter the
collector (which is a p-type semiconductor). The holes in the base can either:
Move towards the base terminal to combine with the electrons entering from outside or Cross the
junction and enter the collector.
Since the base is very thin, most of the holes find themselves near the base-collector junction
(reverse biased). Hence, they cross over to the collector rather than move to the base terminal.
Observations
The forward bias leads to a large current entering the emitter-base junction. However, most of it
diverts to the adjacent base-collector junction. Hence, the current coming out of the base is a small
fraction of that entering the junction. The total current in a forward biased diode is Ih + Ie … where
Ih is the hole current and Ieis the electron current.
The emitter current IE = Ih + Ie. However, the base current IB << Ih + Ie. This is because a big part of
IE goes to the collector instead of the base terminal. Now, current enters the emitter from outside.
Applying Kirchhoff’s law:
IE = IC + IB
where IC is the current emerging from the collector terminal. Also, IC is nearly equal to IE since IB is
very small.
n-p-n Transistor
In an n-p-n transistor, current enters from the base to the emitter. The description of the paths
followed by the majority and minority charge carriers is similar to that of the p-n-p transistor.
However, the current paths are exactly the opposite.
In an n-p-n transistor, electrons are the majority charge carriers, supplied by the n-type emitter
region. They cross the thin p-type base region and are able to reach the collector to give the
collector current, IC.
Transistor Amplifier
A transistor acts as an amplifier by raising the strength of a weak signal. The DC bias voltage
applied to the emitter base junction, makes it remain in forward biased condition. This forward
bias is maintained regardless of the polarity of the signal. The below figure shows how a
transistor looks like when connected as an amplifier.
The low resistance in input circuit, lets any small change in input signal to result in an
appreciable change in the output. The emitter current caused by the input signal contributes the
collector current, which when flows through the load resistor R L, results in a large voltage drop
across it. Thus a small input voltage results in a large output voltage, which shows that the
transistor works as an amplifier.
Example
Let there be a change of 0.1v in the input voltage being applied, which further produces a change
of 1mA in the emitter current. This emitter current will obviously produce a change in collector
current, which would also be 1mA.
A load resistance of 5kΩ placed in the collector would produce a voltage of
5 kΩ × 1 mA = 5V
Hence it is observed that a change of 0.1v in the input gives a change of 5v in the output, which
means the voltage level of the signal is amplified.
Performance of Amplifier
As the common emitter mode of connection is mostly adopted, let us first understand a few
important terms with reference to this mode of connection.
Input Resistance
As the input circuit is forward biased, the input resistance will be low. The input resistance is the
opposition offered by the base-emitter junction to the signal flow.
By definition, it is the ratio of small change in base-emitter voltage (ΔV BE) to the resulting
change in base current (ΔIB) at constant collector-emitter voltage.
Input resistance, Ri=ΔVBE/ΔIB,
Where Ri = input resistance, VBE = base-emitter voltage, and IB = base current.
Output Resistance
The output resistance of a transistor amplifier is very high. The collector current changes very
slightly with the change in collector-emitter voltage.
By definition, it is the ratio of change in collector-emitter voltage (ΔVCE) to the resulting change
in collector current (ΔIC) at constant base current.
Output resistance = Ro=ΔVCE/δic
Where Ro = Output resistance, VCE = Collector-emitter voltage, and IC = Collector-emitter

voltage.
Effective Collector Load
The load is connected at the collector of a transistor and for a single-stage amplifier, the output
voltage is taken from the collector of the transistor and for a multi-stage amplifier, the same is
collected from a cascaded stages of transistor circuit.
By definition, it is the total load as seen by the a.c. collector current. In case of single stage
amplifiers, the effective collector load is a parallel combination of RC and Ro.
Effective Collector Load, RAC=RC//Ro
=RC×RoRC+Ro=RAC
Hence for a single stage amplifier, effective load is equal to collector load RC.
Inamulti-stagamplifier
i.e.havingmorethanoneamplificationstagei.e.havingmorethanoneamplificationstage,theinput
resistance Ri of the next stage also comes into picture.
Effective collector load becomes parallel combination of RC, Ro and Ri i.e,
Effective Collector Load, RAC=RC//Ro//Ri
RC//Ri=RCRi/RC+Ri
As input resistance Ri is quite small, therefore effective load is reduced.
Current Gain
The gain in terms of current when the changes in input and output currents are observed, is called
as Current gain. By definition, it is the ratio of change in collector current (ΔIC) to the change in
base current (ΔIB).
Current gain, β=ΔICΔIBβ=ΔICΔIB
The value of β ranges from 20 to 500. The current gain indicates that input current becomes β
times in the collector current.
Voltage Gain
The gain in terms of voltage when the changes in input and output currents are observed, is
called as Voltage gain. By definition, it is the ratio of change in output voltage (ΔV CE) to the
change in input voltage (ΔVBE).
Voltage gain, AV=ΔVCEΔVBEAV=ΔVCEΔVBE
=Changeinoutputcurrent×effectiveloadChangeininputcurrent×inputresistance=Changeinoutputcu
rrent×effectiveloadChangeininputcurrent×inputresistance
=ΔIC×RACΔIB×Ri=ΔICΔIB×RACRi=β×RACRi=ΔIC×RACΔIB×Ri=ΔICΔIB×RACRi=β×RA
CRi
For a single stage, RAC = RC.
However, for Multistage,
RAC=RC×RiRC+RiRAC=RC×RiRC+Ri
Where Ri is the input resistance of the next stage.
Power Gain
The gain in terms of power when the changes in input and output currents are observed, is called
as Power gain.
By definition, it is the ratio of output signal power to the input signal power.
Power gain, AP=(ΔIC)2×RAC(ΔIB)2×RiAP=(ΔIC)2×RAC(ΔIB)2×Ri
=(ΔICΔIB)×ΔIC×RACΔIB×Ri=(ΔICΔIB)×ΔIC×RACΔIB×Ri
= Current gain × Voltage gain
Hence these are all the important terms which refer the performance of amplifiers.
We know that generally the transistor has three terminals – emitter (E), base (B) and collector.
But in the circuit connections we need four terminals, two terminals for input and another two
terminals for output. To overcome these problems we use one terminal as common for both input
and output actions. Using this property we construct the circuits and these structures are called
transistor configurations. Generally the transistor configurations are three types they are common
base (CB) configuration, common collector (CC) configuration and common emitter (CE)
configuration. The behavior of these three configurations with respect to gain is given below.
 Common Base (CB) Configuration: no current gain but voltage gain

 Common Collector (CC) Configuration: current gain but no voltage gain
 Common Emitter (CE) Configuration: current gain and voltage gain
Now we discuss about these three configurations with their input and output characteristics in the
below.
Common Base Configuration
In this configuration we use base as common terminal for both input and output signals. The
configuration name itself indicates the common terminal. Here the input is applied between the
base and emitter terminals and the corresponding output signal is taken between the base and
collector terminals with the base terminal grounded. Here the input parameters are V EB and IE and
the output parameters are VCB and IC. The input current flowing into the emitter terminal must be
higher than the base current and collector current to operate the transistor, therefore the output
collector current is less than the input emitter current.
The current gain is generally equal or less than to unity for this type of configuration. The input
and output signals are in-phase in this configuration. The amplifier circuit configuration of this
type is called as non-inverting amplifier circuit. The construction of this configuration circuit is
difficult because this type has high voltage gain values.
The input characteristics of this configuration are looks like characteristics of illuminated photo
diode while the output characteristics represents a forward biased diode. This transistor
configuration has high output impedance and low input impedance. This type of configuration
has high resistance gain i.e. ratio of output resistance to input resistance is high. The voltage gain
for this configuration of circuit is given below.
AV = Vout/Vin = (IC*RL) / (IE*Rin)
Current gain in common base configuration is given as
α = Output current/Input current
α = IC/IE
The common base circuit is mainly used in single stage amplifier circuits, such as microphone
pre amplifier or radio frequency amplifiers because of their high frequency response. The
common base transistor circuit is given below.
Input Characteristics
Input characteristics are obtained between input current and input voltage with constant output
voltage. First keep the output voltage V CB constant and vary the input voltage VEB for different
points then at each point record the input current IE value. Repeat the same process at different
output voltage levels. Now with these values we need to plot the graph between I E and
VEB parameters. The below figure show the input characteristics of common base configuration.
The equation to calculate the input resistance Rin value is given below.
Rin = VEB / IE (when VCB is constant)

Output Characteristics
The output characteristics of common base configuration are obtained between output current
and output voltage with constant input current. First keep the emitter current constant and vary
the VCB value for different points, now record the I C values at each point. Repeat the same
process at different IE values. Finally we need to draw the plot between V CB and IC at constant
IE. The below figure show the output characteristics of common base configuration. The equation
to calculate the output resistance value is given below.
Rout = VCB / IC (when IE is constant)
Common Collector Configuration
In this configuration we use collector terminal as common for both input and output signals. This
configuration is also known as emitter follower configuration because the emitter voltage follows
the base voltage. This configuration is mostly used as a buffer. These configurations are widely
used in impedance matching applications because of their high input impedance.
In this configuration the input signal is applied between the base-collector region and the output
is taken from the emitter-collector region. Here the input parameters are VBC and IB and the
output parameters are VEC and IE. The common collector configuration has high input
impedance and low output impedance. The input and output signals are in phase. Here also the
emitter current is equal to the sum of collector current and the base current. Now let us calculate
the current gain for this configuration.
Current gain, Ai = output current/Input current
Ai = IE/IB
Ai = (IC + IB)/IB
Ai = (IC/IB) + 1
Ai = β + 1
The common collector transistor circuit is shown above. This common collector configuration is
a non inverting amplifier circuit. The voltage gain for this circuit is less than unity but it has
large current gain because the load resistor in this circuit receives both the collector and base
currents.
The input characteristics of a common collector configuration are quite different from the
common base and common emitter configurations because the input voltage V BC is largely
determined by VEC level. Here,
VEC = VEB + VBC
VEB = VEC – VBC

The input characteristics of a common-collector configuration are obtained between inputs
current IB and the input voltage VCBat constant output voltage VEC. Keep the output voltage
VECconstant at different levels and vary the input voltage V BC for different points and record the
IBvalues for each point. Now using these values we need to draw a graph between the parameters
of VBC and IB at constant VEC
The operation of the common collector circuit is same as that of common emitter circuit. The
output characteristics of a common collector circuit are obtained between the output voltage
VECand output current IE at constant input current IB. In the operation of common collector circuit
if the base current is zero then the emitter current also becomes zero. As a result no current flows
through the transistor
If the base current increases then the transistor operates in active region and finally reaches to
saturation region. To plot the graph first we keep the I B at constant value and we will vary the
VECvalue for various points, now we need to record the value of IE for each point. Repeat the
same process for different IB values. Now using these values we need to plot the graph between
the parameters of IE and VCE at constant values of IB. The below figure show the output
characteristics of common collector.
Common Emitter Configuration
In this configuration we use emitter as common terminal for both input and output. This common
emitter configuration is an inverting amplifier circuit. Here the input is applied between base-
emitter region and the output is taken between collector and emitter terminals. In this
configuration the input parameters are VBE and IBand the output parameters are VCEand IC.
This type of configuration is mostly used in the applications of transistor based amplifiers. In this
configuration the emitter current is equal to the sum of small base current and the large collector
current. i.e. IE = IC + IB. We know that the ratio between collector current and emitter current
gives current gain alpha in Common Base configuration similarly the ratio between collector
current and base current gives the current gain beta in common emitter configuration.
Now let us see the relationship between these two current gains.
Current gain (α) = IC/IE

Current gain (β) = IC/IB
Collector current IC =α IE = βIB
This configuration is mostly used one among all the three configurations. It has medium input
and output impedance values. It also has the medium current and voltage gains. But the output
signal has a phase shift of 1800 i.e. both the input and output are inverse to each other.
The input characteristics of common emitter configuration are obtained between input current
IBand input voltage VBE with constant output voltage VCE. Keep the output voltage VCE constant
and vary the input voltage VBE for different points, now record the values of input current at each
point. Now using these values we need to draw a graph between the values of I B and VBE at
constant VCE. The equation to calculate the input resistance Rin is given below.
Rin = VBE/IB (when VCE is at constant)
The output characteristics of common emitter configuration are obtained between the output
current IC and output voltage VCEwith constant input current IB. Keep the base current IB constant
and vary the value of output voltage VCE for different points, now note down the value of
collector IC for each point. Plot the graph between the parameters IC and VCE in order to get the
output characteristics of common emitter configuration. The equation to calculate the output
resistance from this graph is given below.
Rout = VCE/IC (when IB is at constant)

Configurations of Transistors Comparision
The table which gives the main characteristics of a transistor in the three configurations is given
above. The BJT transistors have mainly three types of configurations. They are common-emitter,
common-base and common-collector configurations. Among all these three configurations
common-emitter configuration is mostly used type. These three have different characteristics
corresponding to both input and output signals. And also these three configurations have few
similaritie
The Operating Point:
The operating point is a specific point on transistor output characteristics at which we get good
biasing for that transistor. The operating point is a point which we can obtain from the value of
collector current Ic and collector base voltage Vcb at no input signal is applied to the transistor.
So if we want to call what is an operating point? in one line so we can say that,
“ The zero signal values of collector current (Ic) and collector-base voltage (Vcb) are known as
operating point for that transistor”.
It is called the operating point because the variations of Ic and Vce take place at this point when
an input signal is applied. This point is also called as Q point or quiescent (Silent) point because
it is a point of output characteristics when a transistor is silent i.e. in absence of the signal. l
For finding operating point first we have to find load line points( A and B ) on Ic and Vce. For
general transistor biasing circuit, output circuit equation is
Vce = Vcc – IcRc

The output characteristics of this transistor show graph between Ic and Vce. For finding
intersecting points of load line with X-axis and Y-axis we take one by one Ic=0 and then Vce=0.
First, we take Ic= 0 so that
Vce = Vcc
This value of point B will be Vcc. If we take Vce=0 then,
Ic = Vcc/ Rc
So the value of point A will be Vcc /Rc.
So now we already find two points( A and B) of this load line. So when we draw this load line,
a point at which load line intersecting with Ib is called the operating point or q-point. Hope
you know well about operating point. Let see how to find an operating point with an example or
problem.
Example:
Question – As the circuit shown below, (i) if Vcc = 12V and Rc = 6kΩ, draw the d.c load line.
What will be the Q-point if zero signal base current is 20μA and β= 50?
Here collector-emitter voltage Vce is given by,
Vce= Vcc – IcRc
When Ic = 0 A then Vce= Vcc so Vce=12v
When Vce= 0 V then Ic = Vcc/ Rc. So ic will be 12/2 A = 6 A.
By joining this two points we get load line. Zero signal base current Ib= 20 μA and β is 50. So
we have to find an intersecting point of load line with Ib.
Ic = βIb
Ic = 50 X .02 = 1 mA
Zero signal collector-emitter voltage is,
Vce= Vcc – IcRc = 12 – (1mA x 6kΩ )= 6V

So that operating point will be ( Ic, Vce ) = ( 1mA, 6V ).
Self Bias Or Emitter Bias:
A transistors steady state of operation depends a great deal on its base current, collector voltage,
and collector current and therefore, if a transistor is to operate as a linear amplifier, it must be
properly biased to have a suitable operating point.
Establishing the correct operating point requires the proper selection of bias resistors and load
resistors to provide the appropriate input current and collector voltage conditions. The correct
biasing point for a bipolar transistor, either NPN or PNP, generally lies somewhere between the
two extremes of operation with respect to it being either “fully-ON” or “fully-OFF” along its
load line. This central operating point is called the “Quiescent Operating Point”, or Q-point for
short.
When a bipolar transistor is biased so that the Q-point is near the middle of its operating range,
that is approximately halfway between cut-off and saturation, it is said to be operating as a Class-
A amplifier. This mode of operation allows the output current to increase and decrease around
the amplifiers Q-point without distortion as the input signal swings through a complete cycle. In
other words, the output current flows for the full 360o of the input cycle.
So how do we set this Q-point biasing of a transistor – The correct biasing of the transistor is
achieved using a process know commonly as Base Bias.
But before we start looking at the possible different transistor biasing arrangements, lets first
reminder ourselves of the basic transistor circuit and associated voltages and currents as shown
on the left.
The function of the “DC Bias level” or “no input signal level” is to correctly set the transistors
Q-point by setting its Collector current ( IC ) to a constant and steady state value without an input
signal applied to the transistors Base.
This steady-state or DC operating point is set by the values of the circuits DC supply voltage
( Vcc ) and the value of the biasing resistors connected the transistors Base terminal.
Since the transistors Base bias currents are steady-state DC currents, the appropriate use of
coupling and bypass capacitors will help block bias current setup for one transistor stage
affecting the bias conditions of the next. Base bias networks can be used for Common-base (CB),
common-collector (CC) or common-emitter (CE) transistor configurations. In this simple
transistor biasing tutorial we will look at the different biasing arrangements available for a
Common Emitter Amplifier.
Base Biasing a Common Emitter Amplifier
One of the most frequently used biasing circuits for a transistor circuit is with the self-bias of the
emitter-bias circuit where one or more biasing resistors are used to set up the initial DC values of
transistor currents, ( IB ), ( IC ) and ( IE ).
The two most common forms of transistor biasing are: Beta Dependent and Beta Independent.
Transistor bias voltages are largely dependent on transistor beta, ( β ) so the biasing set up for
one transistor may not necessarily be the same for another transistor. Transistor biasing can be
achieved either by using a single feed back resistor or by using a simple voltage divider network
to provide the required biasing voltage.
The following are five examples of transistor Base bias configurations from a single supply
( Vcc ).
Fixed Base Biasing a Transistor
The circuit shown is called as a “fixed base bias circuit”, because the transistors base
current, IB remains constant for given values of Vcc, and therefore the transistors operating point
must also remain fixed. This two resistor biasing network is used to establish the initial operating
region of the transistor using a fixed current bias.
This type of transistor biasing arrangement is also beta dependent biasing as the steady-state
condition of operation is a function of the transistors beta β value, so the biasing point will vary
over a wide range for transistors of the same type as the characteristics of the transistors will not
be exactly the same.
The emitter diode of the transistor is forward biased by applying the required positive base bias
voltage via the current limiting resistor RB. Assuming a standard bipolar transistor, the forward
base-emitter voltage drop will be 0.7V. Then the value of RB is simply: (VCC – VBE)/IB where IB is
defined as IC/β.
With this single resistor type of biasing method the biasing voltages and currents do not remain
stable during transistor operation and can vary enormously. Also the temperature of the transistor
can adversely effect the operating point.
Collector Feedback Biasing a Transistor
This self biasing collector feedback configuration is another beta dependent biasing method that
requires only two resistors to provide the necessary DC bias for the transistor. The collector to
base feedback configuration ensures that the transistor is always biased in the active region
regardless of the value of Beta (β) as the DC base bias voltage is derived from the collector
voltage, VC providing good stability.
In this circuit, the base bias resistor, RB is connected to the transistors collector C, instead of to
the supply voltage rail, Vcc. Now if the collector current increases, the collector voltage drops,
reducing the base drive and thereby automatically reducing the collector current to keep the
transistors Q-point fixed. Then this method of collector feedback biasing produces negative
feedback as there is feedback from the output to the input through resistor, RB.
The biasing voltage is derived from the voltage drop across the load resistor, RL. So if the load
current increases there will be a larger voltage drop across RL, and a corresponding reduced
collector voltage, VC which will cause a corresponding drop in the base current, IB which in turn,
brings IC back to normal.
The opposite reaction will also occur when transistors collector current becomes less. Then this
method of biasing is called self-biasing with the transistors stability using this type of feedback
bias network being generally good for most amplifier designs.
Dual Feedback Transistor Biasing
Adding an additional resistor to the base bias network of the previous configuration improves
stability even more with respect to variations in Beta, ( β ) by increasing the current flowing
through the base biasing resistors.
The current flowing through RB1 is generally set at a value equal to about 10% of collector
current, IC. Obviously it must also be greater than the base current required for the minimum
value of Beta, β.
One of the advantages of this type of self biasing configuration is that the resistors provide both
automatic biasing and Rƒ feedback at the same time.
Transistor Biasing with Emitter Feedback
This type of transistor biasing configuration, often called self-emitter biasing, uses both emitter
and base-collector feedback to stabilize the collector current even more as resistors RB1 and RE as
well as the base-emitter junction of the transistor are all effectively connected in series with the
supply voltage, VCC.
The downside of this emitter feedback configuration is that the output has reduced gain because
of the base resistor connection as the collector voltage determines the current flowing through
the feedback resistor, RB1 producing what is called “degenerative feedback”.
The current flowing from the emitter, IE (which is a combination of IC + IB) causes a voltage drop
to appear across RE in such a direction, that it reverse biases the base-emitter junction.
So if the emitter current increases, voltage drop I*RE also increases. Since the polarity of this
voltage reverse biases the base-emitter junction, IB automatically decrease. Therefore the emitter
current increase less than it would have done had there been no self biasing resistor.
Resistor values are generally set so that the voltage drop across emitter resistor RE is
approximately 10% of VCC and the current flowing through resistor RB1 is 10% of the collector
current IC.
This type of transistor biasing configuration works best at relatively low power supply voltages.
Voltage Divider Transistor Biasing
The common emitter transistor is biased using a voltage divider network to increase stability.
The name of this biasing configuration comes from the fact that the two
resistors RB1 and RB2 form a voltage or potential divider network across the supply with their
center point junction connected the transistors base terminal as shown.
This voltage divider biasing configuration is the most widely used transistor biasing method, as
the emitter diode of the transistor is forward biased by the voltage dropped across resistor RB2.
Also, voltage divider network biasing makes the transistor circuit independent of changes in beta
as the voltages at the transistors base, emitter, and collector are dependant on external circuit
values.
To calculate the voltage developed across resistor RB2 and therefore the voltage applied to the
base terminal we simply use the voltage divider formula for resistors in series.
Generally the voltage drop across resistor RB2 is much less than for resistor RB1. Then clearly the
transistors base voltage VB with respect to ground, will be equal to the voltage across RB2.
The current flowing through resistor RB2 is generally set at 10 times the value of the required
base current IB so that it has no effect on the voltage divider current or changes in Beta.
The goal of Transistor Biasing is to establish a known Q-point in order for the transistor to
work efficiently and produce an undistorted output signal. Correct biasing of the transistor also
establishes its initial AC operating region with practical biasing circuits using either a two or
four-resistor bias network.
In bipolar transistor circuits, the Q-point is represented by ( VCE, IC ) for the NPN transistors or
( VEC, IC ) for PNP transistors. The stability of the base bias network and therefore the Q-point is
generally assessed by considering the collector current as a function of both Beta (β) and
temperature.
Here we have looked briefly at five different configurations for “biasing a transistor” using
resistive networks. But we can also bias a transistor using either silicon diodes, zener diodes or
active networks all connected to the base terminal of the transistor or by biasing the transistor
from a dual power supply.
Bias Compensation
So far we have seen different stabilization techniques. The stabilization occurs due to negative
feedback action. The negative feedback, although improves the stability of operating point, it
reduces the gain of the amplifier.
As the gain of the amplifier is a very important consideration, some compensation techniques
are used to maintain excellent bias and thermal stabilization. Let us now go through such bias
compensation techniques.
Diode Compensation for Instability
These are the circuits that implement compensation techniques using diodes to deal with biasing
instability. The stabilization techniques refer to the use of resistive biasing circuits which permit
IB to vary so as to keep IC relatively constant.
There are two types of diode compensation methods. They are −
 Diode compensation for instability due to VBE variation
 Diode compensation for instability due to ICO variation
Let us understand these two compensation methods in detail.
Diode Compensation for Instability due to VBE Variation

In a Silicon transistor, the changes in the value of V BE results in the changes in IC. A diode can
be employed in the emitter circuit in order to compensate the variations in V BE or ICO. As the
diode and transistor used are of same material, the voltage V D across the diode has same
temperature coefficient as VBE of the transistor.
The following figure shows self-bias with stabilization and compensation.
The diode D is forward biased by the source V DD and the resistor RD. The variation in VBE with
temperature is same as the variation in V D with temperature, hence the quantity (VBE – VD)
remains constant. So the current IC remains constant in spite of the variation in VBE.
Diode Compensation for Instability due to ICO Variation

The following figure shows the circuit diagram of a transistor amplifier with diode D used for
compensation of variation in ICO.
So, the reverse saturation current IO of the diode will increase with temperature at the same rate
as the transistor collector saturation current ICO.
I=VCC−VBE/R ≅ VCC/R=Constant
The diode D is reverse biased by VBE and the current through it is the reverse saturation current
IO.
Now the base current is,
IB=I−IO
Substituting the above value in the expression for collector current.
IC=β(I−IO)+(1+β)ICO
If β ≫ 1,
IC=βI−βIO+βICO
I is almost constant and if IO of diode and ICO of transistor track each other over the operating
temperature range, then IC remains constant.
Other Compensations
There are other compensation techniques which refer to the use of temperature sensitive devices
such as diodes, transistors, thermistors, Sensistors, etc. to compensate for the variation in
currents.
There are two popular types of circuits in this method, one using a thermistor and the other
using a Sensistor. Let us have a look at them.
Thermistor Compensation
Thermistor is a temperature sensitive device. It has negative temperature coefficient. The
resistance of a thermistor increases when the temperature decreases and it decreases when the
temperature increases. The below figure shows a self-bias amplifier with thermistor
compensation.
In an amplifier circuit, the changes that occur in I CO, VBE and β with temperature, increases the
collector current. Thermistor is employed to minimize the increase in collector current. As the
temperature increases, the resistance RT of thermistor decreases, which increases the current
through it and the resistor RE. Now, the voltage developed across RE increases, which reverse
biases the emitter junction. This reverse bias is so high that the effect of resistors R 1 and
R2 providing forward bias also gets reduced. This action reduces the rise in collector current.
Thus the temperature sensitivity of thermistor compensates the increase in collector current,
occurred due to temperature.
Sensistor Compensation
A Sensistor is a heavily doped semiconductor that has positive temperature coefficient. The
resistance of a Sensistor increases with the increase in temperature and decreases with the
decrease in temperature. The figure below shows a self-bias amplifier with Sensistor
compensation.
In the above figure, the Sensistor may be placed in parallel with R 1 or in parallel with RE. As the
temperature increases, the resistance of the parallel combination, thermistor and R 1 increases
and their voltage drop also increases. This decreases the voltage drop across R 2. Due to the
decrease of this voltage, the net forward emitter bias decreases. As a result of this, ICdecreases.
Hence by employing the Sensistor, the rise in the collector current which is caused by the
increase of ICO, VBE and β due to temperature, gets controlled.
Thermal Resistance
The transistor is a temperature dependent device. When the transistor is operated, the collector
junction gets heavy flow of electrons and hence has much heat generated. This heat if increased
further beyond the permissible limit, damages the junction and thus the transistor.
In order to protect itself from damage, the transistor dissipates heat from the junction to the
transistor case and from there to the open air surrounding it.
Let, the ambient temperature or the temperature of surrounding air = TAoC
And, the temperature of collector-base junction of the transistor = TJoC
As TJ > TA, the difference TJ - TA is greater than the power dissipated in the transistor P D will be
greater. Thus,
TJ−TA∝PD
TJ−TA=HPD
Where H is the constant of proportionality, and is called as Thermal resistance.
Thermal resistance is the resistance to heat flow from junction to surrounding air. It is denoted
by H.
H=TJ−TAPD
The unit of H is oC/watt.
If the thermal resistance is low, the transfer of heat from the transistor into the air, will be easy.
If the transistor case is larger, the heat dissipation will be better. This is achieved by the use of
Heat sink.
Heat Sink
The transistor that handle larger powers, dissipates more heat during operation. This heat if not
dissipated properly, could damage the transistor. Hence the power transistors are generally
mounted on large metal cases to provide a larger area to get the heat radiated that is generated
during its operation.
The metal sheet that helps to dissipate the additional heat from the transistor is known as
the heat sink. The ability of a heat sink depends upon its material, volume, area, shape, contact
between case and sink, and the movement of air around the sink.
The heat sink is selected after considering all these factors. The image shows a power transistor
with a heat sink.
A tiny transistor in the above image is fixed to a larger metal sheet in order to dissipate its heat,
so that the transistor doesn’t get damaged.
Thermal Runaway
The use of heat sink avoids the problem of Thermal Runaway. It is a situation where an
increase in temperature leads to the condition that further increase in temperature, leads to the
destruction of the device itself. This is a kind of uncontrollable positive feedback.
Heat sink is not the only consideration; other factors such as operating point, ambient
temperature, and the type of transistor used can also cause thermal runaway.
Thermal runaway and thermal stability
PC =VCB IC
A DC Power Pc is developed across the collector junction
VCE = VCB + VBE

This DC power will be dissipated in the form of heat.The temperature of the junction will
become higher than the surrounding temp. Due to increase in the temperature of collector
junction, ICO will increase, VBE will decrease.
The regenerative heating cycle thus produced is called thermal runaway.

In a self-biased CE amplifier a d.c power P C = VCEIC is developed at the collector junction of the
transistor. With no signal present, this d.c power is completely dissipated in the form of heat.
For dissipating power (heat) to the surrounding the junction temp because higher than the
surrounding temperature. Increase in junction temp is accompanied by an increase in collector
current IC. If increase in collector current IC produces further increase in power dissipation,
Junction temperature will rise further.The regenerative cycle thus produced is called thermal
runaway. If the phenomena of thermal runaway is allowed to continue, the device may burn out
or may be destroyed completely.
Thermal resistance:- Under steady state or equilibrium condition, the temp rise at the collector
junction is proportional to power dissipated at the collator junction.
Or Tj-Ta= θPd
Where Tj --> junction temp in ˚C
TA --> Ambient temp. (Temp of the surrounding)in ˚C
PD --> Power dissipated in the collector junction.
θ --> proportionality constant called thermal resistance.
∂Tj – θ = θ ∂PD

Condition for avoiding thermal runaway:
Thermal stability of a self-biased BJT circuit (ckt)
PC = VCEIC----------------(i)
PC = IC {VCC – IC (RC +Re)}
So from (ii)
VCC – 2IC (RC +Re) < 0
--> 2IC (RC + Re) > VCC

If (iv) is satisfied thermal runaway will not take place
= VCC – IC (RC + Re)

CE
Low frequency small signal equivalent circuit model of Bipolar Junction

Transistor (BJT)
When signal frequency is low amplitude is small.
Highest frequency is the order of 1014 Hz
So frequency range is 0-1014 Hz
High frequency: -
The signal frequency for which the device capacitances have appreciable effect on the behavior,
response or performance of the device is called as high frequency signal.
Low frequency: -
The signal frequency for which the device capacitances have no effect on the behavior, response
or performance of the device is called low frequency signal.
iB- total instantaneous value of base current.
Small signal: -
If is the amplitude of the input and output signals are small in comparison to quiescent value
voltage and current, they are called small signals.
Large signal: -
If the amplitude of the signal are comparable or large in comparison to the quiescent value of
voltage & current, they are called large signal.
Equivalent circuit: -
An electrical circuit (network) which closely approximates the actual behaviour of a

semiconductor device under specified operating condition is called equivalent circuit model of
the device.
In active region, Ic= βIB
Commonly used transistor equivalent ckt. Produce are of two types:-
(1) remodel: - It is derived from the input and output characteristics of the transistor.
(2) hybrid model

CE Amplifier response:
The Amplifier is an electronic circuit that is used to increase the strength of a weak input signal
in terms of voltage, current, or power. The process of increasing the strength of a weak signal is
known as Amplification. One most important constraint during the amplification is that only the
magnitude of the signal should increase and there should be no changes in original signal shape.
The transistor (BJT, FET) is a major component in an amplifier system. When a transistor is used
as an amplifier, the first step is to choose an appropriate configuration, in which device is to be
used. Then, the transistor should be biased to get the desired Q-point. The signal is applied to the
amplifier input and output gain is achieved. In this article, we will discuss common emitter
amplifier analysis.
Common Emitter Amplifier Configuration
In Common Emitter Amplifier Configuration, the Emitter of a BJT is common to both the input
and output signal as shown below. The arrangement is the same for a PNP transistor, but bias
will be opposite w.r.t NPN transistor.
NPN and PNP CE Configuration Amplifier
Operation of Common Emitter Amplifier
When a signal is applied across the emitter-base junction, the forward bias across this junction
increases during the upper half cycle. This leads to increase the flow of electrons from the
emitter to a collector through the base, hence increases the collector current. The increasing
collector current makes more voltage drops across the collector load resistor RC.
The negative half cycle decreases the forward bias voltage across the emitter-base junction. The
decreasing collector-base voltage decreases the collector current in the whole collector resistor
Rc. Thus, the amplified load resistor appears across the collector resistor. The common emitter
amplifier circuit is shown below figure (a).
CE
Amplifier
From the voltage waveforms for the CE circuit shown in Fig. (b) It is seen that there is an 180-
degree phase shift between the input and output waveforms.
Common Emitter Amplifier Circuit Elements and their Functions
Biasing Circuit/ Voltage Divider

The resistances R1, R2 and RE used to form the voltage biasing and stabilisation circuit. The
biasing circuit needs to establish a proper operating Q-point otherwise, a part of the negative half
cycle of the signal may be cut-off in the output.
Input Capacitor (C1)
X
The capacitor C1 is used to couple the signal to the base terminal of the BJT. If it is not there, the
signal source resistance, Rs will come across R2 and hence, it will change the bias. C1 allows
only the AC signal to flow but isolates the signal source from R2
Emitter Bypass Capacitor (CE)

An Emitter bypass capacitor CE is used parallel with RE to provide a low reactance path to the
amplified AC signal. If it is not used, then the amplified AC signal following through RE will
cause a voltage drop across it, thereby dropping the output voltage.
Coupling Capacitor (C2)

The coupling capacitor C2 couples one stage of amplification to the next stage. This technique
used to isolate the DC bias settings of the two coupled circuits.
CE amplifier circuit currents
IB = DC base current when no signal is applied.
ib = AC base when AC signal is applied and iB = total base current.
Collector current iC = IC+ic where,
iC = total collector current
IC = zero signal collector current.
ic = AC collector current when AC signal is applied.
Emitter Current iE = IE + ie where,
IE = Zero signal emitter current.

Ie = AC emitter current when AC signal is applied.
iE = total emitter current.
CE Amplifier Frequency Response
The voltage gain of a CE amplifier varies with signal frequency. It is because reactances of the
capacitors in the circuit changes with signal frequency and hence affects the output voltage. The
curve drawn between voltage gain and the signal frequency of an amplifier is known as
frequency response. Below figure shows the frequency response of a typical CE amplifier.
F
requency Response of Common Emitter Amplifier
From the above graph, we observe that the voltage gain drops off at low (< FL) and high (> FH)
frequencies, whereas it is constant over the mid-frequency range (FL to FH).
At low frequencies (< FL) The reactance of coupling capacitor C2 is relatively high and hence
very small part of the signal will pass from amplifier stage to the load.
Moreover, CE cannot shunt the RE effectively because of its large reactance at low frequencies.
These two factors cause a drops off of voltage gain at low frequencies.
X
At high frequencies (> FH) The reactance of coupling capacitor C2 is very small and it behaves
as a short circuit. This increases the loading effect of the amplifier stage and serves to reduce the
voltage gain.
Moreover, at high frequencies, the capacitive reactance of base-emitters junction is low which
increases the base current. This frequency reduces the current amplification factor β. Due to
these two reasons, the voltage gain drops off at high frequency.
At mid frequencies (FL to FH) The voltage gain of the amplifier is constant. The effect of the
coupling capacitor C2 in this frequency range is such as to maintain a constant voltage gain.
Thus, as the frequency increases in this range, the reactance of CC decreases, which tend to
increase the gain.
However, at the same time, lower reactance means higher almost cancel each other, resulting in a
uniform fair at mid-frequency.
Common Emitter Amplifier analysis
The first step in AC analysis of Common Emitter amplifier circuit is to draw AC equivalent
circuit by reducing all DC sources to zero and shorting all the capacitors. Below figure shows the
AC equivalent circuit.
AC Equivalent Circuit for CE Amplifier

The next step in the AC analysis is to draw h-parameter circuit by replacing the transistor in the
AC equivalent circuit with its h-parameter model. Below figure shows the h-parameter
equivalent circuit for CE circuit.
h-Parameter Equivalent Circuit for Common Emitter Amplifier
The typical CE circuit performance is summarised below:
 Device input impedance, Zb = hie

 Circuit input impedance, Zi = R1 || R2 || Zb
 Device output impedance, Zc= 1/hoe
 Circuit output impedance, Zo = RC || ZC ≈ RC
 Circuit voltage gain, Av = -hfe/hie*(Rc|| RL)
 Circuit current gain, AI = hfe. RC. Rb/ (Rc+RL) (Rc+hie)
 Circuit power gain, Ap = Av * Ai
Applications Of CE Amplifier
 The common emitter circuit is popular because it’s well-suited for voltage amplification,
especially at low frequencies.
 Common-emitter amplifiers are also used in radio frequency transceiver circuits.
 Common emitter configuration commonly used in low-noise amplifiers.
Emitter Follower
The input and output of an emitter follower are the base and the emitter, respectively, and the
collector is at AC zero. The circuit is therefore a common-collector circuit (for AC).
The negative feedback effect due to can be shown qualitatively:
The DC
Solving this eq for Ib we get

Example
Assume , , . Find so that the DC operating point

is in the middle of the load line.
For to be in the middle of the load line, we need to
have , i.e., :
Solving the equation for we get . Now we have
AC small-signal equivalent circuit
The AC equivalent circit (based on small signal model of the transistor) of the emitter follower
can be found as:

Based on this small signal model, the three system parameters: voltage gain, input resistance, and
output resistance can be obtained as shown below.
 AC voltage gain:
As is significantly greater than and , it can be neglected in the analysis
below.
The voltage gain can be found to be:
As , the voltage gain is smaller than but

approximately equal to 1. Note that is positive, i.e., the output voltage is in phase with
the input voltage.
 Input resistance:
The input resistance is the parallel combination of and the resistance of the
circuit to right of the base of the transistor, including the load , which can be found
as the ratio of the voltage and the current .
therefore we get
and the overall input resistance is

Comparing this with the input resistance of the common-emitter
circuit , we see that the emitter follower has much higher

input resistance.
 Output resistance:
The output resistance is the parallel combination of and the resistance of the
circuit to the left of the emitter of the transistor (including ), which can be found as
the ratio of the open-circuit voltage (with ) and the short-circuit
current (with ).
o Find open-circuit voltage :
is approximately the same as the source voltage , as the voltage

gain of the emitter follower is close to unity.
o Find short-circuit current :
We therefore get
and the overall output resistance can therefore be found to be

Conclusion:
The emitter follower is a circuit with deep negative feedback, i.e., 100% of its output
is fed back to become part of its input . The fact that this is a negative feedback can be seen
by:
Due to this deep negative feedback, it has the following properties:
 The voltage gain is smaller than but very close to unity.
 The input resistance is large
 The output resistance is small .
The emitter follower acts as an impedance transformer with a ratio of , i.e., the input resistance
is times greater than and the output resistance is times smaller than .
Although the emitter follower circuit does not amplify the signal voltage, it drastically improves
the input and output resistances, compared with the input resistance and output
resistances of the common-emitter transistor circuit. Specifically, due to its high
input resistance , it draws very little current from the source and causes little internal
voltage drop in the source, and also due to its low output resistance , I can drive heavy load
(low ) without lowering the output voltage. It is therefore widely used as both the input and
output stages for a multi-stage voltage amplification circuit.
Common emitter RC coupled amplifier.
The common emitter RC coupled amplifier is one of the simplest and elementary transistor
amplifier that can be made. Don’t expect much boom from this little circuit, the main purpose of
this circuit is pre-amplification i.e to make weak signals strong enough for further processing or
amplification. If designed properly, this amplifier can provide excellent signal characteristics.
The circuit diagram of a single stage common emitter RC coupled amplifier using transistor is
shown in Fig1.
RC coupled amplifier
Capacitor Cin is the input DC decoupling capacitor which blocks any DC component if present
in the input signal from reaching the Q1 base. If any external DC voltage reaches the base of Q1,
it will alter the biasing conditions and affects the performance of the amplifier.
R1 and R2 are the biasing resistors. This network provides the transistor Q1’s base with the
necessary bias voltage to drive it into the active region. The region of operation where the
transistor is completely switched of is called cut-off region and the region of operation where the
transistor is completely switched ON (like a closed switch) is called saturation region. The
region in between cut-off and saturation is called active region. Refer Fig 2 for better
understanding. For a transistor amplifier to function properly, it should operate in the active
region. Let us consider this simple situation where there is no biasing for the transistor. As we all
know, a silicon transistor requires 0.7 volts for switch ON and surely this 0.7 V will be taken
from the input audio signal by the transistor. So all parts of there input wave form with
amplitudeÂ â‰¤ 0.7V will be absent in the output waveform. In the other hand if the transistor
is given with a heavy bias at the base ,it will enter into saturation (fully ON) and behaves like a
closedÂ switchÂ so that any further change in the base current due to the input audio signal will
not cause any change in the output. The voltage across collector and emitter will be 0.2V at this
condition (Vce sat = 0.2V). That is why proper biasing is required for the proper operation of a
transistor amplifier.
BJT output characteristics
Cout is the output DC decoupling capacitor. It prevents any DC voltage from entering into the
succeeding stage from the present stage. If this capacitor is not used the output of the amplifier
(Vout) will be clamped by the DC level present at the transistors collector.
Rc is the collector resistor and Re is the emitter resistor. Values of Rc and Re are so selected that
50% of Vcc gets dropped across the collector & emitter of the transistor.This is done to ensure
that the operating point is positioned at the center of the load line. 40% Â of Vcc is dropped
across Rc and 10% of Vcc is dropped across Re. A higher voltage drop across Re will reduce the
output voltage swing and so Â it is a common practice to keep the voltage drop across Re =
10%Vcc .Â Ce is the emitter by-pass capacitor. At zero signal condition (i.e, no input) only
theÂ quiescent current (set by the biasing resistors R1 and R2 flows through the Re). This
current is a direct current of magnitude few milli amperes and Ce does nothing. When input
signal is applied, the transistor amplifies it and as a result a corresponding alternating current
flows through the Re. The job of Â Ce is to bypass this alternating component of Â the emitter
current. If Ce is not there , the entire emitter current will flow through Re and that causes a large
voltage drop across it. This voltage drop gets added to the Vbe of the transistor and the bias
settings will be altered. It reality, it is just like giving a heavy negative Â feedback and so it
drastically reduces the gain.
Design of RC coupled amplifier.
The design of a single stage RC coupled amplifier is shown below.
The nominal vale of collector current Ic and hfe can be obtained from the datasheet of the
transistor.
Design of Re and Ce.
Let voltage across Re; VRe = 10%Vcc ………….(1)
Voltage across Rc; VRc = 40% Vcc. ……………..(2)
The remaining 50% will drop across the collector-emitter .
From (1) and (2) Â Rc =0.4 (Vcc/Ic) Â and Re = 01(Vcc/Ic).
Design of R1 and R2.
Base current Ib = Ic/hfe.
Let Ic â‰ˆ IeÂ .
Let current through R1; IR1 Â = 10Ib.
Also voltage across R2 ; VR2 must be equal to Vbe + VRe. From this VR2 can be found.
There fore VR1 = Vcc-VR2. Since VR1 ,VR2 and IR1 are found we can find R1 and R2 using
the following equations.
R1 = VR1/IR1 and R2 = VR2/IR1.Â
Finding Ce.
Impedance of emitter by-pass capacitor should be one by tenth of Re.
i.e, XCe = 1/10 (Re) .
Also XCe = 1/2âˆFCe.
F can be selected to be 100Hz.
From this Ce can be found.
Finding Cin.
Impedance of the input capacitor(Cin) should be one by tenth of the transistors input impedance
(Rin).
i.e, XCin = 1/10 (Rin)
Rin = R1 parallel R2 parallel (1 + (hfeÂ re))
re = 25mV/Ie.
Xcin = 1/2âˆFCin.
From this Cin can be found.
Finding Cout.
Impedance of the output capacitor (Cout) must be one by tenth of the circuit’s output resistance
(Rout).
i.e, XCout = 1/10 (Rout).
Rout = Rc.
XCout = 1/ 2âˆFCout.
From this Cout can be found.
Setting the gain.
Introducing a suitable load resistor RL across the transistor’s collector and ground will set the
gain. This is not shown in Â Fig1.
Expression for the voltage gain (Av) of a common emitter transistor amplifier is as follows.
Av = -(rc/re)
re = 25mV/Ie
and rc = Rc parallel RL
From this RL can be found.
MULTI STAGE AMPLIFIER
A single stage of amplifier can provide only a limited current gain or voltage gain. Most of the
applications require much higher gain. Hence, we usually use several amplifier stages connected in
cascade i.e. connected such that the output of one stage becomes the input to the next stage.
Thus, a multistage amplifier or cascade amplifier may provide a higher voltage gain or current
gain.
Cascading of amplifier stages is usually done to increase the total gain of the amplifier.
However, sometimes cascading is done to get the desired output and input impedance for
specific applications. Figure 1 gives the block diagram of two-stage amplifier. The first stage is
driven by a voltage source Vs having series source resistance Rs. Alternatively, the driving source
may be current source Is with shunt resistance Rs. the output of the first stage is fed to the input
of the second stage while the output of the second stage feeds the load impedance ZL.
Actual voltage available at the input of the first stage is V i while V0 is the output voltage of the
second stage. Then the ratio forms the voltage gain of the two stage cascade amplifier. Instead
of two stages as shown in figure 3, we may have three or more stages connected in cascade
amplifier, it becomes possible to amplify a weak input voltage Viof just a few microvolts to get
an output voltage V0 of several volts.
Cascading of Amplifier Stage using Transistor
Transistor amplifier may be connected in any of the three configurations namely common

emitter (CE), common base (CB) and common collector (CC). However, in cascade amplifier
meant for providing high gain, only CE amplifier stage are connected in cascade. CB and CC
configurations can not be used for this purpose.
Figure 2 gives the circuit of a two stage CE audio amplifier. The circuit gives the typical biasing
arrangement and use of coupling capacitors Cb1 and Cb2. Typical values of circuit components are
also given. The load impedance is a resistor while coupling is through a capacitor. Hence this
cascade amplifier forms the so-called resistance – Capacitance coupled or RC coupled amplifier.
Other circuit arrangement is also popular for specific uses. However, we here take up R.C.
coupled amplifier since this is the one most popularly used for audio frequency amplification.
Circuit of figure 2 is given here just to give an impression as to what a typical 2-stage CE audio
amplifier looks like.
Analysis | Cascading of Amplifier Stages
For the purpose of analysis we take up a general n-stage CE cascade amplifier. Figure 3 gives the
block diagram of the same giving the various voltages, currents and resistances involved. In
Figure 3, the biasing arrangement and coupling elements have not been shown for the sake of
celerity. We now proceed to derive expressions for voltage gain, current gain, power gain, input
impedance and output impedance of this amplifier.
(A) Voltage Gain:
The voltage gain of the complete cascade amplifier is simply the product of the voltage gains of
the individual stage. This is proved below.
Voltage gain of first stage is,
…..(1)
Where AV1 is the magnitude of the voltage gain and is the phase angle of the output voltage
V2 relative to the input voltage V1. The output voltage V2 of the first stage forms the input
voltage of the second stage. Hence
Voltage gain of second stage is,
……(2)
Similar expressions may be written for the remaining stages.
Then the voltage gain of the complete n-stage cascade amplifier is given by,
…..(3)
Where Av is the magnitude of the voltage gain and is the phase angle of the output voltage
V0 relative to the input voltage V1
But ……(4)
From equation 4 we conclude that
……(5)
Or
…..(6)
Hence ……(7)
And ……(8)
From Equation (7) we conclude that the magnitude of voltage gain of the complete cascade
amplifier is equal to the product of the magnitude of voltage gains of the individual stages.
From Equations 8 we conclude that the phase shift of the voltage gain of the complete cascade
amplifier is equal to the sum of the phase shift of the individual stages.
Calculation of the Voltage Gain Avk of Kth stage:
Figure 4 shows one intermediate stage, say kth stage, of n-stage cascade amplifier.
Then the voltage gain of this kth stage is given by,
…..(9)
Where Rik is the effective load impedance at the collector of the kth stage.
Quantities AIK, RLK and Rik may be evaluated on starting from the last stage i.e. n th stage and
processing backward. Thus, for the nth stage, current gain ALn and input resistance Rin are given
by,
……..(10)
And,
….(11)
Where RLn is the effective load impedance of the last stage and is equal to Ren.
For the (n-1)th stage, effective load impedance Ri(n-1) is equal to Rc(n-1) || Rin. Thus,
…..(12)
Next we calculate the current gain AI(n-1) of the (n-1)th stage using Equation 10 on replacing
RLn by RL(n-1). Similarly, we calculate the input impedance Ri(n-1) of the (n-1)th stage from Equation
9 no replacing AIn by AI(n-1) and RLn by RL(n-1). Thus, we procced backward to calculate the current
gain and input impedance of each stage from n th to the first. Then the voltage gain of each stage
may be calculated using Equation 8 relevant to the stage.
Voltage gain of the complete cascade amplifier may then be calculated using Equation 5.
Calculation of Current Gain AI of Kth Stage
…..(13)
Now ……(14)
Or, …..(15)

Where AI1 is the base-to-collector current gain of the first stage and equals while A’I2,
A’I3 etc. are the collector-to-collector current gains of second, third etc. stages.
For kth stage, collector-to-collector current gain A’IK is given by
…..(16)
Similarly, base-to-collector current gain AIK is given by
…..(17)
Relation between A’IK and AIK
From Figure 4,
…..(18)
Where Rik is the input impedance of the kth stage.
Hence …..(19)
Value of A’IK as given by Equation 19 may be substituted in equation 15 to give the resultant
current gain AI.
Steps involved in Evaluating Current gain AI
1. Find the base-to-collector current gain AIn for the nth or the last stage making use of
equation 10.
2. Find the input impedance of the last stage making use of Equations 11.
3. Calculate the effective load resistance RL(n-1) for the (n-1)th stage using Equation 12
4. Repeat steps 1 to 3 for (n-1)th, (n-1)th stage to find the AIK for the kth stage.
5. Find the collector-to-collector gain A’IK for the kth stage using equation 19.
6. Find the resultant current gain AI for the complete n-stage cascade amplifier using
Equation 15.
Overall Current Gain Considering the source Resistance:
Let the input stage of the n-stage cascade amplifier be driven from a current source I s as shown
figure 5. Then the overall current gain of the cascade amplifier is given by,
…..(20)
Alternative Method of Calculating AI | Cascading of Amplifier Stages
Alternative we may calculate AI making use of the following relation:
…….(21)
Where Av is the voltage gain of the complete cascade amplifier.
…..(22)
Alternative using Equation 21, we get, …..(23)
Input Impedance | Cascading of Amplifier Stages
The input impedance of the complete cascade amplifier may be found following the same
procedure as for calculating the voltage gain. Thus, we start from the last stage and proceed
backward. The steps involved are as below:
1. Calculate base-to-collector current gain AIn for the last stage using Equation 10.
2. Calculate input impedance Rin of the last stage using Equation 11.
3. Calculate effective load impedance for the (n-1)th stage using Equations 12.
4. Calculate and for the (n-1)th stage and for the (n-2)th
5. Proceed in this manner and finally calculate the input impedance of the first stage.
Output Impedance | Cascading of Amplifier Stages
For calculating the output impedance of each stage and that of the complete cascade amplifier,
we proceed forward starting from the first stage. The output admittance of the first stage is given
by,
…..(24)
Then gives the corresponding output impedance R01.
The output terminal impedance Rot1 of the first stage is equal to the parallel combination of
R01 and Roc1.
Thus …..(25)
This Rot1 forms the source impedance for the second stage. Equation 24 may now be used again
to find Y02 of the second stage using R0t1 in place of Rs. The output terminal impedance Rot2 of
the second stage is parallel combination of and RC2.
We may proceed in this manner to find the output impedance of the third, fourth etc. stage and
finally the last stage. In the above derivation we have assumed CE configuration. However, the
method given above for calculating AV, AI, Ri and R0 is general in nature and may also be used
for CB and CC configurations.
Choice of Transistor Configuration in a Multistage Amplifier
Choice of transistor configuration to be used for intermediate stages in a multistage amplifier

depends on the maximum voltage gain provided by the configuration. hence CC configuration
can not be used since a stage of CC amplifier gives voltage gain less than unity. A single stage
CB amplifier, no doubt, gives voltage gain more than unity but intermediate stage can not use
even CB configuration since the overall voltage gain of multistage amplifier using VB
configuration is low, almost equal to the voltage gain of the last stage alone. This becomes
evident from the following discussion.
The voltage gain AVk of any stage, say Kth stage is given by,
……(26)
But, …..(27)
Hence,
Assuming the stage to be identical i.e. assuming that Ri(k+1) = Rik, we conclude that RLK < Rik.
Further the maximum value of current gain AIK in CB configuration in hfb which is slightly less
than unity. Hence as per Equation 26, A Vkfor any CB stage except the last stage is less than unity.
Hence we conclude that even CB configuration is not suitable for use in intermediate stages.
CE stage are popularly used for intermediate stages since h fe for a CE stage is much greater than
unity.
Input Stage | Cascading of Amplifier Stages
For input stage, the consideration is not the maximum voltage gain but the impedance matching
of the source with the input impedance of the input stage. Some driving sources may require
input circuit to be an almost open circuit while others need an almost short circuit. Hence we
may be required to use CC or CB configuration for the input stage for proper impedance match
at the cost of voltage or current gain. In certain other cases, choice of configuration for the input
stage is the minimization of noise and maximization of single/noise power ratio.
UNIT 3
FET’S AND DIGITAL CIRCUITS
In the Bipolar Junction Transistor tutorials, we saw that the output Collector current of

the transistor is proportional to input current flowing into the Base terminal of the device,
thereby making the bipolar transistor a “CURRENT” operated device (Beta model) as a smaller
current can be used to switch a larger load current.
The Field Effect Transistor, or simply FET however, uses the voltage that is applied to their
input terminal, called the Gate to control the current flowing through them resulting in the output
current being proportional to the input voltage. As their operation relies on an electric field
(hence the name field effect) generated by the input Gate voltage, this then makes the Field
Effect Transistor a “VOLTAGE” operated device.
The Field Effect Transistor is a three terminal unipolar semiconductor device that has very
similar characteristics to those of their Bipolar Transistor counterparts. For example, high
efficiency, instant operation, robust and cheap and can be used in most electronic circuit
applications to replace their equivalent bipolar junction transistors (BJT) cousins.
Field effect transistors can be made much smaller than an equivalent BJT transistor and along
with their low power consumption and power dissipation makes them ideal for use in integrated
circuits such as the CMOS range of digital logic chips.
We remember from the previous tutorials that there are two basic types of bipolar transistor
construction, NPN and PNP, which basically describes the physical arrangement of the P-type
and N-type semiconductor materials from which they are made. This is also true of FET’s as
there are also two basic classifications of Field Effect Transistor, called the N-channel FET and
the P-channel FET.
The field effect transistor is a three terminal device that is constructed with no PN-junctions
within the main current carrying path between the Drain and the Sourceterminals. These
terminals correspond in function to the Collector and the Emitter respectively of the bipolar
transistor. The current path between these two terminals is called the “channel” which may be
made of either a P-type or an N-type semiconductor material.
The control of current flowing in this channel is achieved by varying the voltage applied to
the Gate. As their name implies, Bipolar Transistors are “Bipolar” devices because they operate
with both types of charge carriers, Holes and Electrons. The Field Effect Transistor on the other
hand is a “Unipolar” device that depends only on the conduction of electrons (N-channel) or
holes (P-channel).
The Field Effect Transistor has one major advantage over its standard bipolar transistor
cousins, in that their input impedance, ( Rin ) is very high, (thousands of Ohms), while the BJT is
comparatively low. This very high input impedance makes them very sensitive to input voltage
signals, but the price of this high sensitivity also means that they can be easily damaged by static
electricity.
There are two main types of field effect transistor, the Junction Field Effect
Transistor or JFET and the Insulated-gate Field Effect Transistor or IGFET), which is more
commonly known as the standard Metal Oxide Semiconductor Field Effect
Transistor or MOSFETfor short.
The Junction Field Effect Transistor
We saw previously that a bipolar junction transistor is constructed using two PN-junctions in the
main current carrying path between the Emitter and the Collector terminals. The Junction Field
Effect Transistor (JUGFET or JFET) has no PN-junctions but instead has a narrow piece of
high resistivity semiconductor material forming a “Channel” of either N-type or P-type silicon
for the majority carriers to flow through with two ohmic electrical connections at either end
commonly called the Drain and the Sourcerespectively.
There are two basic configurations of junction field effect transistor, the N-channel JFET and the
P-channel JFET. The N-channel JFET’s channel is doped with donor impurities meaning that the
flow of current through the channel is negative (hence the term N-channel) in the form of
electrons.
Likewise, the P-channel JFET’s channel is doped with acceptor impurities meaning that the flow
of current through the channel is positive (hence the term P-channel) in the form of holes. N-
channel JFET’s have a greater channel conductivity (lower resistance) than their equivalent P-
channel types, since electrons have a higher mobility through a conductor compared to holes.
This makes the N-channel JFET’s a more efficient conductor compared to their P-channel
counterparts.
We have said previously that there are two ohmic electrical connections at either end of the
channel called the Drain and the Source. But within this channel there is a third electrical
connection which is called the Gate terminal and this can also be a P-type or N-type material
forming a PN-junction with the main channel.
The
Bipolar Transistor (BJT) Field Effect Transistor (FET)
Emitter – (E) >> Source – (S)
Base – (B) >> Gate – (G)
Collector – (C) >> Drain – (D)
relationship between the connections of a junction field effect transistor and a bipolar junction
transistor are compared below.
Comparison of Connections between a JFET and a BJT
The symbols and basic construction for both configurations of JFETs are shown below.
The semiconductor “channel” of the Junction Field Effect Transistor is a resistive path through
which a voltage VDS causes a current ID to flow and as such the junction field effect transistor can
conduct current equally well in either direction. As the channel is resistive in nature, a voltage
gradient is thus formed down the length of the channel with this voltage becoming less positive
as we go from the Drain terminal to the Source terminal.
The result is that the PN-junction therefore has a high reverse bias at the Drain terminal and a
lower reverse bias at the Source terminal. This bias causes a “depletion layer” to be formed
within the channel and whose width increases with the bias.
The magnitude of the current flowing through the channel between the Drain and the Source
terminals is controlled by a voltage applied to the Gate terminal, which is a reverse-biased. In an
N-channel JFET this Gate voltage is negative while for a P-channel JFET the Gate voltage is
positive.
The main difference between the JFET and a BJT device is that when the JFET junction is
reverse-biased the Gate current is practically zero, whereas the Base current of the BJT is always
some value greater than zero.
Biasing of an N-channel JFET
The cross sectional diagram above shows an N-type semiconductor channel with a P-type region
called the Gate diffused into the N-type channel forming a reverse biased PN-junction and it is
this junction which forms the depletion region around the Gate area when no external voltages
are applied. JFETs are therefore known as depletion mode devices.
This depletion region produces a potential gradient which is of varying thickness around the PN-
junction and restrict the current flow through the channel by reducing its effective width and thus
increasing the overall resistance of the channel itself.
Then we can see that the most-depleted portion of the depletion region is in between the Gate
and the Drain, while the least-depleted area is between the Gate and the Source. Then the JFET’s
channel conducts with zero bias voltage applied (ie, the depletion region has near zero width).
With no external Gate voltage ( VG = 0 ), and a small voltage ( VDS ) applied between the Drain
and the Source, maximum saturation current ( IDSS ) will flow through the channel from the Drain
to the Source restricted only by the small depletion region around the junctions.
If a small negative voltage ( -VGS ) is now applied to the Gate the size of the depletion region
begins to increase reducing the overall effective area of the channel and thus reducing the current
flowing through it, a sort of “squeezing” effect takes place. So by applying a reverse bias voltage
increases the width of the depletion region which in turn reduces the conduction of the channel.
Since the PN-junction is reverse biased, little current will flow into the gate connection. As the
Gate voltage ( -VGS ) is made more negative, the width of the channel decreases until no more
current flows between the Drain and the Source and the FET is said to be “pinched-off” (similar
to the cut-off region for a BJT). The voltage at which the channel closes is called the “pinch-off
voltage”, ( VP ).
JFET Channel Pinched-off
In this pinch-off region the Gate voltage, VGS controls the channel current and VDS has little or no
effect.
JFET Model
The result is that the FET acts more like a voltage controlled resistor which has zero resistance
when VGS = 0 and maximum “ON” resistance ( RDS ) when the Gate voltage is very negative.
Under normal operating conditions, the JFET gate is always negatively biased relative to the
source.
It is essential that the Gate voltage is never positive since if it is all the channel current will flow
to the Gate and not to the Source, the result is damage to the JFET. Then to close the channel:
 No Gate Voltage ( VGS ) and VDS is increased from zero.
 No VDS and Gate control is decreased negatively from zero.
 VDS and VGS varying.
The P-channel Junction Field Effect Transistor operates exactly the same as the N-channel
above, with the following exceptions: 1). Channel current is positive due to holes, 2). The
polarity of the biasing voltage needs to be reversed.
The output characteristics of an N-channel JFET with the gate short-circuited to the source is
given as:
Output characteristic V-I curves of a typical junction FET

The voltage VGS applied to the Gate controls the current flowing between the Drain and the
Source terminals. VGS refers to the voltage applied between the Gate and the Source
while VDS refers to the voltage applied between the Drain and the Source.
Because a Junction Field Effect Transistor is a voltage controlled device, “NO current flows
into the gate!” then the Source current ( IS ) flowing out of the device equals the Drain current
flowing into it and therefore ( ID = IS ).
The characteristics curves example shown above, shows the four different regions of operation
for a JFET and these are given as:
 Ohmic Region – When VGS = 0 the depletion layer of the channel is very small and the
JFET acts like a voltage controlled resistor.
 Cut-off Region – This is also known as the pinch-off region were the Gate voltage,
VGS is sufficient to cause the JFET to act as an open circuit as the channel resistance is at
maximum.
 Saturation or Active Region – The JFET becomes a good conductor and is controlled

by the Gate-Source voltage, ( VGS ) while the Drain-Source voltage, ( V DS) has little or no
effect.
 Breakdown Region – The voltage between the Drain and the Source, ( VDS ) is high
enough to causes the JFET’s resistive channel to break down and pass uncontrolled
maximum current.
The characteristics curves for a P-channel junction field effect transistor are the same as those
above, except that the Drain current ID decreases with an increasing positive Gate-Source
voltage, VGS.
The Drain current is zero when VGS = VP. For normal operation, VGS is biased to be somewhere
between VP and 0. Then we can calculate the Drain current, ID for any given bias point in the
saturation or active region as follows:
Drain current in the active region.
Note that the value of the Drain current will be between zero (pinch-off) and IDSS(maximum
current). By knowing the Drain current ID and the Drain-Source voltage VDSthe resistance of the
channel ( RDS ) is given as:
Drain-Source Channel Resistance.
Where: gm is the “transconductance gain” since the JFET is a voltage controlled device and
which represents the rate of change of the Drain current with respect to the change in Gate-
Source voltage.
Modes of FET’s
Like the bipolar junction transistor, the field effect transistor being a three terminal device is
capable of three distinct modes of operation and can therefore be connected within a circuit in
one of the following configurations.
Common Source (CS) Configuration

In the Common Source configuration (similar to common emitter), the input is applied to the
Gate and its output is taken from the Drain as shown. This is the most common mode of
operation of the FET due to its high input impedance and good voltage amplification and as such
Common Source amplifiers are widely used.
The common source mode of FET connection is generally used audio frequency amplifiers and
in high input impedance pre-amps and stages. Being an amplifying circuit, the output signal is
180o “out-of-phase” with the input.
Common Gate (CG) Configuration
In the Common Gate configuration (similar to common base), the input is applied to the Source
and its output is taken from the Drain with the Gate connected directly to ground (0v) as shown.
The high input impedance feature of the previous connection is lost in this configuration as the
common gate has a low input impedance, but a high output impedance.
This type of FET configuration can be used in high frequency circuits or in impedance matching
circuits were a low input impedance needs to be matched to a high output impedance. The output
is “in-phase” with the input.
Common Drain (CD) Configuration
In the Common Drain configuration (similar to common collector), the input is applied to the

Gate and its output is taken from the Source. The common drain or “source follower”
configuration has a high input impedance and a low output impedance and near-unity voltage
gain so is therefore used in buffer amplifiers. The voltage gain of the source follower
configuration is less than unity, and the output signal is “in-phase”, 0o with the input signal.
This type of configuration is referred to as “Common Drain” because there is no signal available
at the drain connection, the voltage present, +VDD just provides a bias. The output is in-phase
with the input.
The JFET Amplifier
Just like the bipolar junction transistor, JFET’s can be used to make single stage class A
amplifier circuits with the JFET common source amplifier and characteristics being very similar
to the BJT common emitter circuit. The main advantage JFET amplifiers have over BJT
amplifiers is their high input impedance which is controlled by the Gate biasing resistive network
formed by R1 and R2 as shown.
Biasing of JFET Amplifier
This common source (CS) amplifier circuit is biased in class “A” mode by the voltage divider
network formed by resistors R1 and R2. The voltage across the Source resistor RS is generally set
to be about one quarter of VDD, ( VDD /4 ) but can be any reasonable value.
The required Gate voltage can then be calculated from this RS value. Since the Gate current is
zero, (IG = 0) we can set the required DC quiescent voltage by the proper selection of
resistors R1 and R2.
The control of the Drain current by a negative Gate potential makes the Junction Field Effect
Transistor useful as a switch and it is essential that the Gate voltage is never positive for an N-
channel JFET as the channel current will flow to the Gate and not the Drain resulting in damage
to the JFET. The principals of operation for a P-channel JFET are the same as for the N-channel
JFET, except that the polarity of the voltages need to be reversed.
In the next tutorial about Transistors, we will look at another type of Field Effect Transistor
called a MOSFET whose Gate connection is completely isolated from the main current carrying
channel.
MOS FET
FETs have a few disadvantages like high drain resistance, moderate input impedance and slower
operation. To overcome these disadvantages, the MOSFET which is an advanced FET is
invented.
MOSFET stands for Metal Oxide Silicon Field Effect Transistor or Metal Oxide Semiconductor
Field Effect Transistor. This is also called as IGFET meaning Insulated Gate Field Effect
Transistor. The FET is operated in both depletion and enhancement modes of operation. The
following figure shows how a practical MOSFET looks like.
Construction of a MOSFET
The construction of a MOSFET is a bit similar to the FET. An oxide layer is deposited on the
substrate to which the gate terminal is connected. This oxide layer acts as an insulator
(sio2 insulates from the substrate), and hence the MOSFET has another name as IGFET. In the
construction of MOSFET, a lightly doped substrate, is diffused with a heavily doped region.
Depending upon the substrate used, they are called as P-type and N-type MOSFETs.
The following figure shows the construction of a MOSFET.

The voltage at gate controls the operation of the MOSFET. In this case, both positive and
negative voltages can be applied on the gate as it is insulated from the channel. With negative
gate bias voltage, it acts as depletion MOSFET while with positive gate bias voltage it acts as
an Enhancement MOSFET.
Classification of MOSFETs
Depending upon the type of materials used in the construction, and the type of operation, the
MOSFETs are classified as in the following figure.
After the classification, let us go through the symbols of MOSFET.
The N-channel MOSFETs are simply called as NMOS. The symbols for N-channel MOSFET
are as given below.
The P-channel MOSFETs are simply called as PMOS. The symbols for P-channel MOSFET
are as given below.
Now, let us go through the constructional details of an N-channel MOSFET. Usually an

NChannel MOSFET is considered for explanation as this one is mostly used. Also, there is no
need to mention that the study of one type explains the other too.
Construction of N- Channel MOSFET
Let us consider an N-channel MOSFET to understand its working. A lightly doped P-type
substrate is taken into which two heavily doped N-type regions are diffused, which act as source
and drain. Between these two N+ regions, there occurs diffusion to form an Nchannel,
connecting drain and source.
A thin layer of Silicon dioxide (SiO2) is grown over the entire surface and holes are made to
draw ohmic contacts for drain and source terminals. A conducting layer of aluminum is laid
over the entire channel, upon this SiO2layer from source to drain which constitutes the gate.
The SiO2 substrate is connected to the common or ground terminals.
Because of its construction, the MOSFET has a very less chip area than BJT, which is 5% of the
occupancy when compared to bipolar junction transistor. This device can be operated in modes.
They are depletion and enhancement modes. Let us try to get into the details.
Working of N - Channel (depletion mode) MOSFET
For now, we have an idea that there is no PN junction present between gate and channel in this,
unlike a FET. We can also observe that, the diffused channel N (between two N+ regions),
the insulating dielectric SiO2 and the aluminum metal layer of the gate together form
a parallel plate capacitor.
If the NMOS has to be worked in depletion mode, the gate terminal should be at negative
potential while drain is at positive potential, as shown in the following figure.
When no voltage is applied between gate and source, some current flows due to the voltage
between drain and source. Let some negative voltage is applied at VGG. Then the minority
carriers i.e. holes, get attracted and settle near SiO2 layer. But the majority carriers, i.e.,
electrons get repelled.
With some amount of negative potential at VGG a certain amount of drain current ID flows
through source to drain. When this negative potential is further increased, the electrons get
depleted and the current ID decreases. Hence the more negative the applied VGG, the lesser the
value of drain current ID will be.
The channel nearer to drain gets more depleted than at source (like in FET) and the current flow
decreases due to this effect. Hence it is called as depletion mode MOSFET.
Working of N-Channel MOSFET (Enhancement Mode)

The same MOSFET can be worked in enhancement mode, if we can change the polarities of the
voltage VGG. So, let us consider the MOSFET with gate source voltage VGG being positive as
shown in the following figure.
When no voltage is applied between gate and source, some current flows due to the voltage
between drain and source. Let some positive voltage is applied at VGG. Then the minority
carriers i.e. holes, get repelled and the majority carriers i.e. electrons gets attracted towards
the SiO2 layer.
With some amount of positive potential at VGG a certain amount of drain current ID flows
through source to drain. When this positive potential is further increased, the
current ID increases due to the flow of electrons from source and these are pushed further due to
the voltage applied at VGG. Hence the more positive the applied VGG, the more the value of drain
current ID will be. The current flow gets enhanced due to the increase in electron flow better
than in depletion mode. Hence this mode is termed as Enhanced Mode MOSFET.
P - Channel MOSFET
The construction and working of a PMOS is same as NMOS. A lightly doped n-substrate is
taken into which two heavily doped P+ regions are diffused. These two P+ regions act as
source and drain. A thin layer of SiO2 is grown over the surface. Holes are cut through this layer
to make contacts with P+ regions, as shown in the following figure.
Working of PMOS
When the gate terminal is given a negative potential at VGG than the drain source voltage VDD,
then due to the P+ regions present, the hole current is increased through the diffused P channel
and the PMOS works in Enhancement Mode.
When the gate terminal is given a positive potential at VGG than the drain source voltage VDD,
then due to the repulsion, the depletion occurs due to which the flow of current reduces. Thus
PMOS works in Depletion Mode. Though the construction differs, the working is similar in
both the type of MOSFETs. Hence with the change in voltage polarity both of the types can be
used in both the modes.
This can be better understood by having an idea on the drain characteristics curve.
Drain Characteristics
The drain characteristics of a MOSFET are drawn between the drain current IDand the drain
source voltage VDS. The characteristic curve is as shown below for different values of inputs.
Actually when VDS is increased, the drain current ID should increase, but due to the applied VGS,
the drain current is controlled at certain level. Hence the gate current controls the output drain
current.
Transfer Characteristics
Transfer characteristics define the change in the value of VDS with the change in ID and VGS in
both depletion and enhancement modes. The below transfer characteristic curve is drawn for
drain current versus gate to source voltage.
Comparison between BJT, FET and MOSFET

Now that we have discussed all the above three, let us try to compare some of their properties.
TERMS BJT FET MOSFET
Device type Current controlled Voltage controlled Voltage Controlled
Current flow Bipolar Unipolar Unipolar
Not
Terminals Interchangeable Interchangeable
interchangeable
Operational No modes Depletion mode Both Enhancement and

modes only Depletion modes
Input
Low High Very high
impedance
Output
Moderate Moderate Low
resistance
Operational
Low Moderate High
speed
Noise High Low Low
Thermal Better
Low
stability
Transistor amplifier circuits such as the common emitter amplifier are made using Bipolar
Transistors, but small signal amplifiers can also be made using Field Effect Transistors. These
devices have the advantage over bipolar transistors of having an extremely high input impedance
along with a low noise output making them ideal for use in amplifier circuits that have very
small input signals.
The design of an amplifier circuit based around a junction field effect transistor or “JFET”, (N-
channel FET for this tutorial) or even a metal oxide silicon FET or “MOSFET” is exactly the
same principle as that for the bipolar transistor circuit used for a Class A amplifier circuit we
looked at in the previous tutorial.
Firstly, a suitable quiescent point or “Q-point” needs to be found for the correct biasing of the
JFET amplifier circuit with single amplifier configurations of Common-source (CS), Common-
drain (CD) or Source-follower (SF) and the Common-gate (CG) available for most FET devices.
These three JFET amplifier configurations correspond to the common-emitter, emitter-follower

and the common-base configurations using bipolar transistors. In this tutorial about FET
amplifiers we will look at the popular Common Source JFET Amplifier as this is the most
widely used JFET amplifier design.
Consider the Common Source JFET Amplifier circuit configuration below.
Common Source JFET Amplifier
The amplifier circuit consists of an N-channel JFET, but the device could also be an equivalent
N-channel depletion-mode MOSFET as the circuit diagram would be the same just a change in
the FET, connected in a common source configuration. The JFET gate voltage Vg is biased
through the potential divider network set up by resistors R1 and R2and is biased to operate
within its saturation region which is equivalent to the active region of the bipolar junction
transistor.
Unlike a bipolar transistor circuit, the junction FET takes virtually no input gate current allowing
the gate to be treated as an open circuit. Then no input characteristics curves are required. We
can compare the JFET to the bipolar junction transistor (BJT) in the following table.
Since the N-Channel JFET is a depletion mode device and is normally “ON”, a negative gate
voltage with respect to the source is required to modulate or control the drain current. This
negative voltage can be provided by biasing from a separate power supply voltage or by a self
biasing arrangement as long as a steady current flows through the JFET even when there is no
input signal present and Vg maintains a reverse bias of the gate-source pn junction.
In our simple example, the biasing is provided from a potential divider network allowing the
input signal to produce a voltage fall at the gate as well as voltage rise at the gate with a
sinusoidal signal. Any suitable pair of resistor values in the correct proportions would produce
the correct biasing voltage so the DC gate biasing voltage Vg is given as:
Note that this equation only determines the ratio of the resistors R1 and R2, but in order to take
advantage of the very high input impedance of the JFET as well as reducing the power
dissipation within the circuit, we need to make these resistor values as high as possible, with
values in the order of 1MΩ to 10MΩ being common.
The input signal, (Vin) of the common source JFET amplifier is applied between the Gate
terminal and the zero volts rail, (0v). With a constant value of gate voltage Vg applied the JFET
operates within its “Ohmic region” acting like a linear resistive device. The drain circuit contains
the load resistor, Rd. The output voltage, Vout is developed across this load resistance.
The efficiency of the common source JFET amplifier can be improved by the addition of a
resistor, Rs included in the source lead with the same drain current flowing through this resistor.
Resistor, Rs is also used to set the JFET amplifiers “Q-point”.
When the JFET is switched fully “ON” a voltage drop equal to Rs*Id is developed across this
resistor raising the potential of the source terminal above 0v or ground level. This voltage drop
across Rs due to the drain current provides the necessary reverse biasing condition across the
gate resistor, R2 effectively generating negative feedback.
So in order to keep the gate-source junction reverse biased, the source voltage, Vs needs to be
higher than the gate voltage, Vg. This source voltage is therefore given as:
Then the Drain current, Id is also equal to the Source current, Is as “No Current” enters the Gate
terminal and this can be given as:
This potential divider biasing circuit improves the stability of the common source JFET amplifier
circuit when being fed from a single DC supply compared to that of a fixed voltage biasing
circuit. Both resistor, Rs and the source by-pass capacitor, Cs serve basically the same function
as the emitter resistor and capacitor in the common emitter bipolar transistor amplifier circuit,
namely to provide good stability and prevent a reduction in the loss of the voltage gain.
However, the price paid for a stabilized quiescent gate voltage is that more of the supply voltage
is dropped across Rs.
The the value in farads of the source by-pass capacitor is generally fairly high above 100uF and
will be polarized. This gives the capacitor an impedance value much smaller, less than 10% of
the transconductance, gm (the transfer coefficient representing gain) value of the device. At high
frequencies the by-pass capacitor acts essentially as a short-circuit and the source will be
effectively connected directly to ground.
The basic circuit and characteristics of a Common Source JFET Amplifier are very similar to
that of the common emitter amplifier. A DC load line is constructed by joining the two points
relating to the drain current, Id and the supply voltage, Vdd remembering that when Id = 0: ( Vdd
= Vds ) and when Vds = 0: ( Id = Vdd/RL ). The load line is therefore the intersection of the
curves at the Q-point as follows.
Common Source JFET Amplifier Characteristics Curves
As with the common emitter bipolar circuit, the DC load line for the common source JFET
amplifier produces a straight line equation whose gradient is given as: -1/(Rd + Rs) and that it
crosses the vertical Id axis at point A equal to Vdd/(Rd + Rs). The other end of the load line
crosses the horizontal axis at point B which is equal to the supply voltage, Vdd.
The actual position of the Q-point on the DC load line is generally positioned at the mid center
point of the load line (for class-A operation) and is determined by the mean value of Vg which is
biased negatively as the JFET is a depletion-mode device. Like the bipolar common emitter
amplifier the output of the Common Source JFET Amplifier is 180o out of phase with the input
signal.
One of the main disadvantages of using Depletion-mode JFET is that they need to be negatively
biased. Should this bias fail for any reason the gate-source voltage may rise and become positive
causing an increase in drain current resulting in failure of the drain voltage, Vd.
Also the high channel resistance, Rds(on) of the junction FET, coupled with high quiescent
steady state drain current makes these devices run hot so additional heatsink is required.
However, most of the problems associated with using JFET’s can be greatly reduced by using
enhancement-mode MOSFET devices instead.
MOSFET’s or Metal Oxide Semiconductor FET’s have much higher input impedance’s and low
channel resistances compared to the equivalent JFET. Also the biasing arrangements for
MOSFETs are different and unless we bias them positively for N-channel devices and negatively
for P-channel devices no drain current will flow, then we have in effect a fail safe transistor.
JFET Amplifier Current and Power Gains
We said previously that the input current, Ig of a common source JFET amplifier is very small
because of the extremely high gate impedance, Rg. A common source JFET amplifier therefore
has a very good ratio between its input and output impedances and for any amount of output
current, IOUT the JFET amplifier will have very high current gain Ai.
Because of this common source JFET amplifiers are extremely valuable as impedance matching
circuits or are used as voltage amplifiers. Likewise, because: Power = Voltage x Current, (P =
V*I) and output voltages are usually several millivolts or even volts, the power gain, Ap is also
very high.

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CLIPPING CIRCUIT:

Fig shows the circuit of a positive clipper using a diode.

Generally, RL is much greater than R. So,

Fig.4 shows the circuit diagram of a biased clipper.

It consists of a diode D with a battery of Vdc volts.

Biased Negative Clipper

Therefore, a voltage +V1 appears across the load.

Note that, + V1 and – V2 are less than, +Vmax and –Vmax respectively.

1. Changing the shape of a waveform

Half Wave Rectifier Operation

Working of a Half wave rectifier

Power Supply Specifications of a rectifier

Advantages and Disadvantages of Half wave rectifier:

Disadvantages of Half wave rectifier

3. Transformer utilization factor is low.

Half Wave Rectifier with Capacitor Filter Â

1. Peak Inverse Voltage (PIV)

Peak Inverse Voltage (PIV) of half wave rectifier = VSMAX

2.Average and Peak Currents in the diode

Instantaneous value of voltage applied to Half Wave Rectifier

Current flowing through the diode

3.DC Output Current

DC Output Current of Half Wave Rectifier

4. DC Output Voltage

Dc value of voltage across the load is given by

Vdc = Idc RL = VSMAX/pi(RF +RL)X RL =VSMAX/{1+RF/RL }

5.Root Mean Square (RMS) Value of Current

RMS value of the current flowing through the diode is given as

RMS value of current flowing through diode in half wave rectifier

RMS value of voltage across the load is given as

VLrms = Irms RL = VSMAX RL /2(RF + RL) = VSMAX/2{1+RF/RL }

DC power delivered to the load, Pdc = I2dc RL =(Imax/pi)2 RL

So, Rectification Efficiency, È = Pdc/Pac = {4/2}[RL/ (RF + RL)] = 0.406/{1+ RF/RLÂ }

8. Ripple FactorÂ

The effective value of the load current is given as

So, ripple factor, Î³ = Iac/ Idc = I2 – I2dc)/ Idc = {( Irms/ Idc2)-1} = Kf2 â€“ 1)

Kf = Irms /Iavg = (Imax/2)/ (Imax/pi)Â = pi/2 = 1.57So, ripple factor, Î³ = Â (1.572 â€“ 1) = 1.21

% Regulation = {(Vno-load â€“ Vfull-load)/ Vfull-load}* 100

Applications of Half wave rectifier

FULL WAVE RECTIFIERS:

We can further classify full wave rectifiers into

Construction of Centre-tapped Full Wave Rectifier:

A centre-tapped full wave rectifier system consists of:

The circuit diagram is as follows

Full Wave Bridge Rectifier

Construction of Full Wave Bridge Rectifier

Characteristics of a Full-wave Rectifier

For centre-tapped full-wave rectifier, ηmax = 81.2%

Form Factor (F.F)

For centre-tapped full wave rectifier, FF = 1.11

A junction transistor works as an amplifier when,

1. The emitter-base junction is forward biased and

2. The base-collector junction is reverse biased.

The circuit diagram for the same is as shown below:

 The voltage between emitter and base = VEB

 The voltage between collector and base = VCB

 VEE = Power supply connected between the emitter and base

AV = Vout/Vin = (ICRL) / (IERin)