Loss Analysis of Non-Isolated Bidirectional DC/DC
Converters for Hybrid Energy Storage System in EVs
Serkan Dusmez, Student Member, IEEE
University of Texas at Dallas
Electrical and Computer Science Department
Power Electronics and Drives Laboratory
Richardson, 75080, TX, USA
serkan.dusmez@utdallas.edu
Abstract— The selection of a bidirectional non-isolated dc-dc
converter interfacing the battery and ultracapacitor (UC) in
electric vehicles (EVs) is of critical importance for the overall
system efficiency. Generally, efficiency comparison of converters
is conducted based on given fixed input and output parameters.
Such a comparison may not provide fair results for EV
applications since energy source voltages and traction power vary
dynamically depending on the driving conditions. This paper
provides a comprehensive efficiency comparison of three-level,
two-level and interleaved bidirectional buck/boost converters
through developed loss models considering the dynamic variables
in a drive cycle. The results of the analyses show that three-level
converter exhibits higher overall efficiency. A 1kW prototype has
been designed and developed to serve as a proof of concept.
Keywords— Electric vehicles, interleaved converter, non-
isolated dc-dc converter, ultracapacitor, three-level converter.
I. INTRODUCTION
Ultracapacitor (UC) assisted battery electric vehicles (EVs)
are attractive alternatives to battery-only EVs with high-power
batteries [1]-[3]. Different drivetrain architectures, in which
UCs are either actively or passively controlled, are proposed
and compared in terms of efficiency, control complexity, and
performance [4]-[5]. The most common type of connection is
shown in Fig. 1. In this architecture, UC is directly connected
to the dc link, and serves as a power buffer. High power
requirement can be met by UC through controlling UC voltage
within inverter’s upper and lower operation voltage limits,
where the only controllable unit is the bidirectional dc/dc
converter. The selection of the bidirectional converter
topology is of critical importance as it greatly affects the
overall system efficiency [6]-[7].
Since the energy storage is bonded to the vehicle chassis
and charging is provided with galvanic isolation between the
main and the battery, there is no need for galvanic isolation in
hybrid energy storage system (HESS) [8]. Thus, non-isolated
converters are widely preferred as the interface between the
on-board energy sources due to their simple structure, smaller
size, and high efficiency when dc conversion ratio is relatively
small. Many studies proposed and evaluated bidirectional non-
isolated dc-dc converters for EVs, and majority of them
978-1-4799-2399-1/14/$31.00 ©2014 IEEE
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Amin Hasanzadeh, Member, IEEE, Alireza Khaligh,
Senior Member, IEEE
University of Maryland, ECE Department and Institute
for Systems Research, PEHREL Laboratory
College Park, 20742, MD, USA
khaligh@ece.umd.edu; www.ece.umd.edu/~khaligh
Bidirectional
DC-DC Motor
Converter Inverter
Bat UC PMSM
Fig.1. Drivetrain of the battery/UC vehicle with a bidirectional converter.
Fig. 2. Non-isolated bidirectional buck/boost converters (a) Two-level, b)
Interleaved, c) Three-level.
provided the efficiency comparison, which are only evaluated
for some specific power, with fixed input and output
parameters [9]-[10]. However, efficiency evaluation of dc/dc
converters in EVs should consider the wide traction power and
battery/UC operation voltage ranges.
This study proposes using three-level converter (TLC) as
the bidirectional dc/dc converter in EVs, and compares it with
candidate counterparts, two-level and interleaved bidirectional
buck/boost converters (BIC) [11]-[13], considering Urban
Dynamometer Driving Schedule (UDDS) as the drive cycle.
Power distribution obtained by three-level Discrete Wavelet
Transformation in [14], together with the corresponding UC
and battery voltages are used for the calculations. Thereby,
overall efficiency of the converters over the whole drive cycle
is computed through developed loss models, and the converter
with the highest efficiency is identified.
II. COMPARISON OF THREE LEVEL CONVERTER WITH THE
STAT-OF-THE-ART CONVERTERS
TLC provides several advantages over the state-of-the-art
two-level and BIC converters. Switching losses highly depend
on the voltage applied across the switch. Even without soft-
switching, the switching loss of the parasitic capacitance can
be reduced eight times in comparison to conventional boost
converter (CBC) as the switches are subjected to half of the
output voltage. In fact, the parasitic capacitance losses are
expected to be even lower as switches with low voltage
ratings are used. In addition, the switches with higher voltage
543
ratings typically exhibit higher internal resistance, therefore;
conduction losses can be reduced as well. On the passive
component side, the diode reverse recovery losses are lower as
reverse voltage is only half of the output voltage, and low
voltage diodes typically recover faster. This section compares
bi-directional buck/boost dc-dc converter topologies, given in
Fig. 2, in terms of overall efficiency over the full drive cycle
range, considering the dynamic variations of the battery and
UC voltages as well as the power processed by the converter.
A. DRIVE CYCLE CHARACTERISTIC
The efficiency of the bidirectional converter varies to great
extent with respect to the load power and dynamic voltage
variations of the energy sources. In Fig. 1 drivetrain
configuration, the power of the converter is equal to the power
requested from/to the battery. The sizing and power/energy
management of ESS are important for the efficiency of the
system, as it impacts the voltages of the energy sources and
the battery power. In this study, UDDS drive cycle, which
simulates an urban route of 7.5 miles with frequent stops, is
chosen. The maximum and average speeds are 56.7 mph and
19.6 mph. It is assumed that one day commute consists of 4
UDDS drive cycles, corresponding to 30 miles. A 15.8kWh
Li-ion battery pack with a nominal voltage of 350V, which
goes up to 407V at fully charged state, is considered. The
battery voltage varies between 380V to 350V in the linear
operation region from full state of charge (SOC) to 15% SOC.
The UC voltage is limited by the minimum operation voltage
of the inverter and set to 350V, as it is connected to the dc link
directly, while upper voltage limit is set to 600V. As energy
stored in the UC is proportional to the square of its voltage,
sufficient energy can be stored (C·118.75kJ) with 600V to
350V voltage swing, where C represents the UC capacitance.
Energy/power management controller plays a vital role in
systems with hybrid ESS. In this study, the battery and UC
reference powers achieved using a three-level wavelet
decomposition [14]. The load demand of a single UDDS drive
cycle, approximation part of the wavelet decomposed signal
(battery reference power), and detail part of the decomposed
signal (UC reference power), can be found in [14]. As it can
be seen from the figure, battery power is smoothened and high
frequency part of the load demand is shifted to UC. Since only
battery power is processed by the converter, only battery
power will be evaluated in the efficiency analysis, however,
UC power is necessary for the evaluation of the UC voltage
variation.
The converter power, voltage variations of UC and battery
for four consecutive UDDS cycles can be found in [14]. Since
utilized power splitting approach does not include a state-of-
charge (SOC) control for UC, the capacitance for UC is set to
4F, which would provide sufficient energy for UC to complete
four UDDS cycles without performance scarification. For this
specific case, the battery is assumed to have 80% initial SOC,
and UC has 91.6% SOC. The battery voltage varies between
381V and 357V, UC voltage varies between 575V and 384V,
while converter power varies between -10.78kW and 45.32kW
throughout the drive cycle. The efficiency analyses will be
conducted based on this data in the following sections.
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TABLE I. CONVERTER CURRENTS DURING 4 UDDS (FS=20 KHZ)
Current Values
CBC TLC BIC
(200µH) (100µH) (200µH)
Max. Bat. Cur. [A] (ibat_max) 138.64 130 123.2
Ripple Cur. @ ibat_max [A] 30.86 4.28 15.43
Max. Ind. Cur. [A] (iL_max) 138.64 130 77.03
30.86 4.28 30.86
Ripple Cur. @ iL_max [A]
Max. Ripple Cur. [A] (∆ibat) 32.94 11.5 15.8
Max. Ripple Cur. [A] (∆iL) 32.94 11.5 31.6
Max. Ind. Rms Cur. [A] (Irms_max) 126.89 126.86 63.49
B. SEMICONDUCTOR SELECTION GUIDELINE
The drive cycle has been evaluated considering a 20 kHz
switching intermediate buck/boost converter, where the
effective frequency seen at the input is 40 kHz in BIC and
TLC. The battery current ripple is limited to 20% of the
discharging current at the maximum discharge rate,
corresponding to 40% inductor current ripple for BIC. Based
on assumed ripple current, switching frequency, operating
maximum voltage across inductor with corresponding duty
cycle, the inductors for CBC, BIC and TLC are chosen as
200µH, 200µH (×2), and 100µH, respectively.
According to the battery power level [14], IGBTs are
potential semiconductor devices, whereas MOSFETs could be
suitable switching devices for 20kHz switching frequencies.
According to the Table I, maximum battery current should be
more than 150A. Based on the UC and battery voltage levels,
the semiconductor voltage ratings should be selected as 600V
for TLC and 1200V for CBC and BIC, respectively. However,
it is difficult to find 1200V and even 600V MOSFET discrete
devices in the market. These limitations dictate two distinct
choices of using either a) high power IGBT modules or b)
parallel connected MOSFETs. Considering the switching
frequency and cost of the switches, using parallel connected
MOSFETs is more viable. To have a fair comparison, 600V
and 1200V MOSFETs are chosen from the same manufacturer
and category/family as different manufacturers define the
semiconductor parameters in their own standards to advertise
the products differently. Taking these criteria into account, the
switches IXFB30N120P is selected for two level converters of
CBC and BIC, and IXFX80N60P3 is selected for TLC, where
IXFB30N120P and IXFX80N60P3 are 1200V/30A and
600V/80A power MOSFETs, respectively. Totally, 12
IXFB30N120P MOSFETs are utilized for each converter,
CBC and BIC, while 8 IXFX80N60P3 MOSFETs are used for
TLC.
C. EFFICIENCY LOSS MODELS
In order to estimate energy loss and efficiency of the
converter over the entire drive cycle, efficiency models
representing conduction, switching, inductor core and winding
losses are presented, and evaluated for each converter using
5605 data points. The expressions for the switch and diode
currents are given in the Appendix for each operation mode
and based on CCM/DCM operation.
i. SWITCHING LOSSES:
The switching losses have four major contributors; 1) power
losses at MOSFET due to the crossover of current and voltage
 40 120
Total Losses
Reverse Diode
150
Recovery 100 Losses

30

Conduction Losses [Wh]

Parasitic Conduction Losses
80
Switching Losses [Wh]

Overall Loss [Wh]

Capacitance
Switch 100
Losses
20 Losses 60 Switching Losses
L

40
Switch 50
10 Core Losses
20 Copper Losses
Losses
Gate Losses
0 CBC BICTLC
0 CBC BIC TLC CBC BIC TLC CBC BIC TLC CBC BIC TLC 0 CBC BIC TL
LC CBC BIC TLC CBC BIC TLC
CBC BICTLC CBC BICTLC CBC BICTLC
(a) (b) (c)

Fig. 3. Energy losses at switching frrequency of 20 kHz; a) Switching losses, b) Conduction and core losses, c) Overall loss.
120 500
Reverse
Recovery Diode Total Losses
150 100 Losses
400
Switching Losses
Conduction Losses [Wh]

Parasitic
Capacitance 80
Switching Losses [Wh]

Overall Losses [Wh]

Switch
Losses Losses 300
100
60
200
40
50 Switch Conduction Losses
Core Losses
20 Copper 100
Losses
Gate Losses Losses

0 CBC BICTLC CBC BICTLC CBC BICTLC CBC BICTLC 0 CBC BIC TLC CBC BICTLC CBC BICTLC CBC BIC TLC 0 CBC BIC TLC
T CBC BIC TLC CBC BIC TLC
(a) (b) (c)
Fig. 4. Energy losses at switching freequency of 100 kHz; a) Switching losses, b) Conduction and core loosses, c) Overall loss.

body diode, which is related too the reverse recovery duration

. At the turn-off transition of
o diode, the excess charge
stored in the drift region is rem
moved before the diode-junction
become reverse-biased. This excess causes undesirable
reverse recovery voltage . The
T switching loss in CBC and
BIC is given by following exprression:
0.5
(1)
0.5
where, is the switching frequency, and are the
number of paralleled-switchees and paralleled converters,
which are 6 and 1 for CBC, 3 and
a 2 for BIC, 2 and 1 for TLC,
respectively. In addition, a
and denote the rise-time and
Fig. 5. Photo of the designed three-level converter. fall-time transitions of MOSFE
ETs during switching periods.
ii. CONDUCTION LOSSES
at the instant of switching, 2) gate charge losses, 3) parasitic At low frequencies, conducction loss is dominant and this
capacitance losses, 4) reverse recovery loosses at the body loss depends on the on-state resistance and drain RMS
diode of MOSFET. At frequencies aboove 20 kHz, the current of MOSFET. Thhe conduction loss for CBC and
switching losses contribute to significant amount
a of power BIC can be estimated using equuation (2).
dissipation. The switching losses at the MO OSFETs are given
/
by the area under the waveforms of drain-source voltage (2)
and drain current . The gate charge loss is caused by
charging the gate capacitance by gate voltage and then where, and are forwardd bias voltage drop and average
dumping the charge to ground in every switcching cycle, hence, current of diode. For TLC, theere is an additional term in boost
it is categorized under the switching losses. The charge stored mode, which can be expressed as,
in the parasitic output capacitor during turn off period of
/
the MOSFET causes power dissipation. AnotherA source of (3)
switching losses is reverse recovery lossees of MSOFET’s

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 (a) (b) (c)
Fig. 6. Experimental waveforms for TLC boost mode when d=0.25 (Vin=120V, Vo =90V, Po =700W).

(a) (b) (c)

Fig. 7. Experimental waveforms for TLC boost mode when d=0.48 (Vin =130V, Vo=67V, Po =500W).

and for buck mode operation, profiles, explained in Section III.A, The resultant energy
/ losses for all three converters at switching frequency of 20
(4)
kHz are presented in Fig. 3. The corresponding switching
/ losses [Wh] are given in Fig. 3(a). The reverse recovery
It is worth mentioning that there are no additional terms for losses in CBC and BIC converters are higher, particularly due
CBC and BIC conduction and switching loss calculations. In to the higher drain-source voltage across the diodes at the
addition, in buck and boost modes the voltage and currents of turn-off instants. On the other hand, the voltage across the
diodes and switches are substituted accordingly. diodes in TLC is half of the output voltage, which causes
iii. INDUCTOR LOSSES lower power dissipation. Similarly, the losses associated with
the parasitic capacitance MOSFETs are significantly lower.
The copper loss of the inductor is calculated using winding
Gate losses are not significant at the given switching
ohmic resistance, which can be estimated as,
frequency.
(5) The conduction losses along with core and copper losses
are plotted in Fig. 3(b). Here, the conduction losses of the
where, is the copper resistivity constant. Since all cores switches in TLC are lower in comparison with the other
have been selected from Magnetics Inc. with relative switches, as reduced number of switches is used. In contrary,
permeability of 60, the core loss of transformer can be diode losses are higher since the current flows through more
calculated by multiplication of core’s volume and core loss number of diodes. The overall losses of each converter are
density , , which is a function of core type in terms of presented in Fig. 3(c). TLC exhibits slightly higher efficiency
AC magnetic flux density and operating frequency . than others, though, the overall conduction losses are higher.
, (6) The results for switching frequency of 100 kHz are plotted in
, for the aforementioned permeability has been Fig. 4. As it can be seen, the efficiency improvement is
provided by Magnetics Inc. with the following equation [15]. considerably higher in this case. This also proves that TLC
becomes more advantageous at higher switching frequency
, 193 . /1000 . (7)
operations. Using the charts given above, the overall
The hysteresis losses are considerably smaller in inductors in efficiencies of the converters considering the full drive cycle
comparison to alternating flux transformers, hence, they are can be found by,
neglected in this analysis.
⁄ D C (8)
III. EFFICIENCY ANALYSIS According to Eq. (8), the average efficiencies achieved from
Using Eqs. (1)-(7), the losses associated with the converters the simulation results considering the given drive cycle are
are calculated considering the dynamic power and voltage 98.7%, 98.5%, and 98.8% for CBC, BIC, and TLC,
respectively. For the case of 100 kHz switching frequency, the

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efficiencies drop to 96.4%, 96.3%, and 98%, respectively. As ∆
a result of the analysis, it is observed that TLC is the most 1 ∆
3
efficient converter in comparison to CBC and BIC. The
difference in the efficiency is getting more significant as the
switching frequency increases.
IV. EXPERIMENTAL RESULTS
1
A 1kW prototype has been designed as the proof of concept, CBC DCM Boost ( IB VUC ⁄ 8Lf ):
as shown in Fig. 5. The switching frequency is set to 100 kHz,
where effective frequency becomes 200 kHz. The inductor is 2 /
chosen as 100µH. The switches are IRFP350, which has a ∆
breakdown voltage of 400V and allows 16A continuous drain
current. The converter is controlled using a dsPIC30f4011 ∆ /3
microcontroller. The inductor current is sensed using a LEM ∆ /
CAS-25 sensor. (∆ 1)
The experimental results for three operating points in boost
mode are given in Figs. (6)-(7). The figures present the ∆ ∆ ∆
∆ ∆
waveforms for the operation when d=0.25 and d=0.48. The 3
voltage spikes across switch and diodes are due to the hard-
switching and the parasitic inductances on the printed circuit
board (PCB) layout, since their contribution to oscillations
becomes significant at 200 kHz system frequency. The
switching frequency and doubled inductor current frequency ∆
can be observed from the results. CBC CCM Buck ( IB VUC ⁄ 8Lf ):
⁄
V. CONCLUSION
In battery/UC hybrid EVs, the selection of the bidirectional ∆
dc/dc converter topology, which processes the battery power,
is of great importance as it is one of the major factors ∆
∆
contributing to the efficiency degradation, particularly in high- 3
frequency switching power converters, and size of the system.
In this study, it is concluded that using a three-level non- ∆
1 ∆
isolated bidirectional dc/dc converter as the power electronic 3
interface between the battery and UC, instead of conventional
two-quadrant buck/boost converter, would increase the
conversion efficiency. In this regard, three-level converter is
analyzed and comprehensively compared with conventional
1
two-quadrant buck/boost converter and interleaved
bidirectional converter considering a UDDS drive cycle where CBC DCM Buck ( IB VUC ⁄ 8Lf ):
the battery and UC powers are split using a three-level 2 /
wavelet decomposition. The results proves that TLC converter
provides considerable efficiency improvement, particularly at ∆
switching frequencies above 100 kHz.
∆ /3
APPENDIX
∆ 1
CBC CCM Boost ( IB VUC ⁄ 8Lf ):
1 ⁄

∆
∆ ∆
2
∆ ∆ ∆ ∆
∆ ∆
2 3
∆ In BIC, the current is halved.
∆
3
2

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 /2 ∆ ∆ /2 ∆
TLC CCM Boost ( IB VUC ⁄ 32Lf ) forward operation: ∆ ∆
3
1 ⁄
/2
∆

∆ ∆
∆
3

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