ITBP205

Digital Design and Computer Organization

Unit 8
Sequential Circuits Analysis

Prof. Walid Ibrahim

 Outline

State Table

State Diagram

Mealy and Moore Circuits

2
 Definition
• State • Flip-flops (FFs) output combination

• Current • The state before the clock edge

State
• Next • The state after the clock edge
state
• Number • 2N ( N is the number of FFs).
of
States
• Mealy • The outputs of the sequential circuit depend upon
Circuits both the current state of the circuit and the inputs.

• Moore • The outputs of the sequential circuit depend only

Circuits upon the current state of the circuit.

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 How do you analyze a circuit?

For a combinational circuit a truth table is used to show how

the outputs are related to the inputs.

For a sequential circuit, the outputs depend upon not only the
inputs, but also the current state of the flip-flops.

In addition to finding outputs, we also need to find the state of

the flip-flops on the next clock cycle.

A state table is the sequential analog of a truth table. It shows

inputs and current states on the left, and outputs and next
states on the right.
 State Table
• The State Table is used to show the circuit
output(s) and next state for each combination of
inputs and current state.

• Numb
er of •2 Number of inputs + number of FFs

Rows

• Numb • Number of inputs + number of

er of outputs + 2 x number of FFs +
Colum
ns
number of FFs inputs

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 Example
• Analyze the following sequential circuit

Number of Inputs: 1 X' J1

SET
Q1
Q0

Number of outputs: 1 Z
X K1 CLR Q1 X
Number of flip flops: 2 Q0

Number of States: X J2
SET
Q2
4 Q1

Number of rows: 22 + 1 = 8
X' K2 CLR Q2
Number of Columns:
CLK
1 + 1 + 2 x 2 + 2 x 2 = 10

Mealy or Moore? Meal

y
6

 X' J1
SET
Q1
Z = Q1.Q0.X Q0

Z
J1 = Q0.X' X K1 CLR Q1 X
Q0
K1 = Q0 + X
X J2
SET
Q2
Q1
J0 = Q1 + X
K0 = X’ X' K2 CLR Q2
CLK

Current State Input Flip Flop Inputs Next State Output

Q1 Q0 X J1 K1 J0 K0 Q1* Q0* Z
0 0 0 0 0 0 1 0 0 0
0 0 1 0 1 1 0 0 1 0
0 1 0 1 1 0 1 1 0 0
0 1 1 0 1 1 0 0 1 0
1 0 0 0 0 1 1 1 1 0
1 0 1 0 1 1 0 0 1 0
1 1 0 1 1 1 1 0 0 0
1 1 1 0 1 1 0 0 1 1 7
Getting the state table columns straight
The table starts
with Current
State and Inputs.
Note: the
We only care
Current State outputs occur
and Inputs about FF Inputs this cycle and
yield Output. in order to find the next state in
Next State. the next cycle
Current State
and Inputs
yield FF Inputs.

Current State and FF Inputs yield Next

State, based on the flip-flop
characteristic tables.
 Exercise
• Complete the state table for the following circuit

X' D1
SET
Q1
Q0

CLR Q1
Z
X
X D
T2
SET
Q2
Q1

CLR Q2
CLK
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 State Diagram
• The information in the state table can be
represented graphically in a state diagram
• Each state is represented by a node in the diagram
• The edges in the diagram represent the transitions
between the states
• If there are n flip-flops, there should be 2n nodes in
the diagram.
• If there are m inputs, then each node will have 2m
outgoing edges from each node.
• Different diagrams for Mealy and Moore Circuits

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 Mealy State Diagram

Current
• T • 4 nodes (states) State
Input Next State Output
w Q1 Q0 X Q1* Q0* Z
o 0 0 0 0 0 0
• O
FF • Two edges going out 0 0 1 0 1 0
ne
s: from each node 0 1 0 1 0 0
in 0 1 1 0 1 0
• The
pu label on each edge should 1 0 0 1 1 0
be
t (input / output) 1 0 1 0 1 0
1 1 0 0 0 0
• 1 1 1 0 1 1
Input / output
0/0 1/0
1/0
1/0 0/0
00 01 10 11
0/0

1/1
0/0 11

 Moore State Machine

Current
• The output depends only Input Next State Output
State
on the current state. Q1 Q0 X Q1* Q0* Z
0 0 0 0 0 0
• Each state should specify 0 0 1 0 1 0
the expected output 0 1 0 1 0 0
0 1 1 0 0 0
• The edge should only 1 0 0 1 1 0
specify the input that cause 1 0 1 1 0 0
the transition 1 1 0 0 0 1
1 1 1 0 1 1

0 1
1
00 1 01 0 10 0 11
0 0 0 1
1

0 12