The Gauss Elimination from the Circuit Theory

Point of View: Triangular Nodal Equivalent
F. Vacca, S. Vergura, IEEE Member

Abstract — The most used method utilized to solve an II. NODAL ANALYSIS
electric network is the nodal analysis. After obtaining the
NA and Modified Nodal Analysis (MNA) are the most
matrix equation it can be solved by using Gauss Elimination
(GE). This paper analyzes the GE from a circuit point of used methods in computer aided design of electric and
view. It results that GE represents a modification of the electronic circuits.
assigned circuit. Such a modification can be considered as a In this paper we consider circuits in stationary
successive removal of independent nodes. The whole conditions and we limits to examine only the NA. We start
procedure can be systematically applied; in this way, given a with the simple case of a circuit constituting by
circuit, it is possible to switch to a modified circuit, by means
of circuit transformations corresponding to mathematical
conductances and DC independent current sources. All the
ones. results will be later extended to RLC circuits fed by AC
sources.
Keywords — Circuit Theory, Gauss Elimination, Chosen a datum node, applying Kirchhoff’s current law
Triangular Nodal Equivalent. to n independent nodes, the following matrix formulation
is obtained:
I. INTRODUCTION G ⋅V = J (1)
where G represents the n × n nodal conductance matrix, V
T HE method by which circuit equations are formulated
is of key importance in a computer-aided circuit
analysis and design program for integrated circuits. It
the nodal voltages vector and J the nodal currents vector,
respectively.
affects significantly the set-up time, the programming Solving (1) allows all the nodal voltages and,
effort, the storage requirements and the execution speed of subsequently, all the branch currents to be obtained.
the computer program. The method needs to be flexible,
computationally efficient and saving storage. The nodal III. GAUSS ELIMINATION
approach for formulating circuit equations is a classical Let us consider the linear equations system:
method which not only meets these requirements but also Ax = b (2)
brings to a numerically well-behaved diagonal [1]. To where the non-singular matrix A represents the n × n
solve the formulated nodal equations, Gauss Elimination
x = [ x1 ,..., xn ] the unknowns vector
T
(GE) is often used. This strategy is frequently used in coefficient matrix,
methods devoted to hierarchical analysis [2]-[3] as well as and b = [b1 ,..., bn ]
T
the known terms vector.(; let A be a
to network reduction [4] of large analog circuits. The
focus of this paper is to interpret the GE from a circuit non-singular matrix).
theory point of view. Expanding (2), it is obtained
Section II recalls the Nodal Analysis (NA), while ⎧ a11 x1 + a12 x2 + ..... + a1n xn = b1
⎪
Section III presents the basic concepts of the GE. In ⎨ .... (3)
Section IV it is shown that the GE, applied to nodal ⎪a x + a x + ..... + a x = b
⎩ n1 1 n 2 2 nn n n
equations, can be viewed as an iterative modification of the
The GE allows to transform (3) in the following
assigned circuit and a circuit structure, called standard
equivalent system:
nodal cell, is introduced. As at the end of GE the modified
circuit is represented by a triangular coefficient matrix, the ⎧ r11 x1 + r12 x2 + ..... + r1n xn = c1
⎪ r22 x2 + ..... + r2 n xn = c2
model is called Triangular Nodal Equivalent (TNE). For ⎪
⎨ (4)
sake of clarity Section IV describes the method for a DC ⎪ ....
circuit. In Section V the proposed method is extended to ⎪⎩ rnn xn = cn
the AC analysis. Finally, Section VI shows two examples.
or in more compact form
Rx = c (5)
F. Vacca is with the Department of Electric and Electronics, where R is an upper triangular matrix with rii ≠ 0 for
Politecnico di Bari, Bari, Italy (phone: +39-080-5963259; fax: +39-080- i = 1,..., n , while c is the vector b modified by the
5963410; e-mail: vacca@deemail.poliba.it).
S. Vergura is with the Department of Electric and Electronics, application of the multipliers defined later.
Politecnico di Bari, Bari, Italy (phone: +39-080-5963590; fax: +39-080-
5963410; e-mail: vergura@deemail.poliba.it).

1-4244-0049-X/05/$20.00 ©2005 IEEE 776

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 Equation (4) is obtained from (3) by means of
mathematical equivalent transformation; i.e., if aii ≠ 0
( i = 1,..., n ), the unknown xi is eliminated from all the
equations following the i-th one, subtracting by the j-th
equation (j>i) the i-th one, whose terms have been
previously multiplied by the so-called multiplier
a ji
l ji = (6)
aii
In this way, all the terms belonging to the first column
are zero, except the first one. The procedure is newly
applied so that all the terms belonging to the second
column are zero, except the first and the second one, etc.
Equation (4) can be recursively solved as:
⎧ xn = cn / rnn
⎪
⎪ n
⎨ ci − ∑ rij x j (7)
⎪x = j =i +1
i = n-1,...,1
⎪⎩ i rii
IV. TRIANGULAR NODAL EQUIVALENT
Assigned a circuit with n independent nodes, consisting
of only independent current sources and conductances, it is
possible to apply the nodal method for obtaining (1). From
a circuit theory point of view to apply the GE Elimination
to (1) means to transform the assigned circuit in
accordance with the following rules. Let us start by the
first node:
1. the elimination of the element Gk1 (with k = 2,...n )
implies to remove the 1-node (i.e. the node number
1) from the assigned circuit; after the removal,
between the 1-node and datum node there will be:
• all the current sources connected at the 1-node
in the assigned circuit;
• a conductance Geq ,1 = ∑ j G1 j with j ≠ 1 , being
G1 j the conductance between the 1-node and
the j-node, ( G1 j ≠ 0 );
• as Voltage-Controlled Current Sources (VCCS)
as mutual conductances G1 j are present; each
VCCSj is controlled by the nodal voltage Vj
which G1 j was connected to, while its trans-
conductance has the same value of the
conductance G1 j .
2. At every k-node which 1-node was connected to, it
is needed to consider:
• a current source between k-node and datum
node (besides those already existing in the
Gk1
assigned circuit), having value I s1 ⋅ ,
∑ j G1 j
where Is1 is the current source connected to the
1-node, if present. This weighted current source
will have the entering into or the going out
direction according to the direction of I s1 in 1-
node.
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Gk1 ⋅ ∑ G1 j
• A conductance Gk 0 + Gk1 −
j ≠0
∑ j G1 j
between the k-node and datum node, being Gk 0
the branch equivalent conductance between the
k-node and the datum node in the assigned
circuit;
G ⋅G
• a conductance Gkh + k1 h1 between the k-th
∑ j G1 j
and h-th nodes, if there was a conductance
G1h linking directly the 1-node with the h-node.
3. The previous two steps, applied to remove the 1-
node, have to be iterated for all the remaining (n-1)
independent nodes.
Every time the steps 1 and 2 are applied to the k-node,
the node k-th will result isolated from all the remaining
nodes and its linkage information will be transferred to the
subsequent nodes. Each removed node constitutes the
Standard Nodal Cell (SNC), as shown in Fig. 1 for the 1-
node.
The 1-node voltage can be straightforward evaluated
once known the voltages of node directly linked to the 1-
node.
Considering the whole process of the GE, it happens
that after the forward elimination:
• the coefficient matrix will be triangular;
• the unknowns will be still the nodal voltages;
then (1) becomes:
T ⋅V = J ' (8)
where T represents the upper triangular n × n
coefficient matrix J ' is the modified nodal currents
vector. Then, the matrix equation (8) represents just the
Triangular Nodal Equivalent (TNE).
G1k V k G1hV h
Is1 ∑ j G1 j
Fig. 1. Standard Nodal Cell (SNC) of the 1-node after its removal.
From a circuit theory point of view the starting circuit
will result subdivided in n SNCs, in which the last one
contains all the information about the whole circuit. This
last SNC is constituted by only an equivalent independent
current source with an equivalent parallel-connected
conductance. This cell allows the nodal voltage of the n-
node to be directly calculated and by means of back
substitution all the nodal voltages from the (n-1)-th to the
first one can be obtained, utilizing just the SNCs
previously defined.
V. EXTENSION TO THE AC ANALYSIS
In previous section TNE has been considered for the DC
analysis for sake of simplicity. Obviously, the whole
algorithm of the previous section can be extended to
 circuits constituted by R-L-C elements fed by AC current
1 2 Gγ 3
sources, substituting:
⋅ G2 G6
Is1 ⋅
• the conductance Gij with the admittance Y ij ; G2V2 G6V3
G126
Is2 − Is1 ⋅
G126

• the DC current sources with AC current Is1 Gα Gβ Gδ

sources.
Equation (8) becomes:
⋅
T ⋅V = J ' (9) 0 0
⋅
Fig. 3. Modified circuit after removing the 1-node. It is noted SNC-1
where T is a complex triangular matrix, V the nodal
voltages vector in AC domain and J ' the modified nodal In the following the sum of more conductances will be
currents vector in AC domain. Equation (9) represents reported in the subscript, i.e. G126 = G1 + G2 + G6 .
TNE in AC domain.
3 3
VI. APPLICATIONS Itot Itot

≡
A. Example 1 Is2 Is1 ⋅
G6
Is2 − Is1 ⋅
G6
G126 G126
Fig. 2 shows a DC circuit fed by two current sources.
The independent nodes are numbered as 1,2,3.
Let us suppose: I s1 = 20[ A] , I s 2 = 20 [ A] and
Fig. 4. More current sources in the same node are fused in only one.
Gi = i [ S ] ∀i = 1,2,...6 .
Applying NA, following matrix equation is obtained: TABLE 1: EXPRESSIONS AND VALUES OF Gα, Gβ, Gγ and Gδ
Gα[S] Gβ [S] Gγ [S] Gδ [S]
⎡G1 + G2 + G6 −G2 −G6 ⎤ ⎡V1 ⎤ ⎡ − I s1 ⎤ G126 G 2 ⋅ (G 2 + G6 ) G 2 ⋅ G6 G6 ⋅ ( G2 + G6 )
G 23 - G4 + G 56 -
⎢ −G2 G2 + G3 + G4 −G4 ⎥ ⋅ ⎢V ⎥ = ⎢ 0 ⎥ (10) G126 G126 G126
⎢ ⎥ ⎢ 2⎥ ⎢ ⎥
⎢⎣ −G6 −G4 G4 + G5 + G6 ⎥⎦ ⎢⎣V3 ⎥⎦ ⎢⎣ I s 2 ⎥⎦
9 3,22 5,33 5,67

whose solution is V1 = −1.93[V ] , V2 = −0.20[V ] ,

V3 = 0.51[V ] . The second step provides the removal of the 2-node
G6 from the circuit in Fig. 3. The final circuit is reported in
Fig. 5, while Iη and Gη are reported in Table 2. The last
SNC of Fig. 3 allows V3 to be directly calculated and then,
1 G2 2 G4 3
by back substitution, also V2 and V1 are determined. It
results V3 = 0.51[V ] , V2 = −0.20[V ] , V1 = −1.93[V ] , as
G3
Is1 G1 G5 Is2
expected.
1 2 3

G2V2 G6V3 G2 Gγ V3
Is1 ⋅ Iη
G126
Is1 Gα Gβγ Gη
Fig. 2. DC circuit
Now, let us apply the GE according to the algorithm of
section IV. The first step provides the removal of the 1-
node from the circuit. After this step the circuit is modified 0 0 0

as in Fig. 3, where the conductances Gα, Gβ, Gγ and Gδ Fig. 5. The final equivalent circuit
have been reported in Table 1 for sake of clarity, while at
the 3-node the two current sources (the assigned one, Is2, TABLE 2: EXPRESSIONS AND VALUES OF Iη AND Gη
G Iη [A] Gη [S]
and the reported one from the 1-node, I s1 ⋅ 6 ) have Gγ Gγ ⋅ Gγ
G126 G6 G
I s 2 − I s1 ⋅ − I s1 ⋅ 2 ⋅ Gδγ −
G126 G126 Gβγ G βγ
been fused in a unique current source; the minus sign takes
into account that the weighted current source is going out 3.90 7.68
from the node (Fig. 4).
B. Example 2
Application of TNE to the ladder circuits gives an
important simplification. In fact, as each node is connected
only to two another independent nodes, the SNC (Fig. 1)
obtained at each elimination step will present only one

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 VCCS. Moreover the conductances linking directly two
independent nodes do not change during the GE process.
Fig. 6 reports a ladder DC circuit, in which six
independent nodes are present. It is observed there is only
one independent current source. If the node, which it is
connected to, is labeled as 1-node, in the GE process a 6 5 2 1
4 3
weighted current source will appear in all the SNCs.
Otherwise, if the nodes are labeled so that the node, G’6 G’5
Is1 G’4 G’3 G’2 G’1
which the current source is connected to, results the last
one, then only in the last SNC a current source appears; the G2V6 G4V5 G6V4 G10V2
G8V3
other SNCs will be constituted by only one VCCS with a
parallel-connected conductance, providing a great
computation reduction. In Fig. 6 just this choice has been Fig. 7. The final equivalent ladder circuit after removals.
done in numbering the nodes.
Let us suppose: I s = 20[ A] and TABLE 4: CONDUCTANCES VALUES OF THE CIRCUIT IN FIG. 7 .
Gi = i [ S ] ∀i = 1, 2,...11 . G’6[S] G’5[S] G’4[S] G’3[S] G’2[S] G’1[S]
2,485 7,77 13,01 18,12 22,24 21
6 G2 5 G4 4 G6 3 G8 2 G 10 1
VII. CONCLUSION
Is This paper studies the GE applied to the nodal analysis
G1 G3 G5 G7 G9 G 11 from a circuit theory point of view. It highlights how the
forward process of the GE elimination can be viewed as an
iterative removal of the nodes from the assigned n
independent nodes circuit. The removal of k-th node
corresponds to the definition of one independent node
Fig. 6. Ladder circuit
circuit, called standard nodal cell, with node voltage
The resulting matrix equation is:
dependent on the remaining (n-k) node voltages.
Then, all the nodal voltages can be directly evaluated by
⎡G10 + G11 −G10 0 0 0 ⎤ ⎡V1 ⎤ ⎡ 0 ⎤
0
⎢ −G ⎥ ⎢V ⎥ ⎢ 0 ⎥ a reverse solution procedure starting from the n-th nodal
⎢ 10 G89 + G10 −G8 0 0 0
⎥ ⎢ 2⎥ ⎢ ⎥
⎢ 0 −G8 G678 −G6 0 ⎥ ⎢V3 ⎥ ⎢ 0 ⎥
0
cell.
⎢ ⎥⋅⎢ ⎥ = ⎢ ⎥ (11)
⎢ 0 0 −G6 G456 −G4 0⎥ ⎢V4 ⎥ ⎢ 0 ⎥
⎢ 0 0 0 −G4 G234 −G2 ⎥ ⎢V5 ⎥ ⎢ 0 ⎥ REFERENCES
⎢ ⎥ ⎢ ⎥ ⎢ ⎥
⎢⎣ 0 0 0 0 −G2 G12 ⎥⎦ ⎢⎣V6 ⎥⎦ ⎢⎣ I s1 ⎥⎦ [1] C. w. Ho, A. I. Ruehli, and P. A. Brennan, “The modified nodal
approach to network analysis”, IEEE trans. On Circuits and
Systems, vol. CAS-22, No. 6, pp. 504-509, 1975.
whose solution is reported in Table 3. [2] S. X.-D. Tan, Z. Qi, and H. Li, “Hierarchical modeling and
simulation of large analog circuits,” in Proc. European Design and
Test Conf. (DATE), 2004.
TABLE 3: NODAL VOLTAGES OF THE LADDER CIRCUIT.
[3] V S. X.-D. Tan, “A general s-domain hierarchical network
V1[V] V2[V] V3[V] V4[V] V5[V] V6[V] reduction algorithm”, Proc. IEEE/ACM International Conf. on
0.036 0.076 0.211 0.637 2.071 8.047 Computer-Aided Design (ICCAD), San Jose, CA, Nov. 2003.
[4] V Z. Qin and C-K. Cheng, “RCLK-VJ network reduction with
Hurwitz polynomial approximation,” Proc. Asia South Pacific
Now, let us apply the rules introduced in Section IV to Design Automation Conference (ASP-DAC), pp.283–291, Jan.
the circuit of Fig 6. The final circuit, after six successive 2003.
removals of the independent nodes, is reported in Fig. 7,
while the values of the conductances are reported in Table
4. The nodal voltage of the 6-node is directly obtained as
I
V6 = s1 = 8.048[V ] , while the other ones are calculated
G '6
by back substitution. The values previously reported in
Table 3 are confirmed.

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